[Intel-gfx] ✓ Fi.CI.IGT: success for Parallel submission aka multi-bb execbuf (rev2)

2021-08-04 Thread Patchwork
== Series Details == Series: Parallel submission aka multi-bb execbuf (rev2) URL : https://patchwork.freedesktop.org/series/92789/ State : success == Summary == CI Bug Log - changes from CI_DRM_10442_full -> Patchwork_20767_full Summary ---

Re: [Intel-gfx] [PATCH 2/2] drm/i915: delete gpu reloc code

2021-08-04 Thread Daniel Vetter
On Tue, Aug 03, 2021 at 10:47:10AM -0500, Jason Ekstrand wrote: > Both are > > Reviewed-by: Jason Ekstrand CI is happy, I guess you got all the igt changes indeed. Both pushed thanks for reviewing. -Daniel > > On Tue, Aug 3, 2021 at 7:49 AM Daniel Vetter wrote: > > > > It's already removed, t

Re: [Intel-gfx] [PATCH] fbdev/efifb: Release PCI device's runtime PM ref during FB destroy

2021-08-04 Thread Daniel Vetter
On Mon, Aug 02, 2021 at 04:35:51PM +0300, Imre Deak wrote: > Atm the EFI FB driver gets a runtime PM reference for the associated GFX > PCI device during driver probing and releases it only when removing the > driver. > > When fbcon switches to the FB provided by the PCI device's driver (for > ins

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: fix i915_globals_exit() section mismatch error

2021-08-04 Thread Patchwork
== Series Details == Series: drm/i915: fix i915_globals_exit() section mismatch error URL : https://patchwork.freedesktop.org/series/93398/ State : success == Summary == CI Bug Log - changes from CI_DRM_10445 -> Patchwork_20770 Summary

Re: [Intel-gfx] [PATCH -next] drm/i915: fix i915_globals_exit() section mismatch error

2021-08-04 Thread Jason Ekstrand
On Wed, Aug 4, 2021 at 3:41 PM Randy Dunlap wrote: > > Fix modpost Section mismatch error in i915_globals_exit(). > Since both an __init function and an __exit function can call > i915_globals_exit(), any function that i915_globals_exit() calls > should not be marked as __init or __exit. I.e., it

Re: [Intel-gfx] [PATCH v4 10/18] drm/i915/xehpsdv: Add compute DSS type

2021-08-04 Thread Matt Roper
On Wed, Aug 04, 2021 at 01:36:37PM -0700, Lucas De Marchi wrote: > On Thu, Jul 29, 2021 at 10:00:00AM -0700, Matt Roper wrote: > > From: Stuart Summers > > > > Starting in XeHP, the concept of slice has been removed in favor of > > DSS (Dual-Subslice) masks for various workload types. These workl

[Intel-gfx] [PATCH -next] drm/i915: fix i915_globals_exit() section mismatch error

2021-08-04 Thread Randy Dunlap
Fix modpost Section mismatch error in i915_globals_exit(). Since both an __init function and an __exit function can call i915_globals_exit(), any function that i915_globals_exit() calls should not be marked as __init or __exit. I.e., it needs to be available for either of them. WARNING: modpost: v

Re: [Intel-gfx] [PATCH v4 10/18] drm/i915/xehpsdv: Add compute DSS type

2021-08-04 Thread Lucas De Marchi
On Thu, Jul 29, 2021 at 10:00:00AM -0700, Matt Roper wrote: From: Stuart Summers Starting in XeHP, the concept of slice has been removed in favor of DSS (Dual-Subslice) masks for various workload types. These workloads have been divided into those enabled for geometry and those enabled for comp

Re: [Intel-gfx] [PATCH v4 09/18] drm/i915/xehpsdv: Add maximum sseu limits

2021-08-04 Thread Lucas De Marchi
On Thu, Jul 29, 2021 at 09:59:59AM -0700, Matt Roper wrote: Due to the removal of legacy slices and the transition to a gslice/cslice/mslice/etc. design, we'll internally store all DSS under "slice0." Signed-off-by: Matt Roper Reviewed-by: Caz Yokoyama --- drivers/gpu/drm/i915/gt/intel_sseu.c

Re: [Intel-gfx] [PATCH v4 05/18] drm/i915/dg2: Add SQIDI steering

2021-08-04 Thread Lucas De Marchi
On Thu, Jul 29, 2021 at 09:59:55AM -0700, Matt Roper wrote: Although DG2_G10 platforms will always have all SQIDI's present and don't need steering for registers in a SQIDI MMIO range, this isn't true for DG2_G11 platforms; only SQIDI's 2 and 3 can be used on those. We handle SQIDI ranges a bit

Re: [Intel-gfx] [PATCH v4 04/18] drm/i915/dg2: Update LNCF steering ranges

2021-08-04 Thread Lucas De Marchi
On Thu, Jul 29, 2021 at 09:59:54AM -0700, Matt Roper wrote: DG2's replicated register ranges are almost the same at XeHP SDV with the exception of one LNCF sub-range that switches to gslice steering. We can re-use the XeHP SDV mslice steering table and just provide a DG2-specific LNCF steering ta

Re: [Intel-gfx] [PATCH v4 02/18] drm/i915/xehpsdv: Define steering tables

2021-08-04 Thread Lucas De Marchi
On Thu, Jul 29, 2021 at 09:59:52AM -0700, Matt Roper wrote: Define and initialize the MMIO ranges for which XeHP SDV requires MSLICE and LNCF steering. Bspec: 66534 Cc: Tvrtko Ursulin Cc: Daniele Ceraolo Spurio Signed-off-by: Matt Roper Reviewed-by: Lucas De Marchi Lucas De Marchi ---

Re: [Intel-gfx] [PATCH v4 01/18] drm/i915/xehp: handle new steering options

2021-08-04 Thread Lucas De Marchi
On Thu, Jul 29, 2021 at 09:59:51AM -0700, Matt Roper wrote: From: Daniele Ceraolo Spurio Xe_HP is more modular than its predecessors and as a consequence it has more types of replicated registers. As with l3bank regions on previous platforms, we may need to explicitly re-steer accesses to thes

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Do not define vma on stack

2021-08-04 Thread Matthew Brost
On Mon, Aug 02, 2021 at 10:11:18PM -0700, Matthew Brost wrote: > From: Venkata Sandeep Dhanalakota > > Defining vma on stack can cause stack overflow, if > vma gets populated with new fields. > > Cc: Daniele Ceraolo Spurio > Cc: Tvrtko Ursulin > Signed-off-by: Venkata Sandeep Dhanalakota > Si

[Intel-gfx] [PULL] drm-intel-fixes

2021-08-04 Thread Rodrigo Vivi
Hi Dave and Daniel, Here goes drm-intel-fixes-2021-08-04: - Call i915_globals_exit if pci_register_device fails (Jason) - Correct SFC_DONE register offset (Matt) Thanks, Rodrigo. The following changes since commit c500bee1c5b2f1d59b1081ac879d73268ab0ff17: Linux 5.14-rc4 (2021-08-01 17:04:17

[Intel-gfx] [PULL] drm-misc-fixes

2021-08-04 Thread Thomas Zimmermann
Hi Dave and Daniel, here's the weekly PR for drm-misc-fixes. I cherry-picked the vmwgfx fix from drm-misc-next-fixes where it accidentally landed first. Best regards Thomas drm-misc-fixes-2021-08-04: Short summary of fixes pull: * kmb: DMA fix; Add macros for driver date/version * vmwgfx: Fix

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Use max params for older panels

2021-08-04 Thread Patchwork
== Series Details == Series: drm/i915/dp: Use max params for older panels URL : https://patchwork.freedesktop.org/series/93390/ State : success == Summary == CI Bug Log - changes from CI_DRM_10445 -> Patchwork_20769 Summary --- **SUC

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Use max params for older panels

2021-08-04 Thread Patchwork
== Series Details == Series: drm/i915/dp: Use max params for older panels URL : https://patchwork.freedesktop.org/series/93390/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5f019446c196 drm/i915/dp: Use max params for older panels -:6: ERROR:GIT_COMMIT_ID: Please use git commi

[Intel-gfx] [PATCH] drm/i915/dp: Use max params for older panels

2021-08-04 Thread Kai-Heng Feng
Users reported that after commit 2bbd6dba84d4 ("drm/i915: Try to use fast+narrow link on eDP again and fall back to the old max strategy on failure"), the screen starts to have wobbly effect. Commit a5c936add6a2 ("drm/i915/dp: Use slow and wide link training for everything") doesn't help either, t

[Intel-gfx] ✗ Fi.CI.BAT: failure for remove rcu support from i915_address_space (rev3)

2021-08-04 Thread Patchwork
== Series Details == Series: remove rcu support from i915_address_space (rev3) URL : https://patchwork.freedesktop.org/series/93314/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10445 -> Patchwork_20768 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for remove rcu support from i915_address_space (rev3)

2021-08-04 Thread Patchwork
== Series Details == Series: remove rcu support from i915_address_space (rev3) URL : https://patchwork.freedesktop.org/series/93314/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -drivers/gpu/drm

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for remove rcu support from i915_address_space (rev3)

2021-08-04 Thread Patchwork
== Series Details == Series: remove rcu support from i915_address_space (rev3) URL : https://patchwork.freedesktop.org/series/93314/ State : warning == Summary == $ dim checkpatch origin/drm-tip caf6e7f302eb drm/i915: Drop code to handle set-vm races from execbuf -:17: WARNING:COMMIT_LOG_LONG_

Re: [Intel-gfx] [PATCH 5/7] drm/i915/gem/ttm: Respect the objection region in placement_from_obj

2021-08-04 Thread Daniel Vetter
On Wed, Aug 4, 2021 at 10:00 AM Thomas Hellström wrote: > > Hi, > > On 7/22/21 11:59 AM, Matthew Auld wrote: > > On Thu, 22 Jul 2021 at 10:49, Matthew Auld > > wrote: > >> On Wed, 21 Jul 2021 at 21:11, Jason Ekstrand wrote: > >>> On Mon, Jul 19, 2021 at 8:35 AM Matthew Auld > >>> wrote: >

[Intel-gfx] [PATCH v2 6/9] drm/i915: Drop __rcu from gem_context->vm

2021-08-04 Thread Daniel Vetter
It's been invariant since commit ccbc1b97948ab671335e950271e39766729736c3 Author: Jason Ekstrand Date: Thu Jul 8 10:48:30 2021 -0500 drm/i915/gem: Don't allow changing the VM on running contexts (v4) this just completes the deed. I've tried to split out prep work for more

[Intel-gfx] [PATCH v2 5/9] drm/i915: Use i915_gem_context_get_eb_vm in intel_context_set_gem

2021-08-04 Thread Daniel Vetter
Since commit ccbc1b97948ab671335e950271e39766729736c3 Author: Jason Ekstrand Date: Thu Jul 8 10:48:30 2021 -0500 drm/i915/gem: Don't allow changing the VM on running contexts (v4) the gem_ctx->vm can't change anymore. Plus we always set the intel_context->vm, so might as well use the help

[Intel-gfx] [PATCH v2 8/9] drm/i915: Stop rcu support for i915_address_space

2021-08-04 Thread Daniel Vetter
The full audit is quite a bit of work: - i915_dpt has very simple lifetime (somehow we create a display pagetable vm per object, so its _very_ simple, there's only ever a single vma in there), and uses i915_vm_close(), which internally does a i915_vm_put(). No rcu. Aside: wtf is i915_dpt do

[Intel-gfx] [PATCH v2 7/9] drm/i915: use xa_lock/unlock for fpriv->vm_xa lookups

2021-08-04 Thread Daniel Vetter
We don't need the absolute speed of rcu for this. And i915_address_space in general dont need rcu protection anywhere else, after we've made gem contexts and engines a lot more immutable. Note that this semantically reverts commit aabbe344dc3ca5f7d8263a02608ba6179e8a4499 Author: Chris Wilson Dat

[Intel-gfx] [PATCH v2 9/9] drm/i915: Split out intel_context_create_user

2021-08-04 Thread Daniel Vetter
There's quite a fundamental difference between userspace contexts, and kernel contexts. Latter all share intel_gt->vm, former get their vm from gem_ctx->vm (on full ppgtt at least). By splitting context creation for userspace from kernel-internal ones we can make this all a bit more strict and WAR

[Intel-gfx] [PATCH v2 3/9] drm/i915: Use i915_gem_context_get_eb_vm in ctx_getparam

2021-08-04 Thread Daniel Vetter
Consolidates the "which is the vm my execbuf runs in" code a bit. We do some get/put which isn't really required, but all the other users want the refcounting, and I figured doing a function just for this getparam to avoid 2 atomis is a bit much. Signed-off-by: Daniel Vetter Cc: Jon Bloomfield C

[Intel-gfx] [PATCH v2 2/9] drm/i915: Rename i915_gem_context_get_vm_rcu to i915_gem_context_get_eb_vm

2021-08-04 Thread Daniel Vetter
The important part isn't so much that this does an rcu lookup - that's more an implementation detail, which will also be removed. The thing that makes this different from other functions is that it's gettting you the vm that batchbuffers will run in for that gem context, which is either a full ppg

[Intel-gfx] [PATCH v2 4/9] drm/i915: Add i915_gem_context_is_full_ppgtt

2021-08-04 Thread Daniel Vetter
And use it anywhere we have open-coded checks for ctx->vm that really only check for full ppgtt. Plus for paranoia add a GEM_BUG_ON that checks it's really only set when we have full ppgtt, just in case. gem_context->vm is different since it's NULL in ggtt mode, unlike intel_context->vm or gt->vm,

[Intel-gfx] [PATCH v2 1/9] drm/i915: Drop code to handle set-vm races from execbuf

2021-08-04 Thread Daniel Vetter
Changing the vm from a finalized gem ctx is no longer possible, which means we don't have to check for that anymore. I was pondering whether to keep the check as a WARN_ON, but things go boom real bad real fast if the vm of a vma is wrong. Plus we'd need to also get the ggtt vm for !full-ppgtt pla

[Intel-gfx] [PATCH 0/9] remove rcu support from i915_address_space

2021-08-04 Thread Daniel Vetter
Hi all, Next round with some fixes: - missed a conversion, 0day spotted it running sparse - missed virtual engines in the last patch, intel-gfx-ci spotted that too (except it was mostly filtered out by a bogus cibuglog entry, so took a while to realize what's going on). Old version: https://

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Disable gpu relocations

2021-08-04 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Disable gpu relocations URL : https://patchwork.freedesktop.org/series/93340/ State : success == Summary == CI Bug Log - changes from CI_DRM_10442_full -> Patchwork_20765_full

Re: [Intel-gfx] [PATCH 5/7] drm/i915/gem/ttm: Respect the objection region in placement_from_obj

2021-08-04 Thread Thomas Hellström
Hi, On 7/22/21 11:59 AM, Matthew Auld wrote: On Thu, 22 Jul 2021 at 10:49, Matthew Auld wrote: On Wed, 21 Jul 2021 at 21:11, Jason Ekstrand wrote: On Mon, Jul 19, 2021 at 8:35 AM Matthew Auld wrote: On Fri, 16 Jul 2021 at 20:49, Jason Ekstrand wrote: On Fri, Jul 16, 2021 at 1:45 PM Matth