[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 timeouts delaying boot under GVT

2021-08-12 Thread Patchwork
== Series Details == Series: i915 timeouts delaying boot under GVT URL : https://patchwork.freedesktop.org/series/93652/ State : warning == Summary == $ dim checkpatch origin/drm-tip d888bd9f64eb i915 timeouts delaying boot under GVT -:47: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)

[Intel-gfx] i915 timeouts delaying boot under GVT

2021-08-12 Thread Christoph Hellwig
Hi all, when botting a current 4.14-rc tree in a VM using GVT-g (with the host also running a current 4.14-rc tree), I see bunch of long timeouts followed by i915 errors: [4.252066] i915 :00:03.0: [drm] VGT balloon successfully [5.095190] i915 :00:03.0: [drm] *ERROR* Failed to dis

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev6)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/hdcp: HDCP2.2 MST dock fixes (rev6) URL : https://patchwork.freedesktop.org/series/93570/ State : success == Summary == CI Bug Log - changes from CI_DRM_10480_full -> Patchwork_20809_full Summary --

[Intel-gfx] ✓ Fi.CI.BAT: success for MIPI DSI driver enhancements (rev6)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev6) URL : https://patchwork.freedesktop.org/series/92695/ State : success == Summary == CI Bug Log - changes from CI_DRM_10481 -> Patchwork_20810 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for MIPI DSI driver enhancements (rev6)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev6) URL : https://patchwork.freedesktop.org/series/92695/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/displa

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev6)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev6) URL : https://patchwork.freedesktop.org/series/92695/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6f3864fcf0db drm/i915/dsi: send correct gpio_number on gen11 platform 6b6820f4e4a4 drm/i915/jsl: program DSI pane

[Intel-gfx] [v4] drm/i915/dsi: Send proper brightness value via MIPI DCS command

2021-08-12 Thread Lee Shawn C
Driver has to swap the endian before send brightness level value to tcon. v2: Use __be16 instead of u16 to fix sparse warning. Reported-by: kernel test robot Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gp

[Intel-gfx] ✓ Fi.CI.IGT: success for MIPI DSI driver enhancements (rev5)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev5) URL : https://patchwork.freedesktop.org/series/92695/ State : success == Summary == CI Bug Log - changes from CI_DRM_10479_full -> Patchwork_20808_full Summary --- **SU

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-P

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-P URL : https://patchwork.freedesktop.org/series/93640/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10478_full -> Patchwork_20807_full Summ

Re: [Intel-gfx] [v4 7/7] drm/i915/dsi: Send proper brightness value via MIPI DCS command

2021-08-12 Thread kernel test robot
Hi Lee, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip v5.14-rc5 next-20210812] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest

Re: [Intel-gfx] [PATCH v5 5/9] drm/i915/xehpsdv: factor out function to read RP_STATE_CAP

2021-08-12 Thread Lucas De Marchi
On Thu, Aug 12, 2021 at 04:14:11PM -0700, Lucas De Marchi wrote: On Thu, Aug 12, 2021 at 03:49:17PM -0700, Jose Souza wrote: On Thu, 2021-08-05 at 09:36 -0700, Matt Roper wrote: From: Lucas De Marchi Instead of maintaining the same if ladder in 3 different places, add a function to read RP_ST

Re: [Intel-gfx] [PATCH v5 5/9] drm/i915/xehpsdv: factor out function to read RP_STATE_CAP

2021-08-12 Thread Lucas De Marchi
On Thu, Aug 12, 2021 at 03:49:17PM -0700, Jose Souza wrote: On Thu, 2021-08-05 at 09:36 -0700, Matt Roper wrote: From: Lucas De Marchi Instead of maintaining the same if ladder in 3 different places, add a function to read RP_STATE_CAP. gt_perf_status looks a good next candidate to have the

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Drop redundant debug print (rev3)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/display: Drop redundant debug print (rev3) URL : https://patchwork.freedesktop.org/series/93025/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10478_full -> Patchwork_20805_full Summary

Re: [Intel-gfx] [PATCH v5 5/9] drm/i915/xehpsdv: factor out function to read RP_STATE_CAP

2021-08-12 Thread Souza, Jose
On Thu, 2021-08-05 at 09:36 -0700, Matt Roper wrote: > From: Lucas De Marchi > > Instead of maintaining the same if ladder in 3 different places, add a > function to read RP_STATE_CAP. > gt_perf_status looks a good next candidate to have the same handling as rp_state_cap Reviewed-by: José Rob

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev6)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/hdcp: HDCP2.2 MST dock fixes (rev6) URL : https://patchwork.freedesktop.org/series/93570/ State : success == Summary == CI Bug Log - changes from CI_DRM_10480 -> Patchwork_20809 Summary --- **SUC

[Intel-gfx] ✓ Fi.CI.BAT: success for MIPI DSI driver enhancements (rev5)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev5) URL : https://patchwork.freedesktop.org/series/92695/ State : success == Summary == CI Bug Log - changes from CI_DRM_10479 -> Patchwork_20808 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add pci ids and uapi for DG1

2021-08-12 Thread Jason Ekstrand
On Thu, Aug 12, 2021 at 9:49 AM Daniel Vetter wrote: > > On Thu, Aug 12, 2021 at 2:44 PM Maarten Lankhorst > wrote: > > > > DG1 has support for local memory, which requires the usage of the > > lmem placement extension for creating bo's, and memregion queries > > to obtain the size. Because of th

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for MIPI DSI driver enhancements (rev5)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev5) URL : https://patchwork.freedesktop.org/series/92695/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/displa

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev5)

2021-08-12 Thread Patchwork
== Series Details == Series: MIPI DSI driver enhancements (rev5) URL : https://patchwork.freedesktop.org/series/92695/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7d2fc78e40b5 drm/i915/dsi: send correct gpio_number on gen11 platform 1241531858c4 drm/i915/jsl: program DSI pane

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-P

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-P URL : https://patchwork.freedesktop.org/series/93640/ State : success == Summary == CI Bug Log - changes from CI_DRM_10478 -> Patchwork_20807 Summary --

Re: [Intel-gfx] [PATCH 4/4] drm/vgem: use shmem helpers

2021-08-12 Thread Daniel Vetter
On Thu, Aug 12, 2021 at 07:01:44PM +0200, Sam Ravnborg wrote: > Hi Daniel, > > On Thu, Aug 12, 2021 at 03:14:12PM +0200, Daniel Vetter wrote: > > Aside from deleting lots of code the real motivation here is to switch > > the mmap over to VM_PFNMAP, to be more consistent with what real gpu > > driv

[Intel-gfx] [PULL] drm-misc-next

2021-08-12 Thread Maarten Lankhorst
Last drm-misc-next for next kernel release! drm-misc-next-2021-08-12: drm-misc-next for v5.15: UAPI Changes: Cross-subsystem Changes: - Add lockdep_assert(once) helpers. Core Changes: - Add lockdep assert to drm_is_current_master_locked. - Fix typos in dma-buf documentation. - Mark drm irq midl

Re: [Intel-gfx] [PATCH v5 13/20] drm/gem: Delete gem array fencing helpers

2021-08-12 Thread Daniel Vetter
On Thu, Aug 05, 2021 at 12:46:58PM +0200, Daniel Vetter wrote: > Integrated into the scheduler now and all users converted over. > > Signed-off-by: Daniel Vetter > Cc: Maarten Lankhorst > Cc: Maxime Ripard > Cc: Thomas Zimmermann > Cc: David Airlie > Cc: Daniel Vetter > Cc: Sumit Semwal > C

Re: [Intel-gfx] [PATCH v5 12/20] drm/msm: Use scheduler dependency handling

2021-08-12 Thread Daniel Vetter
On Thu, Aug 05, 2021 at 12:46:57PM +0200, Daniel Vetter wrote: > drm_sched_job_init is already at the right place, so this boils down > to deleting code. > > Signed-off-by: Daniel Vetter > Cc: Rob Clark > Cc: Sean Paul > Cc: Sumit Semwal > Cc: "Christian König" > Cc: linux-arm-...@vger.kernel

Re: [Intel-gfx] [PATCH v5 11/20] drm/etnaviv: Use scheduler dependency handling

2021-08-12 Thread Daniel Vetter
On Thu, Aug 05, 2021 at 12:46:56PM +0200, Daniel Vetter wrote: > We need to pull the drm_sched_job_init much earlier, but that's very > minor surgery. > > v2: Actually fix up cleanup paths by calling drm_sched_job_init, which > I wanted to to in the previous round (and did, for all other drivers).

Re: [Intel-gfx] [PATCH v5 08/20] drm/lima: use scheduler dependency tracking

2021-08-12 Thread Daniel Vetter
On Thu, Aug 05, 2021 at 12:46:53PM +0200, Daniel Vetter wrote: > Nothing special going on here. > > Aside reviewing the code, it seems like drm_sched_job_arm() should be > moved into lima_sched_context_queue_task and put under some mutex > together with drm_sched_push_job(). See the kerneldoc for

Re: [Intel-gfx] [PATCH 46/46] drm/i915/guc: Add delay before disabling scheduling on contexts

2021-08-12 Thread Daniel Vetter
On Tue, Aug 03, 2021 at 03:29:43PM -0700, Matthew Brost wrote: > Some workloads use lots of contexts that continually pin / unpin > contexts. With GuC submission an unpin translates to a schedule disable > H2G which puts pressure on both the i915 and GuC. A schedule disable can > also block future

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] dma-buf: Require VM_PFNMAP vma for mmap

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] dma-buf: Require VM_PFNMAP vma for mmap URL : https://patchwork.freedesktop.org/series/93639/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10478 -> Patchwork_20806 Su

Re: [Intel-gfx] [PATCH 1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications

2021-08-12 Thread Daniel Vetter
On Thu, Aug 12, 2021 at 7:24 PM Souza, Jose wrote: > > On Fri, 2021-07-30 at 17:10 -0700, José Roberto de Souza wrote: > > PSR2 selective fetch requires plane and transcoder registers to > > be programed during the vblank to properly update the display and > > there is no way around it. > > > > We

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] dma-buf: Require VM_PFNMAP vma for mmap

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] dma-buf: Require VM_PFNMAP vma for mmap URL : https://patchwork.freedesktop.org/series/93639/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4cfb224816d9 dma-buf: Require VM_PFNMAP vma for mmap -:34: WARNING:TYPO_SPELLING:

[Intel-gfx] [PATCH v5 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()

2021-08-12 Thread Juston Li
Update cp_irq_count_cached when reading messages rather than when writing a message to make sure the value is up to date and not stale from a previously handled CP_IRQ. AKE flow doesn't always respond to a read with a ACK write msg. E.g. AKE_Send_Pairing_Info will "timeout" because we received a

[Intel-gfx] [PATCH v5 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List

2021-08-12 Thread Juston Li
When reading RepeaterAuth_Send_ReceiverID_List, RxInfo is read by itself once to retrieve the DEVICE_COUNT to calculate the size of the ReceiverID list then read a second time as a part of reading ReceiverID list. On some MST docking stations, RxInfo can only be read after the RxStatus READY bit i

[Intel-gfx] [PATCH v5 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check

2021-08-12 Thread Juston Li
On some MST docking stations, rx_info can only be read after RepeaterAuth_Send_ReceiverID_List and the RxStatus READY bit is set otherwise the read will return -EIO. This behavior causes the mst stream type1 capability test to fail to read rx_info and determine if the topology supports type1 and f

[Intel-gfx] [PATCH v5 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes

2021-08-12 Thread Juston Li
Fixes to get HDCP2.2 over MST working on MST docking stations with certain behaviors that cause the current flow to fail. Tested with Dell WD-19 and Lenovo ThinkPad USB Type-C Dock Gen 2. These fixes should make the flow more robust to handle behaviors that as far as I can tell are unclear in the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Drop redundant debug print (rev3)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/display: Drop redundant debug print (rev3) URL : https://patchwork.freedesktop.org/series/93025/ State : success == Summary == CI Bug Log - changes from CI_DRM_10478 -> Patchwork_20805 Summary ---

Re: [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check

2021-08-12 Thread Li, Juston
On Thu, 2021-08-12 at 12:40 +0530, Anshuman Gupta wrote: > On 2021-08-11 at 14:23:14 -0700, Juston Li wrote: > > On some MST docking stations, rx_info can only be read after > > RepeaterAuth_Send_ReceiverID_List and the RxStatus READY bit is set > > otherwise the read will return -EIO. > > > > Thi

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN" URL : https://patchwork.freedesktop.org/series/93635/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10475_full -> Patchwork_20804_full

Re: [Intel-gfx] [PATCH 1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications

2021-08-12 Thread Souza, Jose
On Fri, 2021-07-30 at 17:10 -0700, José Roberto de Souza wrote: > PSR2 selective fetch requires plane and transcoder registers to > be programed during the vblank to properly update the display and > there is no way around it. > > We could disable PSR2 at every notification of dirty front buffer f

Re: [Intel-gfx] [PATCH 4/4] drm/vgem: use shmem helpers

2021-08-12 Thread Sam Ravnborg
Hi Daniel, On Thu, Aug 12, 2021 at 03:14:12PM +0200, Daniel Vetter wrote: > Aside from deleting lots of code the real motivation here is to switch > the mmap over to VM_PFNMAP, to be more consistent with what real gpu > drivers do. They're all VM_PFNMP, which means get_user_pages doesn't > work, a

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Tweaked Wa_14010685332 for all PCHs

2021-08-12 Thread Vudum, Lakshminarayana
Re-reported. -Original Message- From: Gupta, Anshuman Sent: Tuesday, August 10, 2021 8:23 AM To: Vudum, Lakshminarayana Cc: intel-gfx@lists.freedesktop.org Subject: Re: ✗ Fi.CI.BAT: failure for Tweaked Wa_14010685332 for all PCHs On 2021-08-10 at 13:57:29 +, Patchwork wrote: > == S

Re: [Intel-gfx] [CI 1/2] drm/i915/step: Add macro magic for handling steps

2021-08-12 Thread Srivatsa, Anusha
> -Original Message- > From: Jani Nikula > Sent: Thursday, August 12, 2021 2:59 AM > To: Srivatsa, Anusha ; intel- > g...@lists.freedesktop.org > Cc: Roper, Matthew D ; De Marchi, Lucas > > Subject: Re: [Intel-gfx] [CI 1/2] drm/i915/step: Add macro magic for handling > steps > > On Mo

[Intel-gfx] ✓ Fi.CI.IGT: success for Tweaked Wa_14010685332 for all PCHs

2021-08-12 Thread Patchwork
== Series Details == Series: Tweaked Wa_14010685332 for all PCHs URL : https://patchwork.freedesktop.org/series/93548/ State : success == Summary == CI Bug Log - changes from CI_DRM_10464_full -> Patchwork_20792_full Summary --- **SU

Re: [Intel-gfx] [v3][PATCH] drm/i915/display: Drop redundant debug print

2021-08-12 Thread Imre Deak
On Thu, Aug 12, 2021 at 06:41:07PM +0530, Swati Sharma wrote: > drm_dp_dpcd_read/write already has debug error message. > Drop redundant error messages which gives false > status even if correct value is read in drm_dp_dpcd_read(). > > v2: -Added fixes tag (Ankit) > v3: -Fixed build error (CI) >

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Implement Wa_1508744258

2021-08-12 Thread Souza, Jose
On Thu, 2021-08-12 at 09:29 +0300, Timo Aaltonen wrote: > On 12.8.2021 6.27, Timo Aaltonen wrote: > > On 9.7.2021 0.18, José Roberto de Souza wrote: > > > Same bit was required for Wa_14012131227 in DG1 now it is also > > > required as Wa_1508744258 to TGL, RKL, DG1, ADL-S and ADL-P. > > > > > > C

Re: [Intel-gfx] [PATCH 5/5] drm/i915/dp: fix for ADL_P/S and DG2 dp/edp max source rates

2021-08-12 Thread Imre Deak
On Thu, Aug 12, 2021 at 11:18:06AM +0530, Animesh Manna wrote: > Added support for platforms having DISPLAY13 like DG2, ADL_P and ADL_S. > > Bspec: 53597, 53720, 53657, 54034, 49185, 55409 > > Cc: Jani Nikula > Cc: Imre Deak > Signed-off-by: Animesh Manna Reviewed-by: Imre Deak > --- > dri

[Intel-gfx] [v4 6/7] drm/i915/dsi: Retrieve max brightness level from VBT.

2021-08-12 Thread Lee Shawn C
So far, DCS backlight driver hardcode (0xFF) for max brightness level. MIPI DCS spec allow max 0x for set_display_brightness (51h) command. And VBT brightness precision bits can support 8 ~ 16 bits. We should set correct precision bits in VBT that meet panel's request. Driver can refer to this

[Intel-gfx] [v4 7/7] drm/i915/dsi: Send proper brightness value via MIPI DCS command

2021-08-12 Thread Lee Shawn C
Driver has to swap the endian before send brightness level value to tcon. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 3 +-- 1 file changed, 1 insertion(+),

[Intel-gfx] [v4 5/7] drm/i915: Get proper min cdclk if vDSC enabled

2021-08-12 Thread Lee Shawn C
VDSC engine can process only 1 pixel per Cd clock. In case VDSC is used and max slice count == 1, max supported pixel clock should be 100% of CD clock. Then do min_cdclk and pixel clock comparison to get proper min cdclk. v2: - Check for dsc enable and slice count ==1 then allow to double confir

[Intel-gfx] [v4 4/7] drm/i915/dsi: refine send MIPI DCS command sequence

2021-08-12 Thread Lee Shawn C
According to chapter "Sending Commands to the Panel" in bspec #29738 and #49188. If driver try to send DCS long pakcet, we have to program TX payload register at first. And configure TX header HW register later. DSC long packet would not be sent properly if we don't follow this sequence. Cc: Ville

[Intel-gfx] [v4 3/7] drm/i915/dsi: wait for header and payload credit available

2021-08-12 Thread Lee Shawn C
Driver should wait for free header or payload buffer in FIFO. It would be good to wait a while for HW to release credit before give it up to write to HW. Without sending initailize command sets completely. It would caused MIPI display can't light up properly. Cc: Ville Syrjala Cc: Jani Nikula Cc

[Intel-gfx] [v4 1/7] drm/i915/dsi: send correct gpio_number on gen11 platform

2021-08-12 Thread Lee Shawn C
Transfer "gpio_nunmber" instead of "gpio_index" while doing gpio configuration in icl_exec_gpio(). Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +- 1 file changed, 1

[Intel-gfx] [v4 2/7] drm/i915/jsl: program DSI panel GPIOs

2021-08-12 Thread Lee Shawn C
DSI driver should have its own implementation to toggle gpio pins based on GPIO info coming from VBT sequences. v2: Remove redundant ICP_PP_CONTROL() define. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu

[Intel-gfx] [v4 0/7] MIPI DSI driver enhancements

2021-08-12 Thread Lee Shawn C
v2: - Check for dsc enable and slice count ==1 then allow to double confirm min cdclk value. v3: - Add two patches that fix MIPI DCS backlight control. v4: - Remove redundant ICP_PP_CONTROL() define. Lee Shawn C (7): drm/i915/dsi: send correct gpio_number on gen11 platform drm/i915/jsl: pr

Re: [Intel-gfx] [PATCH 4/5] drm/i915/dp: fix DG1 and RKL max source rates

2021-08-12 Thread Imre Deak
On Thu, Aug 12, 2021 at 11:18:05AM +0530, Animesh Manna wrote: > From: Jani Nikula > > Combo phy is limited to 5.4 GHz on low-voltage SKUs, but both eDP and DP > can do 8.1 GHz on combo phy. > > Bspec: 49182, 49205, 49202 > > Cc: Imre Deak > Signed-off-by: Jani Nikula > Signed-off-by: Animesh

[Intel-gfx] [PULL] drm-intel-fixes

2021-08-12 Thread Rodrigo Vivi
Hi Dave and Daniel, Here goes drm-intel-fixes-2021-08-12: - GVT fix for Windows VM hang. - Display fix of 12 BPC bits for display 12 and newer. - Don't try to access some media register for fused off domains. - Fix kerneldoc build warnings. Thanks, Rodrigo. The following changes since commit 36

Re: [Intel-gfx] [PATCH] drm/i915: Use locked access to ctx->engines in set_priority

2021-08-12 Thread Daniel Vetter
On Thu, Aug 12, 2021 at 5:10 PM Jason Ekstrand wrote: > On Tue, Aug 10, 2021 at 8:05 AM Daniel Vetter wrote: > > > > This essentially reverts > > > > commit 89ff76bf9b3b0b86e6bbe344bd6378d8661303fc > > Author: Chris Wilson > > Date: Thu Apr 2 13:42:18 2020 +0100 > > > > drm/i915/gem: Utili

Re: [Intel-gfx] [PATCH 3/5] drm/i915/dp: fix EHL/JSL max source rates calculation

2021-08-12 Thread Imre Deak
On Thu, Aug 12, 2021 at 11:18:04AM +0530, Animesh Manna wrote: > Only higher voltage sku can support HBR3 so a condition > check added in max source rate calculation for ehl/jsl. > > Bspec: 32247, 20598 > > Cc: Jani Nikula > Cc: Imre Deak > Signed-off-by: Animesh Manna Reviewed-by: Imre Deak

Re: [Intel-gfx] [PATCH 2/5] drm/i915/dp: fix TGL and ICL max source rates

2021-08-12 Thread Imre Deak
On Thu, Aug 12, 2021 at 11:18:03AM +0530, Animesh Manna wrote: > From: Jani Nikula > > Combo phy is limited to 5.4 GHz on low-voltage SKUs. Combo phy DP is > limited to 5.4 GHz, while combo phy eDP can do 8.1 GHz. > > Bspec: 20584, 20598, 49180, 49201 > > Cc: Imre Deak > Signed-off-by: Jani Ni

Re: [Intel-gfx] [PATCH] drm/i915: Use locked access to ctx->engines in set_priority

2021-08-12 Thread Jason Ekstrand
On Tue, Aug 10, 2021 at 8:05 AM Daniel Vetter wrote: > > This essentially reverts > > commit 89ff76bf9b3b0b86e6bbe344bd6378d8661303fc > Author: Chris Wilson > Date: Thu Apr 2 13:42:18 2020 +0100 > > drm/i915/gem: Utilize rcu iteration of context engines > > Note that the other use of __cont

Re: [Intel-gfx] [PATCH 1/5] drm/i915/dp: Fix eDP max rate for display 11+

2021-08-12 Thread Imre Deak
On Thu, Aug 12, 2021 at 11:18:02AM +0530, Animesh Manna wrote: > From: Matt Atwood > > intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to > use before intel_encoder->type is set. This causes incorrect max source > rate to be used for display 11+. On EHL and JSL, HBR3 is used

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN" URL : https://patchwork.freedesktop.org/series/93635/ State : success == Summary == CI Bug Log - changes from CI_DRM_10475 -> Patchwork_20804 ==

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Introduce Intel PXP (rev4)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev4) URL : https://patchwork.freedesktop.org/series/90503/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10474_full -> Patchwork_20802_full Summary --- **F

Re: [Intel-gfx] [PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions

2021-08-12 Thread Daniel Vetter
On Thu, Aug 12, 2021 at 4:45 PM Daniel Vetter wrote: > > On Wed, Aug 11, 2021 at 06:06:36PM +, Matthew Brost wrote: > > On Tue, Aug 10, 2021 at 11:07:55AM +0200, Daniel Vetter wrote: > > > On Tue, Aug 10, 2021 at 10:53:37AM +0200, Daniel Vetter wrote: > > > > On Mon, Aug 09, 2021 at 06:58:23PM

Re: [Intel-gfx] [V3 2/7] drm/i915/jsl: program DSI panel GPIOs

2021-08-12 Thread Lee, Shawn C
On Thu, 12 Aug 2021, Jani Nikula wrote: >On Wed, 11 Aug 2021, "Lee, Shawn C" wrote: >> On Tue, 10 Aug 2021, Jani Nikula wrote: >>>On Tue, 10 Aug 2021, "Lee, Shawn C" wrote: On Tue, 10 Aug 2021, Jani Nikula wrote: >On Fri, 23 Jul 2021, Lee Shawn C wrote: >> DSI driver should have

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add pci ids and uapi for DG1

2021-08-12 Thread Daniel Vetter
On Thu, Aug 12, 2021 at 2:44 PM Maarten Lankhorst wrote: > > DG1 has support for local memory, which requires the usage of the > lmem placement extension for creating bo's, and memregion queries > to obtain the size. Because of this, those parts of the uapi are > no longer guarded behind FAKE_LMEM

Re: [Intel-gfx] [PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions

2021-08-12 Thread Daniel Vetter
On Wed, Aug 11, 2021 at 06:06:36PM +, Matthew Brost wrote: > On Tue, Aug 10, 2021 at 11:07:55AM +0200, Daniel Vetter wrote: > > On Tue, Aug 10, 2021 at 10:53:37AM +0200, Daniel Vetter wrote: > > > On Mon, Aug 09, 2021 at 06:58:23PM +, Matthew Brost wrote: > > > > On Mon, Aug 09, 2021 at 05:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN" URL : https://patchwork.freedesktop.org/series/93635/ State : warning == Summary == $ dim checkpatch origin/drm-tip 326babe1767a Revert "drm/i915: allow DG1 autoprobe for CONFIG_BR

Re: [Intel-gfx] [PATCH 46/46] drm/i915/guc: Add delay before disabling scheduling on contexts

2021-08-12 Thread Daniel Vetter
On Wed, Aug 11, 2021 at 05:43:23PM +, Matthew Brost wrote: > On Wed, Aug 11, 2021 at 11:55:48AM +0200, Daniel Vetter wrote: > > On Mon, Aug 09, 2021 at 07:32:26PM +, Matthew Brost wrote: > > > On Mon, Aug 09, 2021 at 07:17:27PM +0200, Daniel Vetter wrote: > > > > On Tue, Aug 03, 2021 at 03:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/3] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN" URL : https://patchwork.freedesktop.org/series/93630/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10474 -> Patchwork_20803 ==

[Intel-gfx] [PATCH] drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-P

2021-08-12 Thread Jani Nikula
ADL-P supports stream splitter on pipe B in addition to pipe A. Update the sanity check in intel_ddi_mso_get_config() to reflect this, and remove the check in intel_ddi_mso_configure() as redundant with encoder->pipe_mask. Abstract the splitter pipe mask to a single point of truth while at it to av

Re: [Intel-gfx] i915 DMC Updates - TGL:v2.12 and RKL v2.03

2021-08-12 Thread Josh Boyer
Pulled and pushed out. josh On Wed, Jul 28, 2021 at 1:01 PM Srivatsa, Anusha wrote: > > Hi, > > Kindly pull these updates from i915. > > > > The following changes since commit 168452ee695b5edb9deb641059bc110b9c5e8fc7: > > > > Merge tag 'iwlwifi-fw-2021-07-19' of > git://git.kernel.org/pub/scm

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Patchwork
== Series Details == Series: series starting with [1/3] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN" URL : https://patchwork.freedesktop.org/series/93630/ State : warning == Summary == $ dim checkpatch origin/drm-tip c35f56eb2f5c Revert "drm/i915: allow DG1 autoprobe for CONFIG_BR

[Intel-gfx] [PATCH 3/4] drm/shmem-helpers: Allocate wc pages on x86

2021-08-12 Thread Daniel Vetter
intel-gfx-ci realized that something is not quite coherent anymore on some platforms for our i915+vgem tests, when I tried to switch vgem over to shmem helpers. After lots of head-scratching I realized that I've removed calls to drm_clflush. And we need those. To make this a bit cleaner use the sa

[Intel-gfx] [PATCH 4/4] drm/vgem: use shmem helpers

2021-08-12 Thread Daniel Vetter
Aside from deleting lots of code the real motivation here is to switch the mmap over to VM_PFNMAP, to be more consistent with what real gpu drivers do. They're all VM_PFNMP, which means get_user_pages doesn't work, and even if you try and there's a struct page behind that, touching it and mucking a

[Intel-gfx] [PATCH 1/4] dma-buf: Require VM_PFNMAP vma for mmap

2021-08-12 Thread Daniel Vetter
tldr; DMA buffers aren't normal memory, expecting that you can use them like that (like calling get_user_pages works, or that they're accounting like any other normal memory) cannot be guaranteed. Since some userspace only runs on integrated devices, where all buffers are actually all resident sys

[Intel-gfx] [PATCH 2/4] drm/shmem-helper: Switch to vmf_insert_pfn

2021-08-12 Thread Daniel Vetter
We want to stop gup, which isn't the case if we use vmf_insert_page and VM_MIXEDMAP, because that does not set pte_special. The motivation here is to stop get_user_pages from working on buffer object mmaps in general. Quoting some discussion with Thomas: On Thu, Jul 22, 2021 at 08:22:43PM +0200,

Re: [Intel-gfx] [PATCH v4 2/4] drm/shmem-helper: Switch to vmf_insert_pfn

2021-08-12 Thread Daniel Vetter
On Thu, Jul 22, 2021 at 08:22:43PM +0200, Thomas Zimmermann wrote: > Hi, > > I'm not knowledgeable enougth to give this a full review. If you can just > answer my questions, fell free to add an > > Acked-by: Thomas Zimmermann > > to the patch. :) > > Am 13.07.21 um 22:51 schrieb Daniel Vetter:

[Intel-gfx] [v3][PATCH] drm/i915/display: Drop redundant debug print

2021-08-12 Thread Swati Sharma
drm_dp_dpcd_read/write already has debug error message. Drop redundant error messages which gives false status even if correct value is read in drm_dp_dpcd_read(). v2: -Added fixes tag (Ankit) v3: -Fixed build error (CI) Fixes: 9488a030ac91 ("drm/i915: Add support for enabling link status and re

[Intel-gfx] [PATCH] drm/i915/display: Drop redundant debug print

2021-08-12 Thread Swati Sharma
drm_dp_dpcd_read/write already has debug error message. Drop redundant error messages which gives false status even if correct value is read in drm_dp_dpcd_read(). Fixes: 9488a030ac91 ("drm/i915: Add support for enabling link status and recovery") Cc: Swati Sharma Cc: Ankit Nautiyal Cc: Uma Sha

[Intel-gfx] [PATCH 2/2] drm/i915: Add pci ids and uapi for DG1

2021-08-12 Thread Maarten Lankhorst
DG1 has support for local memory, which requires the usage of the lmem placement extension for creating bo's, and memregion queries to obtain the size. Because of this, those parts of the uapi are no longer guarded behind FAKE_LMEM. According to the pull request referenced below, mesa should be mo

[Intel-gfx] [PATCH 1/2] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Maarten Lankhorst
This reverts commit fae352efb12196e7110f98bc1297ce533472764d. Inside core-for-CI, reverting to make next patch apply cleanly. --- drivers/gpu/drm/i915/i915_pci.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 2c1cb9b6b

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Introduce Intel PXP (rev4)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev4) URL : https://patchwork.freedesktop.org/series/90503/ State : success == Summary == CI Bug Log - changes from CI_DRM_10474 -> Patchwork_20802 Summary --- **SUCCESS**

Re: [Intel-gfx] [V3 2/7] drm/i915/jsl: program DSI panel GPIOs

2021-08-12 Thread Jani Nikula
On Wed, 11 Aug 2021, "Lee, Shawn C" wrote: > On Tue, 10 Aug 2021, Jani Nikula wrote: >>On Tue, 10 Aug 2021, "Lee, Shawn C" wrote: >>> On Tue, 10 Aug 2021, Jani Nikula wrote: On Fri, 23 Jul 2021, Lee Shawn C wrote: > DSI driver should have its own implementation to toggle gpio pins

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Introduce Intel PXP (rev4)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev4) URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./include/uapi/drm/i915_drm.h:1875: warning: This comment starts with '/**', but isn't a kernel-do

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Introduce Intel PXP (rev4)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev4) URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/displ

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce Intel PXP (rev4)

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev4) URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ dim checkpatch origin/drm-tip 65c355279252 drm/i915/pxp: Define PXP component interface -:31: WARNING:FILE_PATH_CHANGES: added, moved or delet

[Intel-gfx] [PATCH 1/3] Revert "drm/i915: allow DG1 autoprobe for CONFIG_BROKEN"

2021-08-12 Thread Maarten Lankhorst
This reverts commit fae352efb12196e7110f98bc1297ce533472764d. Inside core-for-CI, reverting to make next patch apply cleanly. --- drivers/gpu/drm/i915/i915_pci.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 2c1cb9b6b

[Intel-gfx] [PATCH 2/3] drm/i915: Add pci ids for DG1

2021-08-12 Thread Maarten Lankhorst
Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_pci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 1bbd09ad5287..93ccdc6bbd03 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH 3/3] drm/i915/topic/for-CI: Disable fake LMEM implementation

2021-08-12 Thread Maarten Lankhorst
see if anything breaks. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/Kconfig.debug | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug index e7fd3e76f8a2..f27c0b5873f7 100644 --- a/drivers/gpu/drm/i915/Kconfig.d

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Tweaked Wa_14010685332 for all PCHs

2021-08-12 Thread Anshuman Gupta
On 2021-08-10 at 22:11:58 +, Patchwork wrote: > == Series Details == > > Series: Tweaked Wa_14010685332 for all PCHs > URL : https://patchwork.freedesktop.org/series/93548/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_10464_full -> Patchwork_20792_full > ===

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Initialize unused MOCS entries to L3_WB

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/gt: Initialize unused MOCS entries to L3_WB URL : https://patchwork.freedesktop.org/series/93626/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10473 -> Patchwork_20801 Summary ---

Re: [Intel-gfx] [CI 1/2] drm/i915/step: Add macro magic for handling steps

2021-08-12 Thread Jani Nikula
On Mon, 19 Jul 2021, Anusha Srivatsa wrote: > With the addition of stepping info for > all platforms, lets use macros for handling them > and autogenerating code for all steps at a time. > > Suggested-by: Matt Roper > Cc: Lucas De Marchi > Signed-off-by: Anusha Srivatsa > Reviewed-by: Lucas De

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/gt: Initialize unused MOCS entries to L3_WB URL : https://patchwork.freedesktop.org/series/93626/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gp

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB

2021-08-12 Thread Patchwork
== Series Details == Series: drm/i915/gt: Initialize unused MOCS entries to L3_WB URL : https://patchwork.freedesktop.org/series/93626/ State : warning == Summary == $ dim checkpatch origin/drm-tip ea863ae02268 drm/i915/gt: Add support of mocs propagation -:55: CHECK:PARENTHESIS_ALIGNMENT: Ali

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fix in max source calculation for dp/edp

2021-08-12 Thread Patchwork
== Series Details == Series: Fix in max source calculation for dp/edp URL : https://patchwork.freedesktop.org/series/93622/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10472_full -> Patchwork_20800_full Summary ---

[Intel-gfx] [PATCH v6 14/15] drm/i915/pxp: black pixels on pxp disabled

2021-08-12 Thread Anshuman Gupta
When protected sufaces has flipped and pxp session is disabled, display black pixels by using plane color CTM correction. v2: - Display black pixels in async flip too. v3: - Removed the black pixels logic for async flip. [Ville] - Used plane state to force black pixels. [Ville] v4 (Daniele): upd

[Intel-gfx] [PATCH v6 13/15] drm/i915/pxp: Add plane decryption support

2021-08-12 Thread Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PXP session is enabled. 2. Buffer object is protected. v2: - Used gen fb obj user_flags instead gem_object_metadata. [Krishna] v3: - intel_pxp_gem_

[Intel-gfx] [PULL] drm-misc-fixes

2021-08-12 Thread Thomas Zimmermann
Hi Dave and Daniel, only one bug fix in this week's drm-misc-fixes. Best regards Thomas drm-misc-fixes-2021-08-12: Short summary of fixes pull: * meson: Fix colors when booting with HDR The following changes since commit e89afb51f97ae03ee246c1fd0b47e3e491266aef: drm/vmwgfx: Fix a 64bit regr

Re: [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List

2021-08-12 Thread Anshuman Gupta
On 2021-08-11 at 14:23:13 -0700, Juston Li wrote: > When reading RepeaterAuth_Send_ReceiverID_List, RxInfo is read by itself > once to retrieve the DEVICE_COUNT to calculate the size of the > ReceiverID list then read a second time as a part of reading ReceiverID > list. > > On some MST docking st

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix in max source calculation for dp/edp

2021-08-12 Thread Patchwork
== Series Details == Series: Fix in max source calculation for dp/edp URL : https://patchwork.freedesktop.org/series/93622/ State : success == Summary == CI Bug Log - changes from CI_DRM_10472 -> Patchwork_20800 Summary --- **SUCCESS

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