On Wed, 29 Sep 2021, Jani Nikula wrote:
> I must have read the series several times over without spotting the
> issue, but finally figured it out with the help of [1].
>
> Return value and check added to intel_compute_global_watermarks() in
> patch 4, and a couple of patches rebased. Seems so obvi
On 9/28/21 12:30, Matthew Auld wrote:
On 27/09/2021 16:10, Thomas Hellström wrote:
We may end up in i915_ttm_bo_destroy() in an error path before the
object is fully initialized. In that case it's not correct to call
__i915_gem_free_object(), because that function
a) Assumes the gem object ref
On Tue, Sep 28, 2021 at 11:47:51PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 28, 2021 at 11:36:51PM +0300, Lisovskiy, Stanislav wrote:
> > On Tue, Sep 28, 2021 at 10:02:34PM +0300, Ville Syrjälä wrote:
> > > On Tue, Sep 28, 2021 at 03:49:11PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Mon, Sep 2
On Thu, 23 Sep 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Let's start to reject user modes whose refresh rate is
> nowhere near the actual fixed mode refresh rate we're
> going to use. ATM we're just flat out lying to the user.
>
> We'll also pimp the connector's mode list validation
>
Display underrun in HDR mode when cursor is enabled.
RTL fix will be implemented CLKGATE_DIS_PSL_A bit 28-46520h.
As per W/A 1604331009, Disable cursor clock gating in HDR mode.
Bspec : 33451
Changes since V6:
- Address checkpatch warnings
- Bit ordering
Changes since V5:
== Series Details ==
Series: drm/i915: Update memory bandwidth formulae (rev2)
URL : https://patchwork.freedesktop.org/series/95138/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21184_full
Summary
-
We have merged such DRM definition dependencies previously through a topic
branch in order to avoid redefining inside the driver.
But yes guarding this with ifdef is good.
Reviewed-by: Manasi Navare
Manasi
-Original Message-
From: Zuo, Jerry
Sent: Tuesday, September 28, 2021 11:11 PM
== Series Details ==
Series: drm/i915: Update memory bandwidth formulae (rev2)
URL : https://patchwork.freedesktop.org/series/95138/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21184
Summary
---
== Series Details ==
Series: i915/display: split and constify vtable, again
URL : https://patchwork.freedesktop.org/series/95184/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21183_full
Summary
The formulae has been updated to include more variables. Make
sure the code carries the same.
Bspec: 64631
v2: Make GEN11 follow the default route and fix calculation of
maxdebw(RK)
Cc: Ville Syrjälä
Suggested-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/di
== Series Details ==
Series: drm/locking: add backtrace for locking contended locks without backoff
URL : https://patchwork.freedesktop.org/series/95182/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21182_full
==
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev2)
URL : https://patchwork.freedesktop.org/series/95122/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21181_full
Summa
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from ./drivers/gpu/d
On Tue, Sep 28, 2021 at 04:33:24PM -0700, John Harrison wrote:
> On 9/28/2021 15:33, Matthew Brost wrote:
> > On Tue, Sep 28, 2021 at 03:20:42PM -0700, John Harrison wrote:
> > > On 8/20/2021 15:44, Matthew Brost wrote:
> > > > For some users of multi-lrc, e.g. split frame, it isn't safe to preempt
== Series Details ==
Series: i915/display: split and constify vtable, again
URL : https://patchwork.freedesktop.org/series/95184/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21183
Summary
---
**S
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
(rev2)
URL : https://patchwork.freedesktop.org/series/95164/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21180_full
==
== Series Details ==
Series: i915/display: split and constify vtable, again
URL : https://patchwork.freedesktop.org/series/95184/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
25d35099ae19 drm/i915/uncore: split the fw get function into separate vfunc
5f03d3269e3b drm/i915/pm:
On 9/28/2021 15:33, Matthew Brost wrote:
On Tue, Sep 28, 2021 at 03:20:42PM -0700, John Harrison wrote:
On 8/20/2021 15:44, Matthew Brost wrote:
For some users of multi-lrc, e.g. split frame, it isn't safe to preempt
mid BB. To safely enable preemption at the BB boundary, a handshake
between to
== Series Details ==
Series: drm/locking: add backtrace for locking contended locks without backoff
URL : https://patchwork.freedesktop.org/series/95182/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21182
== Series Details ==
Series: drm/locking: add backtrace for locking contended locks without backoff
URL : https://patchwork.freedesktop.org/series/95182/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
420743808c1f drm/locking: add backtrace for locking contended locks without
b
From: Dave Airlie
Use a nop table for the cases where CxSR doesn't init properly.
v2: use a nop table (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 34 -
drivers/gpu/drm/i915/i915_drv.h
From: Dave Airlie
I used a macro to avoid making any really silly mistakes here.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 78 +++--
2 files changed
From: Dave Airlie
Make nice clear tables instead of having things in two places.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 81
drivers/gpu/drm/i915/i915_drv.h | 2 +-
2
From: Dave Airlie
There was some excess comments and an unused vtbl ptr.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/
From: Dave Airlie
This is a bit of a twisty one since each platform is slightly
different, so might take some more review care.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 300 ++---
drivers/g
From: Dave Airlie
Most the dpll vtable into read-only memory.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +--
drivers/gpu/drm/i915/display/intel_dpll.c| 48
drivers/gpu/drm/i915
From: Dave Airlie
Move the functions into read-only tables.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c | 43 ++
drivers/gpu/drm/i915/i915_drv.h| 2 +-
2 files changed, 28 inser
From: Dave Airlie
This clarifies quite well what functions get used on what platforms
instead of having to decipher the old tree.
v2: fixed IVB mistake (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 138
From: Dave Airlie
Use a macro to avoid mistakes, this type of macro is only used
in a couple of places.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +--
drivers/gpu/drm/i915/i915_drv.h | 2
From: Dave Airlie
Put the vtable into ro memory.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fdi.c | 20
drivers/gpu/drm/i915/i915_drv.h | 2 +-
2 files changed, 17 insertions(+), 5 delet
From: Dave Airlie
this single function might be possible to merge later, but
for now it's simple to just split it out.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
drivers/gpu/drm/i915/display/int
From: Dave Airlie
It may make sense to merge this with display again later,
however the fdi use of the vtable is limited to only a
few generations.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fdi.c | 8
drive
From: Dave Airlie
This provide a service from irq to display, so make it separate
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hotplug.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 9 -
drivers/gp
From: Dave Airlie
This moves all the cdclk related functions into their own vtable.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 142 ++---
drivers/gpu/drm/i915/i915_drv.h| 8 +-
From: Dave Airlie
These are only used internally in the audio code
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c | 24 +++---
drivers/gpu/drm/i915/i915_drv.h| 19 +++--
2 f
From: Dave Airlie
These are only used internally in the color module
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 64 +++---
drivers/gpu/drm/i915/i915_drv.h| 39 +++--
2 fil
From: Dave Airlie
These are the watermark api between display and pm.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 34 -
drivers/gpu/drm/i915/i915_drv.h | 24
driver
From: Dave Airlie
This function is only used inside intel_pm.c
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 9 ++-
drivers/gpu/drm/i915/intel_pm.c | 48 -
2 files changed, 32 insertio
From: Dave Airlie
This wraps the fdi link training vfunc to make it clearer.
Suggested by Jani.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 8
From: Dave Airlie
This adds wrappers around all the vtable callers so they are in
one place.
Suggested by Jani.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 47 +++
drivers/gpu/drm/i915/dis
From: Dave Airlie
This moves one wrapper from the pm->display side, and creates
wrappers for all the others, this should simplify things later.
One thing to note is that the code checks the existance of some
of these ptrs, so the wrappers are a bit complicated by that.
Suggested by Jani.
v2: f
From: Dave Airlie
The crtc was never being used here.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c
From: Dave Airlie
The i845_update_wm code was always calling the i845 variant,
and the i9xx_update_wm had only a choice between i830 and i9xx
paths, hardly worth the vfunc overhead.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_d
From: Dave Airlie
constify it while here. drop the put function since it was never
overloaded and always has done the same thing, no point in
indirecting it for show.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_uncore.c | 70 +
I must have read the series several times over without spotting the
issue, but finally figured it out with the help of [1].
Return value and check added to intel_compute_global_watermarks() in
patch 4, and a couple of patches rebased. Seems so obvious now...
Fingers crossed.
BR,
Jani.
[1]
http
On Tue, Sep 28, 2021 at 03:20:42PM -0700, John Harrison wrote:
> On 8/20/2021 15:44, Matthew Brost wrote:
> > For some users of multi-lrc, e.g. split frame, it isn't safe to preempt
> > mid BB. To safely enable preemption at the BB boundary, a handshake
> > between to parent and child is needed. Th
== Series Details ==
Series: drm/i915: Stop force enabling pipe bottom color gammma/csc
URL : https://patchwork.freedesktop.org/series/95171/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21179_full
If drm_modeset_lock() returns -EDEADLK, the caller is supposed to drop
all currently held locks using drm_modeset_backoff(). Failing to do so
will result in warnings and backtraces on the paths trying to lock a
contended lock. Add support for optionally printing the backtrace on the
path that hit t
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev2)
URL : https://patchwork.freedesktop.org/series/95122/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21181
Summary
---
On 8/20/2021 15:44, Matthew Brost wrote:
For some users of multi-lrc, e.g. split frame, it isn't safe to preempt
mid BB. To safely enable preemption at the BB boundary, a handshake
between to parent and child is needed. This is implemented via custom
emit_bb_start & emit_fini_breadcrumb functions
[AMD Official Use Only]
> -Original Message-
> From: Harry Wentland
> Sent: September 28, 2021 1:08 PM
> To: Deucher, Alexander ; amd-
> g...@lists.freedesktop.org; Zuo, Jerry
> Cc: jani.nik...@intel.com; Li, Sun peng (Leo) ;
> nat...@kernel.org; intel-gfx@lists.freedesktop.org; dri-
> d
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev2)
URL : https://patchwork.freedesktop.org/series/95122/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/g
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev2)
URL : https://patchwork.freedesktop.org/series/95122/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
be9a7b3627c4 drm/i915: s/ddi_translations/trans/
-:1808: WARNING:LONG_LINE: line length of 102
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
(rev2)
URL : https://patchwork.freedesktop.org/series/95164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21180
On 2021-09-28 11:02, Sean Paul wrote:
On Tue, Sep 21, 2021 at 07:25:41PM -0700, abhin...@codeaurora.org
wrote:
On 2021-09-15 13:38, Sean Paul wrote:
> From: Sean Paul
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
> helpers.
>
> Cc: Stephen Boyd
> Signed-off-by: S
Hi Sean
On 2021-09-28 10:33, Sean Paul wrote:
On Tue, Sep 21, 2021 at 04:34:59PM -0700, abhin...@codeaurora.org
wrote:
On 2021-09-15 13:38, Sean Paul wrote:
> From: Sean Paul
>
> This patch expands upon the HDCP helper library to manage HDCP
> enable, disable, and check.
>
> Previous to this p
On 2021-09-28 11:06, Sean Paul wrote:
On Tue, Sep 21, 2021 at 07:30:29PM -0700, abhin...@codeaurora.org
wrote:
Hi Sean
On 2021-09-15 13:38, Sean Paul wrote:
> From: Sean Paul
>
> Hello again,
> This is the second version of the HDCP helper patchset. See version 1
> here: https://patchwork.free
From: Ville Syrjälä
Adjust the link training code to accommodate per-lane drive settings,
if supported by the platform. Actually enabling this will involve
some changes to each platform's .set_signal_level() implementation,
so for the moment all supported platforms will keep using the current
cod
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
(rev2)
URL : https://patchwork.freedesktop.org/series/95164/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked sep
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
(rev2)
URL : https://patchwork.freedesktop.org/series/95164/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5ad853d0cb0d drm/amd/display: Only define DP 2.0 symbols if not already de
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from ./drivers/gpu/d
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21178_full
==
On Tue, 2021-09-28 at 13:00 -0700, Doug Anderson wrote:
> Hi,
>
>
> I'm not sure I understand the comment above. You say "enabled/disabled
> via PWM" and that doesn't make sense w/ my mental model. Normally I
> think of a PWM allowing you to adjust the brightness and there being a
> separate GPIO
On Tue, 2021-09-28 at 23:38 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 11:29:49PM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 23:08 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
>
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> The PHY ownership release->AUX PW disable steps during a modeset
> disable->PHY disconnect sequence can hang the system if the PHY
> disconnect happens after disabling the PHY's PLL. The spec doesn't
> require a specific order for these two step
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> After the previous patch the driver holds a power domain blocking
> TC-cold whenever the port is locked, so we can remove the extra blocking
> around the lock/unlock sequence.
Reviewed-by: José Roberto de Souza
>
> Cc: José Roberto de Souza
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> So far TC-cold was blocked only for the duration of TypeC mode resets.
> The DP-alt and legacy modes require TC-cold to be blocked also whenever
> the port is in use (AUX transfers, enable modeset), and this was ensured
> by the held PHY ownersh
On Tue, 2021-09-28 at 13:52 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 01:02:21AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > While a TypeC port mode is locked a DISPLAY_CORE power domain reference
> > > is held, which implies a runtime PM ref. By
On 8/20/2021 15:44, Matthew Brost wrote:
Add very basic (single submission) multi-lrc selftest.
Signed-off-by: Matthew Brost
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 +
.../drm/i915/gt/uc/selftest_guc_multi_lrc.c | 180 ++
.../drm/i915/selftests/i915_live_se
On Tue, Sep 28, 2021 at 11:36:51PM +0300, Lisovskiy, Stanislav wrote:
> On Tue, Sep 28, 2021 at 10:02:34PM +0300, Ville Syrjälä wrote:
> > On Tue, Sep 28, 2021 at 03:49:11PM +0300, Lisovskiy, Stanislav wrote:
> > > On Mon, Sep 27, 2021 at 10:24:11PM -0700, Matt Roper wrote:
> > > > On Mon, Sep 27,
On Tue, Sep 28, 2021 at 11:29:49PM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 23:08 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > > > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose
On Tue, Sep 28, 2021 at 10:02:34PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 28, 2021 at 03:49:11PM +0300, Lisovskiy, Stanislav wrote:
> > On Mon, Sep 27, 2021 at 10:24:11PM -0700, Matt Roper wrote:
> > > On Mon, Sep 27, 2021 at 09:29:07PM +0300, Ville Syrjälä wrote:
> > > > On Mon, Sep 27, 2021 at
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
> using the legacy AUX power domain. To avoid the timeouts that this would
> cause during PHY disconnect/reconnect sequences (which will be more
> frequent after a follow-up cha
On Tue, 2021-09-28 at 23:08 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > > > [...]
> > > > > > Would not be possible to use TC
== Series Details ==
Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
(rev2)
URL : https://patchwork.freedesktop.org/series/95127/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21177_full
===
== Series Details ==
Series: drm/i915: Stop force enabling pipe bottom color gammma/csc
URL : https://patchwork.freedesktop.org/series/95171/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21179
Summary
--
On Tue, Sep 28, 2021 at 11:02:37PM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > > [...]
> > > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > > disconnected and drop
On Tue, 2021-09-28 at 22:55 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > > [...]
> > > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> > >
> > > TC_PORT_DISCONNECT
Hi,
On Mon, Sep 27, 2021 at 1:12 PM Lyude Paul wrote:
>
> @@ -3305,11 +3313,10 @@ EXPORT_SYMBOL(drm_edp_backlight_enable);
> * @bl: Backlight capability info from drm_edp_backlight_init()
> *
> * This function handles disabling DPCD backlight controls on a panel over
> AUX. Note that some
On Tue, Sep 28, 2021 at 10:45:50PM +0300, Souza, Jose wrote:
> > > [...]
> > > Would not be possible to use TC_PORT_DISCONNECTED when really
> > > disconnected and dropping the use of TC_PORT_TBT_ALT for it?
> >
> > TC_PORT_DISCONNECTED is the state when the PHY ownership is not held and
> > we do
On Tue, 2021-09-28 at 22:34 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 10:18:25PM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 00:46 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
>
On Tue, Sep 28, 2021 at 10:18:25PM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 00:46 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > A follow-up change will start to disconnect/re-connec
On 2021-09-27 15:23, Fangzhi Zuo wrote:
> Include FEC, DSC, Link Training related headers.
>
> Change since v2
> - Align with the spec for DP_DSC_SUPPORT_AND_DSC_DECODER_COUNT
>
> Signed-off-by: Fangzhi Zuo
Reviewed-by: Harry Wentland
Harry
> ---
> This patch is based on top of the other DP2
On Tue, 2021-09-28 at 00:46 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > A follow-up change will start to disconnect/re-connect PHYs around AUX
> > > transfers and modeset enable/disables. To pre
On Tue, Sep 28, 2021 at 02:35:06PM +, Wang, Zhi A wrote:
> Yes. I was thinking of the possibility of putting off some work later so
> that we don't need to make a lot of changes. GVT-g needs to take a
> snapshot of GPU registers as the initial virtual states for other vGPUs,
> which require
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21178
Su
On Tue, Sep 28, 2021 at 03:49:11PM +0300, Lisovskiy, Stanislav wrote:
> On Mon, Sep 27, 2021 at 10:24:11PM -0700, Matt Roper wrote:
> > On Mon, Sep 27, 2021 at 09:29:07PM +0300, Ville Syrjälä wrote:
> > > On Mon, Sep 27, 2021 at 11:23:35AM -0700, Matt Roper wrote:
> > > > On Thu, Sep 23, 2021 at 06
From: Ville Syrjälä
While sanitizing the hardware state we're currently forcing
the pipe bottom color legacy csc/gamma bits on. That is not a
good idea as BIOSen are likely to leave gabage in the LUTs and
so doing this causes ugly visual glitches if and when the
planes covering the background get
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b1d56d1bac26 drm/amd/display: Only define DP 2.0 symbols if not already defined
-:
== Series Details ==
Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
(rev2)
URL : https://patchwork.freedesktop.org/series/95127/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21177
=
On Tue, Sep 21, 2021 at 07:30:29PM -0700, abhin...@codeaurora.org wrote:
> Hi Sean
>
> On 2021-09-15 13:38, Sean Paul wrote:
> > From: Sean Paul
> >
> > Hello again,
> > This is the second version of the HDCP helper patchset. See version 1
> > here: https://patchwork.freedesktop.org/series/94623
== Series Details ==
Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
(rev2)
URL : https://patchwork.freedesktop.org/series/95127/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
On Tue, Sep 21, 2021 at 07:25:41PM -0700, abhin...@codeaurora.org wrote:
> On 2021-09-15 13:38, Sean Paul wrote:
> > From: Sean Paul
> >
> > This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
> > helpers.
> >
> > Cc: Stephen Boyd
> > Signed-off-by: Sean Paul
> > Link:
> >
On Tue, Sep 21, 2021 at 04:34:59PM -0700, abhin...@codeaurora.org wrote:
> On 2021-09-15 13:38, Sean Paul wrote:
> > From: Sean Paul
> >
> > This patch expands upon the HDCP helper library to manage HDCP
> > enable, disable, and check.
> >
> > Previous to this patch, the majority of the state ma
Include FEC, DSC, Link Training related headers.
Change since v2
- Align with the spec for DP_DSC_SUPPORT_AND_DSC_DECODER_COUNT
Signed-off-by: Fangzhi Zuo
---
This patch is based on top of the other DP2.0 work in
"drm/dp: add LTTPR DP 2.0 DPCD addresses"
---
include/drm/drm_dp_helper.h | 20 +++
== Series Details ==
Series: refactor the i915 GVT support (rev2)
URL : https://patchwork.freedesktop.org/series/93816/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10654_full -> Patchwork_21176_full
Summary
---
**S
On 9/28/21 2:00 PM, Luis Chamberlain wrote:
> On Tue, Sep 28, 2021 at 07:41:00AM +, Wang, Zhi A wrote:
>> Hey guys:
>>
>> After some investigation, I found the root cause this problem ("i915"
>> module loading will be stuck with Christoph's refactor patches), which
>> can be reproduced by build
== Series Details ==
Series: refactor the i915 GVT support (rev2)
URL : https://patchwork.freedesktop.org/series/93816/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10654 -> Patchwork_21176
Summary
---
**SUCCESS**
== Series Details ==
Series: refactor the i915 GVT support (rev2)
URL : https://patchwork.freedesktop.org/series/93816/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6ed5d9205804 refactor the i915 GVT support
-:48: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit descrip
1 - 100 of 114 matches
Mail list logo
