On Mon, 2021-10-11 at 12:40 -0700, Matthew Brost wrote:
> The hangcheck selftest blows on DG1 CI and aborts the BAT run.
> Investigation is underway to root cause the failure but in the
> meantime
> disable to this test on DG1 to unblock CI.
>
> Signed-off-by: Matthew Brost
Reviewed-by: Thomas
On Wed, 2021-10-20 at 12:21 -0700, Matthew Brost wrote:
> Use __release_guc_id (lock held) rather than release_guc_id (acquires
> lock), add lockdep annotations.
>
> 213.280129] i915: Running i915_perf_live_selftests/live_noa_gpr
> [ 213.283459]
> [
On Wed, 2021-10-20 at 13:34 -0700, John Harrison wrote:
> On 10/11/2021 10:57, Matthew Brost wrote:
> > perf_parallel_engines is micro benchmark to test i915 request
> > scheduling. The test creates a thread per physical engine and
> > submits
> > NOP requests and waits the requests to complete in
== Series Details ==
Series: drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS
URL : https://patchwork.freedesktop.org/series/96096/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS
URL : https://patchwork.freedesktop.org/series/96096/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2bdec9c1bda4 drm/dp: Rename DPCD 248h according to DP 2.0 specs
-:9:
Use DP 2.0 DPCD 248h new name (LINK_QUAL_PATTERN_SELECT) and rename selected
phy test patterns to LINK_QUAL_PATTERN_*
Note: TPS4 LT pattern is CP2520 Pattern 3 (refer to DP2.0 spaces Table 3-11,
DPCD 00248h
LINK_QUAL_PATTERN_SELECT, and DP PHY 1.4 CTS - Appendix A - Compliance EYE
Use the new definition of DPCD 248h (DP_LINK_QUAL_PATTERN_SELECT)
No functional changes.
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Khaled Almahallawy
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Update selected phy test pattern names to use the new names/definitions of DPCD
248h in DP2.0/drm_dp_helpers.h
No functional changes
Cc: Manasi Navare
CC: Jani Nikula
Cc: Imre Deak
Signed-off-by: Khaled Almahallawy
---
drivers/gpu/drm/i915/display/intel_dp.c | 12 ++--
1 file
DPCD 248h name was changed from “PHY_TEST_PATTERN” in DP 1.4 to
“LINK_QUAL_PATTERN_SELECT” in DP 2.0.
Also, DPCD 248h [6:0] is the same as DPCDs 10Bh/10Ch/10Dh/10Eh [6:0]. So
removed the repeated definition of PHY patterns.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description
This series updates DPCD 248h register name and PHY test patterns names to
follow DP 2.0 Specs.
Also updates the DP PHY CTS codes of the affected drivers (i915, amd, msm)
No functional changes expected.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency”
== Series Details ==
Series: drm/i915/guc: Set all engine props values for GuC virtual engines
URL : https://patchwork.freedesktop.org/series/96085/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10766_full -> Patchwork_21397_full
== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10766_full -> Patchwork_21396_full
On Fri, Oct 01, 2021 at 02:52:41PM -0300, Jason Gunthorpe wrote:
> This addresses Cornelia's remark on the earlier patch that ccw has a
> confusing lifecycle. While it doesn't seem like the original attempt was
> functionally wrong, the result can be made better with a lot of further
> work.
>
>
== Series Details ==
Series: drm/i915: (near)atomic gamma LUT updates via vblank workers
URL : https://patchwork.freedesktop.org/series/96089/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10767 -> Patchwork_21399
Summary
Hi all,
On Tue, 5 Oct 2021 10:23:23 +0200 Christian König
wrote:
>
> Am 05.10.21 um 09:59 schrieb Stephen Rothwell:
> >
> > After merging the drm-misc tree, today's linux-next build (htmldocs)
> > produced this warning:
> >
> > include/linux/dma-buf.h:456: warning: Function parameter or member
== Series Details ==
Series: drm/i915: (near)atomic gamma LUT updates via vblank workers
URL : https://patchwork.freedesktop.org/series/96089/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/i915: (near)atomic gamma LUT updates via vblank workers
URL : https://patchwork.freedesktop.org/series/96089/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
889072d8ac0e drm/i915: Move function prototypes to the correct header
0b7c1b5f5243
== Series Details ==
Series: drm/i915/execlists: Weak parallel submission support for execlists
URL : https://patchwork.freedesktop.org/series/96088/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10767 -> Patchwork_21398
== Series Details ==
Series: drm/i915: Simplify handling of modifiers (rev12)
URL : https://patchwork.freedesktop.org/series/95579/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10765_full -> Patchwork_21393_full
Summary
From: Fangzhi Zuo
[Why]
configure/call DC interface for DP2 mst support. This is needed to make DP2
mst work.
[How]
- add encoding type, logging, mst update/reduce payload functions
Use the link encoding to determine the DP type (1.4 or 2.0) and add a
flag to dc_stream_update to determine
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP. Real data transmission
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP. Real data transmission
This code path is used during commit, and we dont expect things to fail
during the commit stage, so remove this.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git
[Why]
Add DP2 MST and debugfs support
[How]
Update the slot info based on the link encoding format
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 ++
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +
== Series Details ==
Series: drm/i915/guc: Set all engine props values for GuC virtual engines
URL : https://patchwork.freedesktop.org/series/96085/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10766 -> Patchwork_21397
On Mon, Sep 13, 2021 at 05:44:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that the bigjoiner state readout/computation has been
> made to do the right thing nuke the related state checker
> quirk.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
>
On Mon, Sep 13, 2021 at 05:44:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Try to make bigjoiner pipes less special.
>
> The main things here are that each pipe now does full
> clock computation/readout with its own shared_dpll reference.
> Also every pipe's cpu_transcoder always
== Series Details ==
Series: drm/i915/guc: Fix recursive lock in GuC submission (rev2)
URL : https://patchwork.freedesktop.org/series/96076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10765_full -> Patchwork_21392_full
== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10766 -> Patchwork_21396
Summary
== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0af9d48ba766 drm/i915: Reject planar formats when doing async flips
d6008f7429e8 drm/i915:
== Series Details ==
Series: drm/i915/guc/slpc: Implement waitboost for SLPC
URL : https://patchwork.freedesktop.org/series/96082/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10766 -> Patchwork_21394
Summary
---
From: Ville Syrjälä
The pipe gamma registers are single buffered so they should only
be updated during the vblank to avoid screen tearing. In fact they
really should only be updated between start of vblank and frame
start because that is the only time the pipe is guaranteed to be
empty. Already
From: Ville Syrjälä
We have to bash in a lot of registers to load the higher
precision LUT modes. The locking overhead is significant, especially
as we have to get this done as quickly as possible during vblank.
So let's switch to unlocked accesses for these. Fortunately the LUT
registers are
From: Ville Syrjälä
Finally got around to refreshing my vblank worker gamma LUT series.
Since I started this (ahem, some years ago) Lyude took over the
actual vblank worker implementation, mostly rewrote it I think,
and landed it for use in nouveau. So now I'm just left with the
easy task of
From: Ville Syrjälä
Do the vrr push before we sample the frame counter to
know when the commit has been latched. Doing these in the
wrong order could lead us to complete the flip before it
has actually happened.
Cc: Manasi Navare
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
A bunch of function prototypes were left behind when the
plane/crtc code got reshuffled to new files. Move the
prototypes as well.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crtc.h | 5 +
drivers/gpu/drm/i915/display/intel_psr.c| 2 +-
== Series Details ==
Series: series starting with [1/4] drm: Remove slot checks in dp mst topology
during commit (rev3)
URL : https://patchwork.freedesktop.org/series/96079/
State : failure
== Summary ==
Applying: drm: Remove slot checks in dp mst topology during commit
Applying: drm: Update
On Tue, 2021-10-19 at 15:01 +0300, Ville Syrjälä wrote:
> On Tue, Oct 19, 2021 at 02:52:15PM +0300, Jani Nikula wrote:
> > On Mon, 19 Jul 2021, Khaled Almahallawy <
> > khaled.almahall...@intel.com> wrote:
> > > Bits 20:19 are used to set CP2520 Patterns 1/2/3 (refer to
> > > Specs:50484).
> > >
== Series Details ==
Series: drm/i915/guc/slpc: Implement waitboost for SLPC
URL : https://patchwork.freedesktop.org/series/96082/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0eb920836a06 drm/i915/guc/slpc: Define and initialize boost frequency
cda3c12346d8
A weak implementation of parallel submission (multi-bb execbuf IOCTL) for
execlists. Doing as little as possible to support this interface for
execlists - basically just passing submit fences between each request
generated and virtual engines are not allowed. This is on par with what
is there for
On Tue, 2021-10-19 at 21:09 +0300, Ville Syrjälä wrote:
> On Tue, Oct 05, 2021 at 10:40:14PM -0400, Lyude Paul wrote:
> > This simply adds proper support for panel backlights that can be
> > controlled
> > via VESA's backlight control protocol, but which also require that we
> > enable and disable
Set all engine props values for GuC virtual engines as a request can
point to a virtual engine with GuC submission and these props are used
all over the driver. This differs from execlists where a request can
only point to a virtual engine.
Signed-off-by: Matthew Brost
---
From: Ville Syrjälä
Chop i9xx_plane_update() into two halves. Fist half becomes
the _noarm() variant, second part the _arm() variant.
Fortunately I have already previously grouped the register
writes into roughtly the correct order, so the split looks
surprisingly clean.
One slightly
== Series Details ==
Series: drm/i915: Simplify handling of modifiers (rev12)
URL : https://patchwork.freedesktop.org/series/95579/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10765 -> Patchwork_21393
Summary
---
On 10/11/2021 10:57, Matthew Brost wrote:
perf_parallel_engines is micro benchmark to test i915 request
scheduling. The test creates a thread per physical engine and submits
NOP requests and waits the requests to complete in a loop. In execlists
mode this works perfectly fine as powerful CPU has
On Wed, 2021-10-20 at 05:49 +, Patchwork wrote:
> Patch Details
> Series: series starting with [1/2] drm/i915/display: Rename
> POWER_DOMAIN_DPLL_DC_OFF to POWER_DOMAIN_DC_OFF
> URL: https://patchwork.freedesktop.org/series/96039/
> State:failure
> Details:
>
== Series Details ==
Series: drm/i915: Simplify handling of modifiers (rev12)
URL : https://patchwork.freedesktop.org/series/95579/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
On Mon, Sep 13, 2021 at 05:44:38PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Read out cpu_transcoder correctly for the bigjoiner slave pipes.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 66
== Series Details ==
Series: drm/i915: Simplify handling of modifiers (rev12)
URL : https://patchwork.freedesktop.org/series/95579/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
78f3fdfcbe6d drm/i915: Add a table with a descriptor for all i915 modifiers
-:30:
== Series Details ==
Series: drm/i915/guc: Fix recursive lock in GuC submission (rev2)
URL : https://patchwork.freedesktop.org/series/96076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10765 -> Patchwork_21392
Summary
On Wed, Oct 20, 2021 at 3:50 PM Bhawanpreet Lakha
wrote:
>
> From: Fangzhi Zuo
Please include a patch description.
Alex
>
> Signed-off-by: Fangzhi Zuo
> ---
> drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
> drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
>
Add a helper to sort through the SLPC/RPS cases of get/set methods.
Boost frequency will be modified as long as it is within the constraints
of RP0 and if it is different from the existing one. We will set min
freq to boost only if there is an active waiter.
Signed-off-by: Vinay Belgaumkar
---
Add helpers in RPS code for handling SLPC and non-SLPC cases.
When a boost is requested in the SLPC case, we can ask GuC to ramp
up the frequency by setting the minimum frequency to RP0. Reset the
frequency back to the min softlimit when there are no more waiters.
Signed-off-by: Vinay Belgaumkar
Boost frequency is initialized at RP0. Also define num_waiters
which can track the pending boost requests. This is set to 0 when
we enable SLPC.
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 10 ++
Waitboost is a legacy feature implemented in the Host Turbo algorithm. This
patch set implements it for the SLPC path. A "boost" happens when user
calls gem_wait ioctl on a submission that has not landed on HW yet. GT
frequency gets temporarily bumped to RP0 to allow the previous request
to finish
Instead of open-coding the checks add functions for this, simplifying
the handling of CCS modifiers on future platforms.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 24 +++
Future platforms change the location of CCS AUX planes in CCS
framebuffers, so add intel_fb_is_ccs_aux_plane() to query for these
planes independently of the platform. This function can be used
everywhere instead of is_ccs_plane() (or is_ccs_plane() && !cc_plane()),
since all the callers are only
On future platforms the index of the color-clear plane will change from
the one used by the GEN12 RC CCS CC modifier, so add a way to retrieve
the index independently of the platform/modifier.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
CCS CC planes are quite different from CCS AUX planes, even though we
regard the CC planes as a linear buffer having a 64 byte stride. Thus
it's clearer to check for either CCS plane types explicitly when we need
to handle them; add the required CCS CC planes check here, while the
next patch will
This function is only used by intel_fb.c, so unexport it.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/intel_fb.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff
Move the function to intel_fb.c and rename it adding the intel_fb_
prefix following the naming of exported functions.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
.../drm/i915/display/intel_display_types.h| 9 --
Move intel_format_info_is_yuv_semiplanar() to intel_fb.c . The number of
planes for YUV semiplanar formats using CCS modifiers will change on
future platforms. We can use the modifier descriptors to simplify
getting the plane numbers for all modifiers, prepare for that here.
Cc: Juha-Pekka
Add a tiling atttribute to the modifier descriptor, which let's us
get the tiling without listing the modifiers twice.
v1-v2: Unchanged.
v3:
- Initialize .tiling to I915_TILING_NONE explicitly (Ville)
- Move from previous patch lookup_modifier() to here, where it's first
used.
Cc: Juha-Pekka
Add a table describing all the framebuffer modifiers used by i915 at one
place. This has the benefit of deduplicating the listing of supported
modifiers for each platform and checking the support of these modifiers
on a given plane. This also simplifies in a similar way getting some
attribute for
Checking the modifiers that support interlacing makes the condition
simpler and avoids us having to add new modifiers to the list (presuming
all/most of the new modifiers won't support interlacing).
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
Move the function retrieving the format override information for a given
format/modifier to intel_fb.c. We can store a pointer to the format list
in each modifier's descriptor instead of the corresponding switch/case
logic, avoiding the listing of the modifiers twice.
v1: Unchanged.
v2: Handle
This is v4 of [1] addressing review comments from Jani and Ville in
patch 1 and 9.
[1] https://patchwork.freedesktop.org/series/95579/
Cc: Juha-Pekka Heikkila
Cc: Ville Syrjälä
Cc: Jani Nikula
Imre Deak (11):
drm/i915: Add a table with a descriptor for all i915 modifiers
drm/i915: Move
On Wed, Oct 20, 2021 at 08:40:05AM -0700, Lucas De Marchi wrote:
> On Fri, Mar 26, 2021 at 06:55:03AM +0100, Christoph Hellwig wrote:
> > Add a helper that calls remap_pfn_range for an struct io_mapping, relying
> > on the pgprot pre-validation done when creating the mapping instead of
> > doing
Awesome! So this all looks fine to me, just some formatting changes:
On Wed, 2021-10-20 at 10:16 -0400, Bhawanpreet Lakha wrote:
> 8b/10b encoding format requires to reserve the first slot for
> recording metadata. Real data transmission starts from the second slot,
> with a total of available 63
On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote:
> On Tue, 19 Oct 2021, José Roberto de Souza wrote:
> > The constant platform display version is not using this new struct but
> > the runtime variant will definitely use it.
>
> Cc: Some more folks to hijack this thread. Sorry! ;)
>
> We
Use __release_guc_id (lock held) rather than release_guc_id (acquires
lock), add lockdep annotations.
213.280129] i915: Running i915_perf_live_selftests/live_noa_gpr
[ 213.283459]
[ 213.283462] WARNING: possible recursive locking detected
{{[
Reviewed-by: Lyude Paul
On Wed, 2021-10-20 at 10:16 -0400, Bhawanpreet Lakha wrote:
> This code path is used during commit, and we dont expect things to fail
> during the commit stage, so remove this.
>
> Signed-off-by: Bhawanpreet Lakha
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 6
On Wed, 2021-10-20 at 15:00 +, Yokoyama, Caz wrote:
> On Tue, 2021-10-19 at 17:23 -0700, José Roberto de Souza wrote:
> > Adding a structure to standardize access to IP versioning as future
> > platforms will have this information populated at runtime.
> >
> > The constant platform display
== Series Details ==
Series: drm/i915/guc: Fix recursive lock in GuC submission
URL : https://patchwork.freedesktop.org/series/96076/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK
Use __release_guc_id (lock held) rather than release_guc_id (acquires
lock), add lockdep annotations.
213.280129] i915: Running i915_perf_live_selftests/live_noa_gpr
[ 213.283459]
[ 213.283462] WARNING: possible recursive locking detected
{{[
[Why]
Add DP2 MST and debugfs support
[How]
Update the slot info based on the link encoding format
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 ++
This code path is used during commit, and we dont expect things to fail
during the commit stage, so remove this.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP. Real data transmission
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +
i915 buddy selftests will be moved to drm selftest folder,
hence the config condition check may be removed.
Signed-off-by: Arunpravin
---
drivers/gpu/drm/drm_buddy.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
for instance, if driver requests address at a low specific
Remove i915 buddy references and add DRM buddy
functions
Signed-off-by: Arunpravin
---
drivers/gpu/drm/i915/Makefile | 1 -
drivers/gpu/drm/i915/i915_module.c| 3 -
drivers/gpu/drm/i915/i915_scatterlist.c | 11 +--
- Add res cursor support for drm buddy
- Replace if..else statement with switch case statement
Signed-off-by: Arunpravin
---
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h| 97 +++
1 file changed, 78 insertions(+), 19 deletions(-)
diff --git
On contiguous allocation, we round up the size
to the nearest power of 2, implement a function
to free unused pages.
Signed-off-by: Arunpravin
---
drivers/gpu/drm/drm_buddy.c | 87 +
include/drm/drm_buddy.h | 4 ++
2 files changed, 91 insertions(+)
diff
Export functions and write kerneldoc description
Signed-off-by: Arunpravin
---
drivers/gpu/drm/drm_buddy.c | 89 ++---
1 file changed, 83 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index
This series of patches implemented to move i915 buddy allocator
to drm root, and introduce new features include
- make drm_buddy_alloc a prime vehicle for allocation
- TOPDOWN range of address allocation support
- a function to free unused pages on contiguous allocation
- a function to allocate
- Move i915_buddy.h to include/drm
- rename "i915" string to "drm"
- rename "I915" string to "DRM"
Signed-off-by: Arunpravin
---
drivers/gpu/drm/i915/i915_buddy.h | 143 --
include/drm/drm_buddy.h | 143 ++
2 files changed, 143
Move vram defines and inline functions into
a header file
Signed-off-by: Arunpravin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 18 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 72
2 files changed, 73 insertions(+), 17 deletions(-)
create mode 100644
This function becomes obsolete and may be removed.
Signed-off-by: Arunpravin
---
drivers/gpu/drm/drm_buddy.c | 101
include/drm/drm_buddy.h | 4 --
2 files changed, 105 deletions(-)
diff --git a/drivers/gpu/drm/drm_buddy.c
- Include drm buddy to DRM root Makefile
- Add drm buddy init and exit function calls
to drm core
Signed-off-by: Arunpravin
---
drivers/gpu/drm/Makefile | 2 +-
drivers/gpu/drm/drm_drv.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/Makefile
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix header file dependencies
- Fix alignment issues
Signed-off-by: Arunpravin
---
.../drm/{i915/i915_buddy.c => drm_buddy.c}|
Remove drm_mm references and add DRM buddy
functions
Signed-off-by: Arunpravin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 233 +++
2 files changed, 138 insertions(+), 99 deletions(-)
diff --git
- Make drm_buddy_alloc a single function to handle
range allocation and non-range allocation demands.
- Implemented a new function alloc_range() which allocates
the requested order (in bytes) comply with range limitations
- Moved memory alignment logic from i915 driver
Signed-off-by:
On Tue, Oct 19, 2021 at 02:45:53PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Fix link parameter use in lack of a valid DPCD (rev2)
> URL : https://patchwork.freedesktop.org/series/95948/
> State : success
Pushed to drm-intel-next, thanks for the reviews.
>
> ==
On Fri, Mar 26, 2021 at 06:55:03AM +0100, Christoph Hellwig wrote:
Add a helper that calls remap_pfn_range for an struct io_mapping, relying
on the pgprot pre-validation done when creating the mapping instead of
doing it at runtime.
Signed-off-by: Christoph Hellwig
---
== Series Details ==
Series: replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi (rev5)
URL : https://patchwork.freedesktop.org/series/95880/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10762_full -> Patchwork_21384_full
On Tue, 2021-10-19 at 17:35 -0700, José Roberto de Souza wrote:
> Right now the only user of psr_pause/resume is intel_cdclk but
> additional users will be added in the future and we may need
> do reference counting for PSR pause and resume, for now only adding a
do -> to do?
> warn_on so this
On Mon, 2021-10-18 at 18:45 +0100, Matthew Auld wrote:
> While the pages can't be swapped out, they can be discarded by the
> shrinker.
> Normally such objects are marked with __I915_MADV_PURGED, which can't
> be
> unset, and therefore requires a new object. For kernel internal
> objects
> this is
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