== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+driver
== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10766 -> Patchwork_21396
Summary
== Series Details ==
Series: drm/i915/guc: Fix recursive lock in GuC submission (rev2)
URL : https://patchwork.freedesktop.org/series/96076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10765_full -> Patchwork_21392_full
S
On Mon, Sep 13, 2021 at 05:44:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Try to make bigjoiner pipes less special.
>
> The main things here are that each pipe now does full
> clock computation/readout with its own shared_dpll reference.
> Also every pipe's cpu_transcoder always p
On Mon, Sep 13, 2021 at 05:44:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that the bigjoiner state readout/computation has been
> made to do the right thing nuke the related state checker
> quirk.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Manasi Navare
Manasi
> ---
>
== Series Details ==
Series: drm/i915/guc: Set all engine props values for GuC virtual engines
URL : https://patchwork.freedesktop.org/series/96085/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10766 -> Patchwork_21397
Sum
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +
drivers/
This code path is used during commit, and we dont expect things to fail
during the commit stage, so remove this.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gp
[Why]
Add DP2 MST and debugfs support
[How]
Update the slot info based on the link encoding format
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 ++
.../
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP. Real data transmission sta
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP. Real data transmission sta
From: Fangzhi Zuo
[Why]
configure/call DC interface for DP2 mst support. This is needed to make DP2
mst work.
[How]
- add encoding type, logging, mst update/reduce payload functions
Use the link encoding to determine the DP type (1.4 or 2.0) and add a
flag to dc_stream_update to determine wheth
== Series Details ==
Series: drm/i915: Simplify handling of modifiers (rev12)
URL : https://patchwork.freedesktop.org/series/95579/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10765_full -> Patchwork_21393_full
Summary
--
== Series Details ==
Series: drm/i915/execlists: Weak parallel submission support for execlists
URL : https://patchwork.freedesktop.org/series/96088/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10767 -> Patchwork_21398
Su
== Series Details ==
Series: drm/i915: (near)atomic gamma LUT updates via vblank workers
URL : https://patchwork.freedesktop.org/series/96089/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
889072d8ac0e drm/i915: Move function prototypes to the correct header
0b7c1b5f5243 drm/i9
== Series Details ==
Series: drm/i915: (near)atomic gamma LUT updates via vblank workers
URL : https://patchwork.freedesktop.org/series/96089/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+dri
Hi all,
On Tue, 5 Oct 2021 10:23:23 +0200 Christian König
wrote:
>
> Am 05.10.21 um 09:59 schrieb Stephen Rothwell:
> >
> > After merging the drm-misc tree, today's linux-next build (htmldocs)
> > produced this warning:
> >
> > include/linux/dma-buf.h:456: warning: Function parameter or member '
== Series Details ==
Series: drm/i915: (near)atomic gamma LUT updates via vblank workers
URL : https://patchwork.freedesktop.org/series/96089/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10767 -> Patchwork_21399
Summary
-
On Fri, Oct 01, 2021 at 02:52:41PM -0300, Jason Gunthorpe wrote:
> This addresses Cornelia's remark on the earlier patch that ccw has a
> confusing lifecycle. While it doesn't seem like the original attempt was
> functionally wrong, the result can be made better with a lot of further
> work.
>
> R
== Series Details ==
Series: drm/i915: Split plane updates to noarm+arm phases (rev2)
URL : https://patchwork.freedesktop.org/series/95962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10766_full -> Patchwork_21396_full
Su
== Series Details ==
Series: drm/i915/guc: Set all engine props values for GuC virtual engines
URL : https://patchwork.freedesktop.org/series/96085/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10766_full -> Patchwork_21397_full
===
This series updates DPCD 248h register name and PHY test patterns names to
follow DP 2.0 Specs.
Also updates the DP PHY CTS codes of the affected drivers (i915, amd, msm)
No functional changes expected.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency”
https://groups.vesa.o
DPCD 248h name was changed from “PHY_TEST_PATTERN” in DP 1.4 to
“LINK_QUAL_PATTERN_SELECT” in DP 2.0.
Also, DPCD 248h [6:0] is the same as DPCDs 10Bh/10Ch/10Dh/10Eh [6:0]. So
removed the repeated definition of PHY patterns.
Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency”
Update selected phy test pattern names to use the new names/definitions of DPCD
248h in DP2.0/drm_dp_helpers.h
No functional changes
Cc: Manasi Navare
CC: Jani Nikula
Cc: Imre Deak
Signed-off-by: Khaled Almahallawy
---
drivers/gpu/drm/i915/display/intel_dp.c | 12 ++--
1 file changed
Use the new definition of DPCD 248h (DP_LINK_QUAL_PATTERN_SELECT)
No functional changes.
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Khaled Almahallawy
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
Use DP 2.0 DPCD 248h new name (LINK_QUAL_PATTERN_SELECT) and rename selected
phy test patterns to LINK_QUAL_PATTERN_*
Note: TPS4 LT pattern is CP2520 Pattern 3 (refer to DP2.0 spaces Table 3-11,
DPCD 00248h
LINK_QUAL_PATTERN_SELECT, and DP PHY 1.4 CTS - Appendix A - Compliance EYE
Pattern(CP252
== Series Details ==
Series: drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS
URL : https://patchwork.freedesktop.org/series/96096/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2bdec9c1bda4 drm/dp: Rename DPCD 248h according to DP 2.0 specs
-:9: WARNING:
== Series Details ==
Series: drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS
URL : https://patchwork.freedesktop.org/series/96096/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separa
On Wed, 2021-10-20 at 13:34 -0700, John Harrison wrote:
> On 10/11/2021 10:57, Matthew Brost wrote:
> > perf_parallel_engines is micro benchmark to test i915 request
> > scheduling. The test creates a thread per physical engine and
> > submits
> > NOP requests and waits the requests to complete in
On Wed, 2021-10-20 at 12:21 -0700, Matthew Brost wrote:
> Use __release_guc_id (lock held) rather than release_guc_id (acquires
> lock), add lockdep annotations.
>
> 213.280129] i915: Running i915_perf_live_selftests/live_noa_gpr
> [ 213.283459]
> [ 213
On Mon, 2021-10-11 at 12:40 -0700, Matthew Brost wrote:
> The hangcheck selftest blows on DG1 CI and aborts the BAT run.
> Investigation is underway to root cause the failure but in the
> meantime
> disable to this test on DG1 to unblock CI.
>
> Signed-off-by: Matthew Brost
Reviewed-by: Thomas H
== Series Details ==
Series: drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS
URL : https://patchwork.freedesktop.org/series/96096/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10767 -> Patchwork_21400
===
== Series Details ==
Series: drm/i915/execlists: Weak parallel submission support for execlists
URL : https://patchwork.freedesktop.org/series/96088/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10767_full -> Patchwork_21398_full
==
Hi, Matthew,
On Mon, 2021-10-11 at 16:47 -0700, Matthew Brost wrote:
> The hangcheck selftest blocks per engine resets by setting magic bits
> in
> the reset flags. This is incorrect for GuC submission because if the
> GuC
> fails to reset an engine we would like to do a full GT reset. Do no
> set
On Wed, Oct 20, 2021 at 09:37:51PM +0200, Peter Zijlstra wrote:
> > I'm not sure what exactly brought me to check this, but while debugging
> > I noticed this outside the header guard. But then after some more checks I
> > saw nothing actually selects CONFIG_IO_MAPPING because commit using
> > it w
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