Hi Maarten,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next airlied/drm-next v5.15-rc6 next-20211021]
[If your patch is applied to the wrong git tree
On Thu, Oct 21, 2021 at 07:56:11PM +0530, Ramalingam C wrote:
From: Stuart Summers
Add a new platform flag, has_64k_pages, for platforms supporting
base page sizes of 64k.
Signed-off-by: Stuart Summers
Signed-off-by: Ramalingam C
Reviewed-by: Lucas De Marchi
Lucas De Marchi
== Series Details ==
Series: drm/i915/selftests: Update live.evict to wait on requests / idle GPU
after each loop
URL : https://patchwork.freedesktop.org/series/96157/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10773_full -> Patchwork_21414_full
===
On Thu, Oct 21, 2021 at 07:56:12PM +0530, Ramalingam C wrote:
From: Matthew Auld
LMEM should be allocated at 64K granularity, since 4K page support will
eventually be dropped for LMEM when using the PPGTT.
this is not for xehpsdv only. So this should probably drop the prefix
and be:
For disc
On 10/21/21 22:37, Matthew Brost wrote:
On Thu, Oct 21, 2021 at 08:15:49AM +0200, Thomas Hellström wrote:
Hi, Matthew,
On Mon, 2021-10-11 at 16:47 -0700, Matthew Brost wrote:
The hangcheck selftest blocks per engine resets by setting magic bits
in
the reset flags. This is incorrect for GuC s
On 10/21/21 23:40, Matthew Brost wrote:
Update live.evict to wait on last request and idle GPU after each loop.
This not only enhances the test to fill the GGTT on each engine class
but also avoid timeouts from igt_flush_test when using GuC submission.
igt_flush_test (idle GPU) can take a long
== Series Details ==
Series: drm/i915/selftests: Properly reset mock object propers for each test
URL : https://patchwork.freedesktop.org/series/96151/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10773_full -> Patchwork_21413_full
== Series Details ==
Series: drm/i915: abstraction for iosf to compile on all archs
URL : https://patchwork.freedesktop.org/series/96149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773_full -> Patchwork_21412_full
Summ
== Series Details ==
Series: drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9
(rev9)
URL : https://patchwork.freedesktop.org/series/81764/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21418
===
== Series Details ==
Series: Delay disabling scheduling on a context
URL : https://patchwork.freedesktop.org/series/96167/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21417
Summary
---
**WARNING*
WaProgramMgsrForCorrectSliceSpecificMmioReads applies for Gen9 to
resolve VP8 hardware encoding system hang up on GT1 sku for
ChromiumOS projects. This system hang issue can be reproduced on
Khronos OpenCL conformance tests by test_basic as well, and issue
can be resolved by this patch on Linux.
S
== Series Details ==
Series: Do error capture async, flush G2H processing on reset (rev4)
URL : https://patchwork.freedesktop.org/series/94642/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21416
Summary
== Series Details ==
Series: Do error capture async, flush G2H processing on reset (rev4)
URL : https://patchwork.freedesktop.org/series/94642/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+dr
== Series Details ==
Series: drm/i915/selftests: print exact error code
URL : https://patchwork.freedesktop.org/series/96159/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21415
Summary
---
**SUCCE
== Series Details ==
Series: drm/i915/selftests: print exact error code
URL : https://patchwork.freedesktop.org/series/96159/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2995fc2faf1e drm/i915/selftests: print exact error code
-:25: CHECK:PARENTHESIS_ALIGNMENT: Alignment shoul
== Series Details ==
Series: drm/i915/selftests: Update live.evict to wait on requests / idle GPU
after each loop
URL : https://patchwork.freedesktop.org/series/96157/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21414
=
Add a delay, configurable via debugs (default 100ms), to disable
scheduling of a context after the pin count goes to zero. Disable
scheduling is somewhat costly operation so the idea is a delay allows
the resubmit something before doing this operation. This delay is only
done if the context isn't c
Add delay before disabling scheduling on a context. 2nd patch should
explain it quite well.
Signed-off-by: Matthew Brost
Matthew Brost (2):
drm/i915/selftests: Use correct selfest calls for live tests
drm/i915/guc: Add delay to disable scheduling after pin count goes to
zero
drivers/g
This will help in an upcoming patch where the live selftest wrappers
are extended to do more.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c| 2 +-
drivers/gpu/drm/i915/gem/selftests/i915_g
== Series Details ==
Series: drm/i915/selftests: Properly reset mock object propers for each test
URL : https://patchwork.freedesktop.org/series/96151/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21413
== Series Details ==
Series: drm/i915: remove CNL leftover
URL : https://patchwork.freedesktop.org/series/96147/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773_full -> Patchwork_21411_full
Summary
---
**SUCCESS*
== Series Details ==
Series: drm/i915/selftests: Properly reset mock object propers for each test
URL : https://patchwork.freedesktop.org/series/96151/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
50ed28df7337 drm/i915/selftests: Properly reset mock object propers for each
te
From: John Harrison
When i915 receives a context reset notification from GuC, it triggers
an error capture before resetting any outstanding requsts of that
context. Unfortunately, the error capture is not a time bound
operation. In certain situations it can take a long time, particularly
when mul
It isn't safe to scrub for missing G2H or continue with the reset until
all G2H processing is complete. Flush the G2H work queue during reset to
ensure it is done running. No need to call the IRQ handler directly
either as the scrubbing code can deal with any missing G2H.
Signed-off-by: Matthew Br
An error capture allocates memory, memory allocations depend on resets,
and resets need to flush the G2H handlers to seal several races. If the
error capture is done from the G2H handler this creates a circular
dependency. To work around this, do a error capture in a work queue
asynchronously from
Rather allocating an error capture in nowait context to break a lockdep
splat [1], do the error capture async compared to the G2H processing.
v2: Fix Docs warning
v3: Rebase, resend for CI
Signed-off-by: Matthew Brost
[1] https://patchwork.freedesktop.org/patch/451415/?series=93704&rev=5
Matth
== Series Details ==
Series: drm/i915: abstraction for iosf to compile on all archs
URL : https://patchwork.freedesktop.org/series/96149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21412
Summary
--
== Series Details ==
Series: Nuke PAGE_KERNEL_IO
URL : https://patchwork.freedesktop.org/series/96145/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10773_full -> Patchwork_21410_full
Summary
---
**FAILURE**
Serio
== Series Details ==
Series: drm/i915: abstraction for iosf to compile on all archs
URL : https://patchwork.freedesktop.org/series/96149/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5d51c1a421c4 drm/i915: abstraction for iosf to compile on all archs
-:26: WARNING:FILE_PATH_CH
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/drm_panel_orientation_quirks.c
between commit:
def0c3697287 ("drm: panel-orientation-quirks: Add quirk for Aya Neo 2021")
from the drm-misc-fixes tree and commits:
072e70d52372 ("drm: panel-orientation-q
From: John Harrison
With GuC submission, engine resets are handled entirely within GuC
rather than within i915. Traditionally, IGT has disallowed engine
based resets becuase they don't send the uevent which IGT uses to
check for unexpected resets. However, it is important to be able to
test all r
From: John Harrison
Some of the capture tests were using explicit contexts, some not. Some
were poking the per engine pre-emption timeout, some not. This would
lead to sporadic failures due to random timeouts, contexts being
banned depending upon how many subtests were run and/or how many
engines
From: John Harrison
When GuC submission is enabled, GuC itself manages hang detection and
recovery. Therefore, any test that relies on being able to trigger an
engine reset in the driver will fail. Full GT resets can still be
triggered by the driver. However, in that situation detecting the
speci
From: John Harrison
The syfs helper functions were all using basic 'int' data types for
sizs, offsets, etc. when reading from sysfs. This works fine for
little files, but not for large error capture logs (which can be
gigabytes in sizes).
Signed-off-by: John Harrison
---
lib/igt_sysfs.c | 17 +
From: John Harrison
The sysfs file read helper does not actually report any errors if a
realloc fails. It just silently returns a 'valid' but truncated
buffer. This then leads to the decode of the buffer failing in random
ways. So, add a check for ENOMEM being generated during the read.
Signed-o
From: John Harrison
The decode of the error capture contents was happening in two
different sub-tests with two very different pieces of code. One being
much more extensive than the other (actually decodes and verifies the
contents of the captured buffers rather than just the address). So,
move th
From: John Harrison
At some point, larger than 4KB page sizes were added to the i915
driver. This included adding an informational line to the buffer
entries in error capture logs. However, the error capture test was not
updated to skip this string, thus it would silently abort processing.
Signe
From: John Harrison
The 'many' test ended with an 'assert(count)', presumably meaning to
ensure that some objects were actually captured. However, 'count' is
the number of objects created not how many were captured. Plus, there
is already a 'require(count > 1)' at the start and count is invarient
From: John Harrison
Fix a bunch of issues with gem_exec_capture with the ultimate aim of
making it pass on GuC enabled platforms.
Signed-off-by: John Harrison
John Harrison (8):
tests/i915/gem_exec_capture: Remove pointless assert
tests/i915/gem_exec_capture: Cope with larger page sizes
== Series Details ==
Series: drm/i915: remove CNL leftover
URL : https://patchwork.freedesktop.org/series/96147/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21411
Summary
---
**SUCCESS**
No re
On Mon, Sep 13, 2021 at 05:44:35PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add a helper to determine the master crtc for bigjoiner usage.
> Also name the variables consistently.
>
> Signed-off-by: Ville Syrjälä
Agree with Jani that at some point we should start calling this
Prim
On Thu, 2021-10-21 at 13:00 +0300, Jani Nikula wrote:
> On Wed, 20 Oct 2021, Khaled Almahallawy > wrote:
> > This series updates DPCD 248h register name and PHY test patterns
> > names to follow DP 2.0 Specs.
> > Also updates the DP PHY CTS codes of the affected drivers (i915,
> > amd, msm)
> > No
== Series Details ==
Series: Nuke PAGE_KERNEL_IO
URL : https://patchwork.freedesktop.org/series/96145/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10773 -> Patchwork_21410
Summary
---
**SUCCESS**
No regressions
== Series Details ==
Series: drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9
(rev8)
URL : https://patchwork.freedesktop.org/series/81764/
State : failure
== Summary ==
Applying: drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for
Gen9
Using index info t
Print the exact error code in test live_nop_switch,
instead of -EIO. If the test fails, we will know
the exact reason.
Signed-off-by: Oak Zeng
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915
Update live.evict to wait on last request and idle GPU after each loop.
This not only enhances the test to fill the GGTT on each engine class
but also avoid timeouts from igt_flush_test when using GuC submission.
igt_flush_test (idle GPU) can take a long time with GuC submission if
losts of context
On Thu, Oct 21, 2021 at 10:05:40PM +0300, Ville Syrjälä wrote:
On Thu, Oct 21, 2021 at 11:18:47AM -0700, Lucas De Marchi wrote:
We left the definition IS_CANNONLAKE() macro while removing it from the
tree due to having to merge the changes in different branches. Now that
everything is back in sy
On Thu, Oct 21, 2021 at 08:15:49AM +0200, Thomas Hellström wrote:
> Hi, Matthew,
>
> On Mon, 2021-10-11 at 16:47 -0700, Matthew Brost wrote:
> > The hangcheck selftest blocks per engine resets by setting magic bits
> > in
> > the reset flags. This is incorrect for GuC submission because if the
> >
I forgot to do this properly in
commit 6f11f37459d8f9f74ff1c299c0bedd50b458057a
Author: Daniel Vetter
Date: Fri Jul 23 10:34:55 2021 +0200
drm/plane: remove drm_helper_get_plane_damage_clips
intel-gfx CI didn't spot this because we run each selftest in each own
invocations, which means re
From: Fangzhi Zuo
[Why]
configure/call DC interface for DP2 mst support. This is needed to make DP2
mst work.
[How]
- add encoding type, logging, mst update/reduce payload functions
Use the link encoding to determine the DP type (1.4 or 2.0) and add a
flag to dc_stream_update to determine wheth
On Thu, Oct 21, 2021 at 11:18:47AM -0700, Lucas De Marchi wrote:
> We left the definition IS_CANNONLAKE() macro while removing it from the
> tree due to having to merge the changes in different branches. Now that
> everything is back in sync and nobody is using IS_CANNONLAKE(), we can
> safely ditc
== Series Details ==
Series: drm/i915/cdclk: put the cdclk vtables in const data
URL : https://patchwork.freedesktop.org/series/96131/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10770_full -> Patchwork_21406_full
Summary
On Thu, Oct 21, 2021 at 12:34:23AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Simplify handling of modifiers (rev12)
> URL : https://patchwork.freedesktop.org/series/95579/
> State : success
Pushed with that the '}, {' formatting change applied, thanks for the
reviews.
On Fri, Oct 22, 2021 at 12:07:04AM +0530, Mullati Siva wrote:
From: "Mullati, Siva"
As Non-x86 architectures won't get compiled asm\iosf,
abstarcting them to make compile for all archs.
I noticed a typo here, then thought we should expand a little bit. What
about something like below?
The as
From: "Mullati, Siva"
As Non-x86 architectures won't get compiled asm\iosf,
abstarcting them to make compile for all archs.
Signed-off-by: Mullati, Siva
---
drivers/gpu/drm/i915/Kconfig | 2 +-
drivers/gpu/drm/i915/i915_iosf_mbi.h | 42
drivers/gpu/drm/i91
We left the definition IS_CANNONLAKE() macro while removing it from the
tree due to having to merge the changes in different branches. Now that
everything is back in sync and nobody is using IS_CANNONLAKE(), we can
safely ditch it.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv
== Series Details ==
Series: series starting with [1/2] drm/i915/dmabuf: fix broken build
URL : https://patchwork.freedesktop.org/series/96125/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10770_full -> Patchwork_21405_full
PAGE_KERNEL_IO is only defined for x86 and nowadays is the same as
PAGE_KERNEL. It was different for some time, OR'ing a `_PAGE_IOMAP` flag
in commit be43d72835ba ("x86: add _PAGE_IOMAP pte flag for IO
mappings"). This got removed in commit f955371ca9d3 ("x86: remove the
Xen-specific _PAGE_IOMAP P
PAGE_KERNEL_IO is only defined for x86 and nowadays is the same as
PAGE_KERNEL. It was different for some time, OR'ing a `_PAGE_IOMAP` flag
in commit be43d72835ba ("x86: add _PAGE_IOMAP pte flag for IO
mappings"). This got removed in commit f955371ca9d3 ("x86: remove the
Xen-specific _PAGE_IOMAP P
Last user of PAGE_KERNEL_IO is the i915 driver. While removing it from
there as we seek to bring the driver to other architectures, Daniel
suggested that we could finish the cleanup and remove it altogether,
through the tip tree. So here I'm sending both commits needed for that.
Lucas De Marchi (2
WaProgramMgsrForCorrectSliceSpecificMmioReads applies for Gen9 to
resolve VP8 hardware encoding system hang up on GT1 sku for
ChromiumOS projects. This system hang issue can be reproduced on
Khronos OpenCL conformance tests by test_basic as well, and issue
can be resolved by this patch on Linux.
S
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Signed-off-by: Maarten Lankhorst
Needs a proper commit message.
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Now that freeing objects takes the object lock when destroying the
> backing pages, we can confidently take the object lock even for dead
> objects.
>
> Use this fact to take the object lock in the shrinker, without requiring
> a reference
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> In the next commit, we don't evict when refcount = 0, so we need to
> call drain freed objects, because we want to pin new bo's in the same
> place, causing a test failure.
>
> Furthermore, since each subtest is separated, it's a lot bette
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Signed-off-by: Maarten Lankhorst
Needs a proper commit message.
> ---
> drivers/gpu/drm/i915/i915_gem.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> i915_vma_wait_for_bind needs the vma lock held, fix the caller.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_vma.c | 40 +++--
> 1 file changed, 28 insertions(+), 12 deletions(-)
>
>
== Series Details ==
Series: series starting with [1/4] drm/i915/clflush: fixup handling of
cache_dirty
URL : https://patchwork.freedesktop.org/series/96119/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10770_full -> Patchwork_21404_full
=
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> Big delta, but boils down to moving set_pages to i915_vma.c, and removing
> the special handling, all callers use the defaults anyway. We only remap
> in ggtt, so default case will fall through.
>
> Because we still don't require locking i
== Series Details ==
Series: drm/i915/dg2: Enabling 64k page size and flat ccs (rev2)
URL : https://patchwork.freedesktop.org/series/95686/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10770 -> Patchwork_21407
Summary
== Series Details ==
Series: series starting with [1/4] drm: Remove slot checks in dp mst topology
during commit (rev4)
URL : https://patchwork.freedesktop.org/series/96079/
State : failure
== Summary ==
Applying: drm: Remove slot checks in dp mst topology during commit
Applying: drm: Update
On Wed, 2021-10-20 at 19:48 -0300, Jason Gunthorpe wrote:
> On Fri, Oct 01, 2021 at 02:52:41PM -0300, Jason Gunthorpe wrote:
> > This addresses Cornelia's remark on the earlier patch that ccw has
> > a
> > confusing lifecycle. While it doesn't seem like the original
> > attempt was
> > functionally
On Fri, 2021-10-01 at 14:52 -0300, Jason Gunthorpe wrote:
> Since the ccw_io_region was split out of the private the allocation
> no
> longer needs the GFP_DMA. Remove it.
>
> Reported-by: Christoph Hellwig
> Fixes: c98e16b2fa12 ("s390/cio: Convert ccw_io_region to pointer")
> Signed-off-by: Jaso
On 10/1/21 1:52 PM, Jason Gunthorpe wrote:
Makes the code easier to understand what is memory lifecycle and what is
other stuff.
Reviewed-by: Eric Farman
Signed-off-by: Jason Gunthorpe
Reviewed-by: Matthew Rosato
On 10/1/21 1:52 PM, Jason Gunthorpe wrote:
Since the ccw_io_region was split out of the private the allocation no
longer needs the GFP_DMA. Remove it.
Reported-by: Christoph Hellwig
Fixes: c98e16b2fa12 ("s390/cio: Convert ccw_io_region to pointer")
Signed-off-by: Jason Gunthorpe
Reviewed-by:
[Public]
> -Original Message-
> From: Bhawanpreet Lakha
> Sent: Thursday, October 21, 2021 3:47 AM
> To: Zuo, Jerry ; dri-de...@lists.freedesktop.org;
> ly...@redhat.com
> Cc: Wentland, Harry ; Lin, Wayne ;
> Kazlauskas, Nicholas
> ; Lipski, Mikita ;
> intel-gfx@lists.freedesktop.org
>
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Call drop_pages with the gem object lock held, instead of the other
> way around. This will allow us to drop the vma bindings with the
> gem object lock held.
>
> We plan to require the object lock for unpinning in the future,
> and this i
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> vma->obj and vma->resv are now never NULL, and some checks can be removed.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/gt/intel_context.c | 2 +-
> .../gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
> dri
== Series Details ==
Series: drm/i915/dg2: Enabling 64k page size and flat ccs (rev2)
URL : https://patchwork.freedesktop.org/series/95686/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./driv
== Series Details ==
Series: drm/i915/dg2: Enabling 64k page size and flat ccs (rev2)
URL : https://patchwork.freedesktop.org/series/95686/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a3c94fe1d5cd drm/i915: Add has_64k_pages flag
45ceb0b40034 drm/i915/xehpsdv: set min page-si
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> This allows us to finally get rid of all the assumptions that vma->obj is
> NULL.
>
> Changes since v1:
> - Ensure the mock_ring vma is pinned to prevent a fault.
> - Pin it high to avoid failure in evict_for_vma selftest.
>
> Signed-off-
== Series Details ==
Series: drm/i915/cdclk: put the cdclk vtables in const data
URL : https://patchwork.freedesktop.org/series/96131/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10770 -> Patchwork_21406
Summary
---
== Series Details ==
Series: drm/i915/display: program audio CDCLK-TS for keepalives (rev4)
URL : https://patchwork.freedesktop.org/series/94551/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10769_full -> Patchwork_21403_full
==
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> We currently have to special case vma->obj being NULL because
> of gen6 ppgtt and mock_engine. Fix gen6 ppgtt, so we may soon
> be able to remove a few checks. As the object only exists as
> a fake object pointing to ggtt, we have no backi
== Series Details ==
Series: series starting with [1/2] drm/i915/dmabuf: fix broken build
URL : https://patchwork.freedesktop.org/series/96125/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10770 -> Patchwork_21405
Summary
On Thu, 21 Oct 2021 05:53:31 -0700, Matthew Auld wrote:
>
> wbinvd_on_all_cpus() is only defined on x86 it seems, plus we need to
> include asm/smp.h here.
Reviewed-by: Ashutosh Dixit
> Reported-by: kernel test robot
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
> ---
> drivers/gpu/dr
== Series Details ==
Series: series starting with [1/2] drm/i915/dmabuf: fix broken build
URL : https://patchwork.freedesktop.org/series/96125/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
68c88f65e7ba drm/i915/dmabuf: fix broken build
-:25: WARNING:INCLUDE_LINUX: Use #include
== Series Details ==
Series: series starting with [1/4] drm/i915/clflush: fixup handling of
cache_dirty
URL : https://patchwork.freedesktop.org/series/96119/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10770 -> Patchwork_21404
===
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> The signaled bit is already used for quick testing if a fence is signaled.
Why do we need this change? Can you add some more details to the commit please?
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/Makefile
Am 21.10.21 um 12:35 schrieb Maarten Lankhorst:
From: Christian König
Simplifying the code a bit.
Signed-off-by: Christian König
[mlankhorst: Handle timeout = 0 correctly, use new i915_request_wait_timeout.]
Signed-off-by: Maarten Lankhorst
LGTM, do you want to push it or should I pick it
On Thu, Oct 21, 2021 at 07:56:24PM +0530, Ramalingam C wrote:
> From: Matt Roper
>
> DG2 unifies render compression and media compression into a single
> format for the first time. The programming and buffer layout is
> supposed to match compression on older gen12 platforms, but the
> actual com
For the include/uapi/drm/drm_fourcc.h changes:
Acked-by: Simon Ser
On Thu, Oct 21, 2021 at 07:56:23PM +0530, Ramalingam C wrote:
> From: Stanislav Lisovskiy
>
> TileF(Tile4 in bspec) format is 4K tile organized into
> 64B subtiles with same basic shape as for legacy TileY
> which will be supported by Display13.
>
> v2: - Fixed wrong case condition(Jani Nikula)
Details of the new features getting added as part of DG2 enabling and their
implicit impact on the uAPI.
v2: improvised the Flat-CCS documentation [Danvet & CQ]
Signed-off-by: Ramalingam C
cc: Daniel Vetter
cc: Matthew Auld
cc: Simon Ser
cc: Pekka Paalanen
---
Documentation/gpu/rfc/i915_dg2
Documents the Flat-CCS feature and kernel handling required along with
modifiers used.
Signed-off-by: Ramalingam C
cc: Simon Ser
cc: Pekka Paalanen
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 47 +
1 file changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt
From: Matthew Auld
On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.
v2: Fixed suggestions on formatting [Daniel]
Signed-off-by: Matthe
From: Matt Roper
DG2 unifies render compression and media compression into a single
format for the first time. The programming and buffer layout is
supposed to match compression on older gen12 platforms, but the
actual compression algorithm is different from any previous platform; as
such, we ne
From: Stanislav Lisovskiy
TileF(Tile4 in bspec) format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY
which will be supported by Display13.
v2: - Fixed wrong case condition(Jani Nikula)
- Increased I915_FORMAT_MOD_F_TILED up to 12(Imre Deak)
v3: - s/I915_TI
From: Ayaz A Siddiqui
Xe-hp and latest devices support Flat CCS which reserved a portion of
the device memory to store compression metadata, during the clearing of
device memory buffer object we also need to clear the associated CCS buffer.
Flat CCS memory can not be directly accessed by S/W.
Ad
From: Abdiel Janulgue
A portion of device memory is reserved for Flat CCS so usable
device memory will be reduced by size of Flat CCS. Size of
Flat CCS is specified in “XEHPSDV_FLAT_CCS_BASE_ADDR”.
So to get effective device memory we need to subtract
total device memory by Flat CCS memory size.
From: CQ Tang
Gen12+ devices support 3D surface (buffer) compression and various
compression formats. This is accomplished by an additional compression
control state (CCS) stored for each surface.
Gen 12 devices(TGL family and DG1) stores compression states in a separate
region of memory. It is
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