The low voltage sku check can be ignored as OEMs need to consider that
when designing the board and then put any limits in VBT.
Same is now changed in Bspec pages.
v2: Added debug print for combo PHY procmon reference values
to get voltage configuration of combo PHY ports. (Imre)
Signed-off-by:
topic/amdgpu-dp2.0-mst-2021-10-25:
UAPI Changes:
Nope!
Cross-subsystem Changes:
drm_dp_update_payload_part1() takes a new argument for specifying what the
VCPI slot start is
Core Changes:
Make the DP MST helpers aware of the current starting VCPI slot/VCPI total
slot count...
Driver Changes:
On Wed, Oct 13, 2021 at 02:12:20PM -0400, Mark Yacoub wrote:
> From: Mark Yacoub
>
> [Why]
> 1. drm_atomic_helper_check doesn't check for the LUT sizes of either Gamma
> or Degamma props in the new CRTC state, allowing any invalid size to
> be passed on.
> 2. Each driver has its own LUT size,
On Mon, 25 Oct 2021 at 23:51, Daniel Vetter wrote:
>
> On Mon, Oct 25, 2021 at 3:49 PM Joonas Lahtinen
> wrote:
> >
> > Add Tvrtko Ursulin as a co-maintainer for drm/i915 driver.
> > Tvrtko will bring added bandwidth and focus to the GT/GEM domain
> > (drm-intel-gt-next).
> >
> > This will help
== Series Details ==
Series: drm/i915/trace: Hide backend specific fields behind Kconfig
URL : https://patchwork.freedesktop.org/series/96258/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10787_full -> Patchwork_21440_full
From: Bhawanpreet Lakha
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP.
From: Bhawanpreet Lakha
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP.
== Series Details ==
Series: drm/i915: Fix type1 DVI DP dual mode adapter heuristic for modern
platforms
URL : https://patchwork.freedesktop.org/series/96250/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10786_full -> Patchwork_21439_full
On 10/25/2021 09:34, Matthew Brost wrote:
Hide the guc_id and tail fields, for request trace points, behind
CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig option. Trace points
are ABI (maybe?) so don't change them without kernel developers Kconfig
options.
The i915 sw arch team have previously
== Series Details ==
Series: drm/i915/trace: Hide backend specific fields behind Kconfig
URL : https://patchwork.freedesktop.org/series/96258/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10787 -> Patchwork_21440
Summary
== Series Details ==
Series: drm/i915/trace: Hide backend specific fields behind Kconfig
URL : https://patchwork.freedesktop.org/series/96258/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
621c2565d8e5 drm/i915/trace: Hide backend specific fields behind Kconfig
-:31:
== Series Details ==
Series: drm/i915: Fix type1 DVI DP dual mode adapter heuristic for modern
platforms
URL : https://patchwork.freedesktop.org/series/96250/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10786 -> Patchwork_21439
On 10/23/2021 11:36, Thomas Hellström wrote:
On 10/23/21 20:18, Matthew Brost wrote:
On Sat, Oct 23, 2021 at 07:46:48PM +0200, Thomas Hellström wrote:
On 10/22/21 20:09, John Harrison wrote:
And to be clear, the engine reset is not supposed to fail. Whether
issued by GuC or i915, the GDRST
(apologies for not quoting, I wasn't subscribed before now)
some quick thoughts:
- Can we split these patches in to two series, one for each topic. They
don't seem specifically related.
- to simplify 64K page support, could we just set minimum allocation
size to 64K and round up for
On Mon, Oct 25, 2021 at 03:23:00PM +0300, Joonas Lahtinen wrote:
> Quoting Thomas Hellström (2021-10-21 08:39:48)
> > On Wed, 2021-10-20 at 12:21 -0700, Matthew Brost wrote:
>
>
>
> > > Fixes: 1a52faed31311 ("drm/i915/guc: Take engine PM when a context is
> > > pinned with GuC submission")
> >
On 10/25/2021 02:37, Joonas Lahtinen wrote:
Quoting Matthew Brost (2021-10-22 19:42:19)
On Fri, Oct 22, 2021 at 12:35:04PM +0300, Joonas Lahtinen wrote:
Hi Matt & John,
Can you please queue patches with the right Fixes: references to convert
all the GuC tracepoints to be protected by the
Move shared vram inline functions and structs
into a header file
Signed-off-by: Arunpravin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 51
1 file changed, 51 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
diff --git
add drm_buddy_free_unused_pages() support on
contiguous allocation
Signed-off-by: Arunpravin
---
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix header file dependencies
- Fix alignment issues
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
for instance, if driver requests address at a low specific
On 20/10/21 1:51 pm, Thomas Zimmermann wrote:
> Hi
>
> Am 20.10.21 um 00:53 schrieb Arunpravin:
>> - Include drm buddy to DRM root Makefile
>> - Add drm buddy init and exit function calls
>>to drm core
>
> Is there a hard requirement to have this code in the core?
>
> IMHO there's
add top down allocation support to i915 driver
Signed-off-by: Arunpravin
---
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.
Signed-off-by: Arunpravin
---
drivers/gpu/drm/drm_buddy.c | 103
include/drm/drm_buddy.h | 4 ++
2
- Remove drm_mm references and replace with drm buddy functionalities
- Add res cursor support for drm buddy
Signed-off-by: Arunpravin
---
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h| 97 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +-
- Make drm_buddy_alloc a single function to handle
range allocation and non-range allocation demands
- Implemented a new function alloc_range() which allocates
the requested power-of-two block comply with range limitations
- Moved order computation and memory alignment logic from
i915
== Series Details ==
Series: MAINTAINERS: Add Tvrtko as drm/i915 co-maintainer
URL : https://patchwork.freedesktop.org/series/96247/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10784_full -> Patchwork_21438_full
Summary
Hide the guc_id and tail fields, for request trace points, behind
CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig option. Trace points
are ABI (maybe?) so don't change them without kernel developers Kconfig
options.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/i915_trace.h | 27
On 25/10/2021 12:32, Wan Jiabing wrote:
Fix following coccicheck warning:
./drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:3117:15-22: WARNING:
ERR_CAST can be used with eb->requests[i].
Signed-off-by: Wan Jiabing
Pushed to drm-intel-gt-next. Thanks.
---
On Mon, Oct 25, 2021 at 12:37:02PM +0300, Joonas Lahtinen wrote:
> Quoting Matthew Brost (2021-10-22 19:42:19)
> > On Fri, Oct 22, 2021 at 12:35:04PM +0300, Joonas Lahtinen wrote:
> > > Hi Matt & John,
> > >
> > > Can you please queue patches with the right Fixes: references to convert
> > > all
== Series Details ==
Series: MAINTAINERS: Add Tvrtko as drm/i915 co-maintainer
URL : https://patchwork.freedesktop.org/series/96247/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10784 -> Patchwork_21438
Summary
---
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Be thorough..
>
> Signed-off-by: Maarten Lankhorst
Is this strictly needed for something? Needs a proper commit message anyway.
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
== Series Details ==
Series: drm/i915: Use ERR_CAST instead of ERR_PTR(PTR_ERR())
URL : https://patchwork.freedesktop.org/series/96246/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10783_full -> Patchwork_21436_full
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Add a flag PIN_VALIDATE, to indicate we don't need to pin and only
> protected by the object lock.
>
> This removes the need to unpin, which is done by just releasing the
> lock.
>
> eb_reserve is slightly reworked for readability, but
On Thu, Oct 21, 2021 at 10:22:43PM -0400, He Ying wrote:
> If we want to return from for_each_intel_connector_iter(), one
> way is calling drm_connector_list_iter_end() before returning
> to avoid memleak. The other way is just breaking from the bracket
> and then returning after the outside
From: Ville Syrjälä
Looks like we never updated intel_bios_is_port_dp_dual_mode() when
the VBT port mapping became erratic on modern platforms. This
is causing us to look up the wrong child device and thus throwing
the heuristic off (ie. we might end looking at a child device for
a genuine DP++
== Series Details ==
Series: drm/i915: Use ERR_CAST instead of ERR_PTR(PTR_ERR())
URL : https://patchwork.freedesktop.org/series/96246/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10783 -> Patchwork_21436
Summary
---
== Series Details ==
Series: series starting with [v2,1/8] drm: move the buddy allocator from i915
into common drm
URL : https://patchwork.freedesktop.org/series/96245/
State : failure
== Summary ==
Applying: drm: move the buddy allocator from i915 into common drm
Using index info to
On Mon, Oct 25, 2021 at 3:49 PM Joonas Lahtinen
wrote:
>
> Add Tvrtko Ursulin as a co-maintainer for drm/i915 driver.
> Tvrtko will bring added bandwidth and focus to the GT/GEM domain
> (drm-intel-gt-next).
>
> This will help with the increased driver maintenance efforts, allows
> alternating
Add Tvrtko Ursulin as a co-maintainer for drm/i915 driver.
Tvrtko will bring added bandwidth and focus to the GT/GEM domain
(drm-intel-gt-next).
This will help with the increased driver maintenance efforts, allows
alternating the drm-intel-gt-next pull requests and also should increase
the
Fix following coccicheck warning:
./drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:3117:15-22: WARNING:
ERR_CAST can be used with eb->requests[i].
Signed-off-by: Wan Jiabing
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Jani,
On Mon, Oct 18, 2021 at 01:00:01PM +0300, Jani Nikula wrote:
> On Sat, 16 Oct 2021, Len Baker wrote:
> > Hi Daniel and Jani,
> >
> > On Wed, Oct 13, 2021 at 01:51:30PM +0200, Daniel Vetter wrote:
> >> On Wed, Oct 13, 2021 at 02:24:05PM +0300, Jani Nikula wrote:
> >> > On Mon, 11 Oct
Am 13.10.21 um 16:29 schrieb Daniel Vetter:
On Tue, Oct 05, 2021 at 01:37:40PM +0200, Christian König wrote:
Makes the handling a bit more complex, but avoids the use of
dma_resv_get_excl_unlocked().
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/dispnv50/wndw.c | 10 +-
== Series Details ==
Series: drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9
(rev11)
URL : https://patchwork.freedesktop.org/series/81764/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10783_full -> Patchwork_21435_full
Quoting Thomas Hellström (2021-10-21 08:39:48)
> On Wed, 2021-10-20 at 12:21 -0700, Matthew Brost wrote:
> > Fixes: 1a52faed31311 ("drm/i915/guc: Take engine PM when a context is
> > pinned with GuC submission")
> > Signed-off-by: Matthew Brost
> > Cc: sta...@vger.kernel.org
This Cc: stable
On 21.10.2021 17.35, Ville Syrjälä wrote:
On Thu, Oct 21, 2021 at 07:56:24PM +0530, Ramalingam C wrote:
From: Matt Roper
DG2 unifies render compression and media compression into a single
format for the first time. The programming and buffer layout is
supposed to match compression on older
== Series Details ==
Series: Enable PXP support
URL : https://patchwork.freedesktop.org/series/96232/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10782_full -> Patchwork_21434_full
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9
(rev11)
URL : https://patchwork.freedesktop.org/series/81764/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10783 -> Patchwork_21435
Quoting Matthew Brost (2021-10-22 19:42:19)
> On Fri, Oct 22, 2021 at 12:35:04PM +0300, Joonas Lahtinen wrote:
> > Hi Matt & John,
> >
> > Can you please queue patches with the right Fixes: references to convert
> > all the GuC tracepoints to be protected by the LOW_LEVEL_TRACEPOINTS
> >
Hi,
On 10/25/21 10:25, Jani Nikula wrote:
> On Sun, 24 Oct 2021, Hans de Goede wrote:
>> Add a NO_VLV_DISP_PW_DPIO_CMN_BC_INIT quirk to fix i915 not working on
>> the Xiaomi Mi Pad 2 (with CHT x5-Z8500 SoC).
>>
>> The Xiaomi Mi Pad 2 uses quite an unusual hardware-design for a Cherry
>> Trail
On Fri, 22 Oct 2021, Lucas De Marchi wrote:
> On Thu, Oct 21, 2021 at 04:11:26PM +0300, Jani Nikula wrote:
>>On Wed, 20 Oct 2021, "Souza, Jose" wrote:
>>> On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote:
On Tue, 19 Oct 2021, José Roberto de Souza wrote:
> The constant platform
On Sun, 24 Oct 2021, Hans de Goede wrote:
> Add a NO_VLV_DISP_PW_DPIO_CMN_BC_INIT quirk to fix i915 not working on
> the Xiaomi Mi Pad 2 (with CHT x5-Z8500 SoC).
>
> The Xiaomi Mi Pad 2 uses quite an unusual hardware-design for a Cherry
> Trail tablet. It deviates from the typical reference
On Sun, 24 Oct 2021, Hans de Goede wrote:
> In intel_dsi_get_config() double the pclk returned by foo_dsi_get_pclk()
> for dual-link panels. This fixes the following WARN triggering:
>
> i915 :00:02.0: [drm] *ERROR* [CRTC:51:pipe A] mismatch in pixel_rate
> (expected 235710, found 118056)
>
== Series Details ==
Series: Enable PXP support
URL : https://patchwork.freedesktop.org/series/96232/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10782 -> Patchwork_21434
Summary
---
**SUCCESS**
No regressions
On 22/10/2021 13:06, Kai Song wrote:
Fix inconsistent IS_ERR and PTR_ERR in i915_gem_dmabuf.c
Signed-off-by: Kai Song
Pushed to drm-intel-gt-next. Thanks.
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
By default it will be off in normal builds.
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/Kconfig.debug | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index e7fd3e76f8a2..fa181693184b 100644
---
selftest --r live shows failure in suspend tests when
RPM wakelock is not acquired during suspend.
This changes addresses below error :
<4> [154.177535] RPM wakelock ref not held during HW access
<4> [154.177575] WARNING: CPU: 4 PID: 5772 at
drivers/gpu/drm/i915/intel_runtime_pm.h:113
There are recent tests added in IGT which tests PXP.
As PXP not enabled by default CI is skipping the tests.
This patch series :
1. Enables PXP
2. Fixes the crash occures(RPM wakelock not acquired)
after enabling PXP
Tejas Upadhyay (2):
drm/i915/pxp: run CI with PXP and MEI_PXP enabled.
On Fri, Oct 22, 2021 at 03:22:57PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 22, 2021 at 03:01:52PM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 22, 2021 at 12:25:33PM +0200, Claudio Suarez wrote:
> > > On Thu, Oct 21, 2021 at 04:49:59PM +0300, Ville Syrjälä wrote:
> > > > On Wed, Oct 20, 2021 at
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 6eff63a9b932a4aa1e1f6e521cd919aaf57c058f
commit: 1d51775cd3f51899ce85afab686c7f641ff32d4e [1291/1307] dma-buf: add
dma_resv selftest v4
config: arm-buildonly-randconfig-r006-20211025 (attached as .config)
compiler: clang version
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