== Series Details ==
Series: series starting with [1/4] drm/i915: Pass plane to watermark
calculation functions (rev5)
URL : https://patchwork.freedesktop.org/series/97652/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11069 -> Patchwork_21976
== Series Details ==
Series: series starting with [v8,1/6] drm: move the buddy allocator from i915
into common drm
URL : https://patchwork.freedesktop.org/series/98767/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11069_full -> Patchwork_21974_full
== Series Details ==
Series: series starting with [1/4] drm/i915: Pass plane to watermark
calculation functions (rev5)
URL : https://patchwork.freedesktop.org/series/97652/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: drm/i915: Flip guc_id allocation partition
URL : https://patchwork.freedesktop.org/series/98751/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11066_full -> Patchwork_21970_full
Summary
---
== Series Details ==
Series: Remove some hacks required for GuC 62.0.0
URL : https://patchwork.freedesktop.org/series/98773/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11069 -> Patchwork_21975
Summary
---
== Series Details ==
Series: drm/i915: Recalculate CDCLK if plane scaling ratio changes
URL : https://patchwork.freedesktop.org/series/98750/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11066_full -> Patchwork_21969_full
== Series Details ==
Series: Remove some hacks required for GuC 62.0.0
URL : https://patchwork.freedesktop.org/series/98773/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
845f929c1888 drm/i915/selftests: Add a cancel request selftest that triggers a
reset
4d510c189a0d
== Series Details ==
Series: series starting with [v8,1/6] drm: move the buddy allocator from i915
into common drm
URL : https://patchwork.freedesktop.org/series/98767/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11069 -> Patchwork_21974
== Series Details ==
Series: series starting with [v8,1/6] drm: move the buddy allocator from i915
into common drm
URL : https://patchwork.freedesktop.org/series/98767/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't
== Series Details ==
Series: series starting with [v8,1/6] drm: move the buddy allocator from i915
into common drm
URL : https://patchwork.freedesktop.org/series/98767/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
81945eba9ca4 drm: move the buddy allocator from i915 into
== Series Details ==
Series: dicsrete card 64K page support
URL : https://patchwork.freedesktop.org/series/98758/
State : failure
== Summary ==
Applying: drm/i915: enforce min GTT alignment for discrete cards
Using index info to reconstruct a base tree...
M
== Series Details ==
Series: drm/i915: Discard large BIOS framebuffers causing display corruption.
(rev3)
URL : https://patchwork.freedesktop.org/series/98683/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11066_full -> Patchwork_21968_full
Remove a hack required because schedule disable done G2H was received
before context reset G2H in GuC firmware 62.0.0. Since we have upgraded
69.0.3, this is no longer required.
Also revive selftest which proves this works before / after change.
Signed-off-by: Matthew Brost
Matthew Brost (2):
In the i915 there are several hacks in place to make request cancelation
work with an old version of the GuC which delivered the G2H indicating
schedule disable is done before G2H indicating a context reset. Version
69 fixes this, so we can remove these hacks.
Signed-off-by: Matthew Brost
---
Add a cancel request selftest that results in an engine reset to cancel
the request as it is non-preemptable. Also insert a NOP request after
the cancelled request and confirm that it completes successfully.
v2:
(Tvrtko)
- Skip test if preemption timeout compiled out
- Skip test if engine
Hi Andi,
On 2022-01-11 14:15:51, Andi Shyti wrote:
>
> From: Tvrtko Ursulin
>
> On a multi-tile platform, each tile has its own registers + GGTT
> space, and BAR 0 is extended to cover all of them.
>
> Up to four gts are supported in i915->gt[], with slot zero
> shadowing the existing
+Cc Tejasree since Lakshmi is out at the moment.
Matt
On Tue, Jan 11, 2022 at 02:17:45PM -0800, Matt Roper wrote:
> On Tue, Jan 11, 2022 at 10:45:38AM +, Patchwork wrote:
> > == Series Details ==
> >
> > Series: Start cleaning up register definitions (rev3)
> > URL :
On Tue, Jan 11, 2022 at 10:45:38AM +, Patchwork wrote:
> == Series Details ==
>
> Series: Start cleaning up register definitions (rev3)
> URL : https://patchwork.freedesktop.org/series/98575/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11061_full ->
In RFC rev2, Matt Brost requested for a comparison of the error capture from
execlist vs guc-capture.
I've added that data into the following links:
gem_exec_capture_errordump_ADLS_execlist : https://pastebin.com/RBwkHFNq
gem_exec_capture_errordump_ADLS_gucsubmission:
== Series Details ==
Series: drm/i915/psr: remove useless enum (rev2)
URL : https://patchwork.freedesktop.org/series/98468/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11067 -> Patchwork_21972
Summary
---
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98741/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11065_full -> Patchwork_21965_full
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/psr: remove useless enum (rev2)
URL : https://patchwork.freedesktop.org/series/98468/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [1/3] drm: add writeback pointers to drm_connector
URL : https://patchwork.freedesktop.org/series/98733/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11065_full -> Patchwork_21964_full
== Series Details ==
Series: drm/i915: Lock timeline mutex directly in error path of eb_pin_timeline
(rev2)
URL : https://patchwork.freedesktop.org/series/98485/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11066 -> Patchwork_21971
== Series Details ==
Series: drm/i915: Flip guc_id allocation partition
URL : https://patchwork.freedesktop.org/series/98751/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11066 -> Patchwork_21970
Summary
---
== Series Details ==
Series: drm/i915: Flip guc_id allocation partition
URL : https://patchwork.freedesktop.org/series/98751/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7c34b8acae82 drm/i915: Flip guc_id allocation partition
-:20: CHECK:MACRO_ARG_REUSE: Macro argument reuse
Acked-by: Lyude Paul
On Wed, 2021-12-15 at 11:43 +0100, Thomas Zimmermann wrote:
> Move DisplayPort functions into a separate module to reduce the size
> of the KMS helpers. Select DRM_DP_HELPER for all users of the code. To
> avoid naming conflicts, rename drm_dp_helper.c to drm_dp.c
>
> This
== Series Details ==
Series: drm/i915: Recalculate CDCLK if plane scaling ratio changes
URL : https://patchwork.freedesktop.org/series/98750/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11066 -> Patchwork_21969
Summary
On Thu, Jan 06, 2022 at 04:31:43PM -0800, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> There is a race (already documented in the code) whereby a context can
> be (re-)queued for submission at the same time as it is being banned
> due to a hang and reset. That leads to a hang/reset
== Series Details ==
Series: drm/i915: Recalculate CDCLK if plane scaling ratio changes
URL : https://patchwork.freedesktop.org/series/98750/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fe1ac4423d86 drm/i915: Recalculate CDCLK if plane scaling ratio changes
-:61:
== Series Details ==
Series: drm/i915: Discard large BIOS framebuffers causing display corruption.
(rev3)
URL : https://patchwork.freedesktop.org/series/98683/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11066 -> Patchwork_21968
On 1/11/22 2:40 PM, Vivi, Rodrigo wrote:
> On Tue, Jan 11, 2022 at 06:08:28AM -0500, Wang, Zhi A wrote:
>> On 1/11/22 6:08 AM, Wang, Zhi A wrote:
>>> On 1/11/2022 12:52 AM, Vivi, Rodrigo wrote:
On Fri, 2022-01-07 at 14:43 +, Wang, Zhi A wrote:
> Hi folks:
>
> Happy holidays!
Hi folks:
Happy holidays! This pull mostly contains the code re-factors patches from
Guenter Roeck and Rikard. Also a minor change from Zhenyu.
v3:
- Merge drm-intel-next-2021-12-14 into gvt-next
v2:
- Fix the problem of message body encoding in Thunderbird.
The following changes since
add test to check handling of misaligned offsets and sizes
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 130 ++
1 file changed, 130 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
From: Matthew Auld
On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.
v2: Fixed suggestions on formatting [Daniel]
Signed-off-by:
From: Matthew Auld
discrete cards optimise 64K GTT pages for local-memory, since everything
should be allocated at 64K granularity. We say goodbye to sparse
entries, and instead get a compact 256B page-table for 64K pages,
which should be more cache friendly. 4K pages for local-memory
are no
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the type of object we are inserting.
With this in mind update the GTT selftests to take this
into
This series continues support for 64K pages for discrete cards.
It supersedes the 64K patches from
https://patchwork.freedesktop.org/series/95686/#rev4
Changes since that series:
- set min alignment for DG2 to 2MB in i915_address_space_init
- replace coloring with simpler 2MB VA alignment for
== Series Details ==
Series: drm/i915: clean up i915_drv.h, part 2 (rev3)
URL : https://patchwork.freedesktop.org/series/98691/
State : failure
== Summary ==
Applying: drm/i915: split out i915_gem.h declarations from i915_drv.h
Using index info to reconstruct a base tree...
M
== Series Details ==
Series: series starting with [1/4] drm/i915: Pass plane to watermark
calculation functions (rev4)
URL : https://patchwork.freedesktop.org/series/97652/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11066 -> Patchwork_21966
== Series Details ==
Series: series starting with [1/4] drm/i915: Pass plane to watermark
calculation functions (rev4)
URL : https://patchwork.freedesktop.org/series/97652/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: series starting with [1/4] drm/i915: Pass plane to watermark
calculation functions (rev4)
URL : https://patchwork.freedesktop.org/series/97652/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
66961725973e drm/i915: Pass plane to watermark
On Tue, 11 Jan 2022, Stanislav Lisovskiy wrote:
> Currently we only recalculate CDCLK if active plane mask changes
> or if we do a full modeset, however according to BSpec
> required Dbuf bandwidth calculations also depend on pipe/plane
> scaling ratio, which means that CDCLK must be recalculated
Don't use the interruptable version of the timeline mutex lock in the
error path of eb_pin_timeline as the cleanup must always happen.
v2:
(John Harrison)
- Don't check for interrupt during mutex lock
v3:
(Tvrtko)
- A comment explaining why lock helper isn't used
Fixes: 544460c33821
On Mon, 2022-01-10 at 15:45 -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> Updated new values from BSPEC.
>
> BSPEC: 53920
>
Reviewed-by: José Roberto de Souza
> Cc: Jani Nikula
> Cc: José Roberto de Souza
> Cc: Imre Deak
> Signed-off-by: Clint Taylor
> ---
>
On Tue, 11 Jan 2022, "Souza, Jose" wrote:
> On Mon, 2022-01-10 at 15:45 -0800, clinton.a.tay...@intel.com wrote:
>> From: Clint Taylor
>>
>> Updated new values from BSPEC.
>>
>> BSPEC: 53920
>>
>
> Reviewed-by: José Roberto de Souza
Oh, I failed to reply that I've pushed this already. But
Move the multi-lrc guc_id from the lower allocation partition (0 to
number of multi-lrc guc_ids) to upper allocation partition (number of
single-lrc to max guc_ids).
Signed-off-by: Matthew Brost
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 57 ++-
1 file changed, 42
On Tue, Jan 11, 2022 at 06:19:10PM +0200, Jani Nikula wrote:
On Tue, 11 Jan 2022, Lucas De Marchi wrote:
On Tue, Jan 11, 2022 at 10:55:44AM +0200, Jani Nikula wrote:
On Mon, 10 Jan 2022, Ville Syrjälä wrote:
On Mon, Jan 10, 2022 at 11:57:39AM +0200, Jani Nikula wrote:
The video/vga.h has
On Mon, Jan 10, 2022 at 09:15:56PM -0800, Matt Roper wrote:
Let's start breaking up and cleaning up the massive i915_reg.h file.
We'll start by moving all registers that are defined in relation to an
engine base to their own header.
maybe reword this a little bit since now this isn't the start
On Tue, 11 Jan 2022, Lucas De Marchi wrote:
> On Tue, Jan 11, 2022 at 10:55:44AM +0200, Jani Nikula wrote:
>>On Mon, 10 Jan 2022, Ville Syrjälä wrote:
>>> On Mon, Jan 10, 2022 at 11:57:39AM +0200, Jani Nikula wrote:
The video/vga.h has macros for the VGA registers. Switch to use them.
On Tue, Jan 11, 2022 at 10:55:44AM +0200, Jani Nikula wrote:
On Mon, 10 Jan 2022, Ville Syrjälä wrote:
On Mon, Jan 10, 2022 at 11:57:39AM +0200, Jani Nikula wrote:
The video/vga.h has macros for the VGA registers. Switch to use them.
Suggested-by: Matt Roper
Signed-off-by: Jani Nikula
---
Currently we only recalculate CDCLK if active plane mask changes
or if we do a full modeset, however according to BSpec
required Dbuf bandwidth calculations also depend on pipe/plane
scaling ratio, which means that CDCLK must be recalculated
everytime plane scaling ratio changes, because it
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98741/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11065 -> Patchwork_21965
Summary
---
**SUCCESS**
No
On Mon, 10 Jan 2022, Ville Syrjälä wrote:
> On Tue, Jan 04, 2022 at 08:48:56PM +0200, Jani Nikula wrote:
>> DP_SINK_COUNT_ESI and DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0 have the same
>> contents as DP_SINK_COUNT and DP_DEVICE_SERVICE_IRQ_VECTOR,
>> respectively.
>
> IIRC there was an oversight in the
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98741/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98741/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
297fae638da5 drm/i915: Prepare for multiple GTs
-:254: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id__' - possible
== Series Details ==
Series: series starting with [1/2] drm/dp: note that DPCD 0x2002-0x2003 match
0x200-0x201 (rev2)
URL : https://patchwork.freedesktop.org/series/98480/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11063_full -> Patchwork_21962_full
== Series Details ==
Series: series starting with [1/3] drm: add writeback pointers to drm_connector
URL : https://patchwork.freedesktop.org/series/98733/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
On Tue, Jan 11, 2022 at 06:08:28AM -0500, Wang, Zhi A wrote:
> On 1/11/22 6:08 AM, Wang, Zhi A wrote:
> > On 1/11/2022 12:52 AM, Vivi, Rodrigo wrote:
> >> On Fri, 2022-01-07 at 14:43 +, Wang, Zhi A wrote:
> >>> Hi folks:
> >>>
> >>> Happy holidays! This pull mostly contains the code re-factors
== Series Details ==
Series: Add GuC Error Capture Support (rev3)
URL : https://patchwork.freedesktop.org/series/97187/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11065 -> Patchwork_21963
Summary
---
**FAILURE**
== Series Details ==
Series: Add GuC Error Capture Support (rev3)
URL : https://patchwork.freedesktop.org/series/97187/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add GuC Error Capture Support (rev3)
URL : https://patchwork.freedesktop.org/series/97187/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c3c2aef23926 drm/i915/guc: Add basic support for error capture lists
0fe87e1f9ad7 drm/i915/guc: Update GuC ADS
From: Ashish Arora
On certain 4k panels and Macs, the BIOS framebuffer is larger than what
panel requires causing display corruption. Introduce a check for the same.
Signed-off-by: Ashish Arora
Reviewed-by: Aun-Ali Zaidi
---
V2 :- Use != instead of < and >
V3 :- Mention Macs (Thanks to
On Mon, 10 Jan 2022, Matt Roper wrote:
> All MG/DKL PHY register regions are evenly spaced offset-wise (0x168000,
> 0x169000, 0x16A000, 0x16B000) so the _MMIO_PORT() macro we use to access
> their registers only needs the first two offsets. We can drop the
> _PORT3 and _PORT4 offsets which are
On Mon, 10 Jan 2022, Matt Roper wrote:
> Registers representing the MG/DKL TC PHYs (including the TC DPLLs which
> exist inside the PHY) are only needed in a couple files and on specific
> platforms; let's keep them separate from the general register pool.
>
> Cc: Jani Nikula
> Signed-off-by:
On Mon, 10 Jan 2022, Matt Roper wrote:
> These registers are only needed in a couple files and on specific
> platforms; let's keep them separate from the general register pool.
>
> Cc: Jani Nikula
> Signed-off-by: Matt Roper
Reviewed-by: Jani Nikula
> ---
>
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create a 'gt/' directory in sysfs which will contain gt0...gtN
directories related to each tile configured in the GPU. Move the
power management files inside those directories.
The previous power management
From: Tvrtko Ursulin
On a multi-tile platform, each tile has its own registers + GGTT
space, and BAR 0 is extended to cover all of them.
Up to four gts are supported in i915->gt[], with slot zero
shadowing the existing i915->gt0 to enable source compatibility
with legacy driver paths. A
Hi,
This is the second series that prepares i915 to host multitile
platforms. It introduces the for_each_gt() macro that loops over
the tiles to perform per gt actions.
This patch is a combination of two patches developed originally
by Abdiel, who introduced some refactoring during probe, and
On 1/7/22 9:52 AM, Mullati Siva wrote:
> From: Siva Mullati
>
> GVT is not supported on non-x86 platforms, So add
> dependency of X86 on config parameter DRM_I915_GVT.
>
> Signed-off-by: Siva Mullati
> ---
> drivers/gpu/drm/i915/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
Hi folks:
Happy holidays! This pull mostly contains the code re-factors patches from
Guenter Roeck and Rikard. Also a minor change from Zhenyu.
v2:
- Fix the problem of message body encoding in Thunderbird.
The following changes since commit 3bfa7d40ce736ffbbfe07127061f54b359ee2b12:
== Series Details ==
Series: series starting with [1/2] drm/dp: note that DPCD 0x2002-0x2003 match
0x200-0x201 (rev2)
URL : https://patchwork.freedesktop.org/series/98480/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11063 -> Patchwork_21962
On 1/11/22 6:08 AM, Wang, Zhi A wrote:
> On 1/11/2022 12:52 AM, Vivi, Rodrigo wrote:
>> On Fri, 2022-01-07 at 14:43 +, Wang, Zhi A wrote:
>>> Hi folks:
>>>
>>> Happy holidays! This pull mostly contains the code re-factors patches
>>> from Guenter Roeck and Rikard. Also a minor change from
== Series Details ==
Series: Start cleaning up register definitions (rev3)
URL : https://patchwork.freedesktop.org/series/98575/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21961_full
Summary
== Series Details ==
Series: series starting with [1/2] drm/dp: note that DPCD 0x2002-0x2003 match
0x200-0x201 (rev2)
URL : https://patchwork.freedesktop.org/series/98480/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
On 11/01/2022 09:13, Tvrtko Ursulin wrote:
On 09/01/2022 20:31, Colin Ian King wrote:
Don't populate the read-only array flex_regs on the stack but
instead it static const. Also makes the object code a little smaller.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/i915_perf.c | 2
On Wed, Dec 15, 2021 at 12:12 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 15.12.21 um 12:04 schrieb Jani Nikula:
> > On Wed, 15 Dec 2021, Thomas Zimmermann wrote:
> >> * move DP helper code into dp/ (Jani)
> >
> > I suggested adding the subdirectory, but I'm going to bikeshed the name,
> >
Changing vkms driver to accomadate the change of
drm_writeback_connector.base to a pointer the reason for which is
explained in the Patch(drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal, Suraj
---
drivers/gpu/drm/vkms/vkms_writeback.c | 6 +++---
1 file changed, 3
Making changes to komeda driver because we had to change
drm_writeback_connector.base into a pointer the reason for which is
expained in the Patch (drm: add writeback pointers to drm_connector).
Signed-off-by: Kandpal, Suraj
---
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2 +-
Changing drm_connector and drm_encoder feilds to pointers in
drm_writeback_connector as the elements of struct
drm_writeback_connector are:
struct drm_writeback_connector {
struct drm_connector base;
struct drm_encoder encoder;
Similarly the elements of intel_encoder and
On 10/01/2022 18:19, Teres Alexis, Alan Previn wrote:
On Mon, 2022-01-10 at 08:07 +, Tvrtko Ursulin wrote:
On 07/01/2022 17:03, Teres Alexis, Alan Previn wrote:
On Fri, 2022-01-07 at 09:03 +, Tvrtko Ursulin wrote:
On 06/01/2022 18:33, Teres Alexis, Alan Previn wrote:
On Thu,
From: John Harrison
Add not-quite-support for GuC based error capture. GuC will add error
capture capability amongst other things. In order to load the
firmware, a minimum amount of support is required on the driver side.
This adds that bare minimum.
Signed-off-by: John Harrison
---
GuC log buffer regions for debug-log-events, crash-dumps and
error-state-capture are all a single bo allocation that includes
the guc_log_buffer_state structures.
Since the error-capture region is accessed with high priority at non-
deterministic times (as part of gpu coredump) while the
Print the GuC captured error state register list (string names
and values) when gpu_coredump_state printout is invoked via
the i915 debugfs for flushing the gpu error-state that was
captured prior.
Since GuC could have reported multiple engine register dumps
in a single notification event, parse
Update GuC ADS size allocation to include space for
the lists of error state capture register descriptors.
Also, populate the lists of registers we want GuC to report back to
Host on engine reset events. This list should include global,
engine-class and engine-instance registers for every
Upon the G2H Notify-Err-Capture event, queue a worker to make a
snapshot of the error state capture logs from the GuC-log buffer
(error capture region) into an bigger interim circular buffer store
that can be parsed later during gpu coredump printing.
Also, call that worker function directly for
Add device specific tables and register lists to cover different engines
class types for GuC error state capture for XE_LP products.
Also, add runtime allocation and freeing of extended register lists
for registers that need steering identifiers that depend on
the detected HW config.
Add GuC's error capture output structures and definitions as how
they would appear in GuC log buffer's error capture subregion after
an error state capture G2H event notification.
Signed-off-by: Alan Previn
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 35
This series:
1. Supports the roll out of an upcoming GuC feature to
enable error-state-capture that allows the driver to
register lists of MMIO registers that GuC will report
during a GuC triggered engine-reset event.
2. Updates the ADS blob creation to register lists
of
On 09/01/2022 20:31, Colin Ian King wrote:
Don't populate the read-only array flex_regs on the stack but
instead it static const. Also makes the object code a little smaller.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/i915_perf.c | 2 +-
1 file changed, 1 insertion(+), 1
On Mon, 10 Jan 2022, Ville Syrjälä wrote:
> On Mon, Jan 10, 2022 at 11:57:39AM +0200, Jani Nikula wrote:
>> The video/vga.h has macros for the VGA registers. Switch to use them.
>>
>> Suggested-by: Matt Roper
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/display/intel_vga.c | 9
== Series Details ==
Series: drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference
URL : https://patchwork.freedesktop.org/series/98714/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21960_full
On Mon, 10 Jan 2022, Matt Roper wrote:
> We'd like to start splitting i915_reg.h into various domain-specific
> register files and cleaning them up. Let's move the basic macros and
> type definitions to their own header file that can be including in each
> of the new split headers.
>
> Cc: Jani
On Tue, 11 Jan 2022, Ashish Arora wrote:
> From: Ashish Arora
>
> On certain 4k panels and Macs, the BIOS framebuffer is larger than what
> panel requires causing display corruption. Introduce a check for the same.
>
>
> Signed-off-by: Ashish Arora
> Reviewed-by: Aun-Ali Zaidi
I'll defer to
On Mon, 10 Jan 2022, Ville Syrjälä wrote:
> On Fri, Dec 31, 2021 at 03:23:31PM +0200, Jani Nikula wrote:
>> On Wed, 12 Jul 2017, ville.syrj...@linux.intel.com wrote:
>> > From: Ville Syrjälä
>> >
>> > Make the atomic private object stuff less special by introducing proper
>> > base classes for
On Mon, 10 Jan 2022, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> Updated new values from BSPEC.
>
> BSPEC: 53920
>
> Cc: Jani Nikula
> Cc: José Roberto de Souza
> Cc: Imre Deak
> Signed-off-by: Clint Taylor
Reviewed-by: Jani Nikula
> ---
>
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