Spelling mistakes (triple letters) in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/i915/display/intel_color.c |2 +-
drivers/gpu/drm/i915/display/intel_pps.c |2 +-
drivers/gpu/drm/i915/gt/intel_execlists_submissio
On Fri, May 13, 2022 at 10:47:54AM +0200, Nirmoy Das wrote:
> From: Bommu Krishnaiah
>
> Enable Tile4 tiling mode on platform that supports
> Tile4 but no TileY like DG2.
>
> v3: add a function to find X-tile availability for a platform.
> v2: disable X-tile for iGPU in fastblit
> fix checkp
== Series Details ==
Series: i915: SSEU handling updates (rev2)
URL : https://patchwork.freedesktop.org/series/104244/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11693 -> Patchwork_104244v2
Summary
---
**SUCCESS**
On Mon, 23 May 2022 04:08:39 -0700, Badal Nilawar wrote:
>
A few initial comments.
> +static void
> +i915_hwmon_get_preregistration_info(struct drm_i915_private *i915)
> +{
> + struct i915_hwmon *hwmon = i915->hwmon;
> + struct intel_uncore *uncore = &i915->uncore;
> + struct i915_hwm
== Series Details ==
Series: i915: SSEU handling updates (rev2)
URL : https://patchwork.freedesktop.org/series/104244/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11693 -> Patchwork_104244v2
Summary
---
**FAILURE**
On Mon, 23 May 2022 04:08:38 -0700, Badal Nilawar wrote:
>
> This series adds the HWMON support for DG1, DG2
>
> Dale B Stimson (2):
> drm/i915/hwmon: Add HWMON power sensor support
> drm/i915/hwmon: Add HWMON energy support
I would suggest a slight reorganization of the series. I think the fi
On Mon, May 23, 2022 at 09:23:33PM +, Patchwork wrote:
> == Series Details ==
>
> Series: i915: SSEU handling updates (rev2)
> URL : https://patchwork.freedesktop.org/series/104244/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11693 -> Patchwork_104244v2
> =
== Series Details ==
Series: i915: SSEU handling updates (rev2)
URL : https://patchwork.freedesktop.org/series/104244/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11693 -> Patchwork_104244v2
Summary
---
**FAILURE**
On Mon, May 23, 2022 at 01:21:16PM +0530, Balasubramani Vivekanandan wrote:
> ADL-N being a subplatform of ADL-P, it lacks support for hwconfig
> table. Explicit check added to skip ADL-N.
>
> Signed-off-by: Balasubramani Vivekanandan
>
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt
== Series Details ==
Series: i915: SSEU handling updates (rev2)
URL : https://patchwork.freedesktop.org/series/104244/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: i915: SSEU handling updates (rev2)
URL : https://patchwork.freedesktop.org/series/104244/
State : warning
== Summary ==
Error: dim checkpatch failed
65fb3ea005ad drm/i915/xehp: Use separate sseu init function
0299a3bc6a24 drm/i915/xehp: Drop GETPARAM lookups of I91
As with EU masks, it's easier to store subslice/DSS masks internally in
a format that's more natural for the driver to work with, and then only
covert into the u8[] uapi form when the query ioctl is invoked. Since
the hardware design changed significantly with Xe_HP, we'll use a union
to choose be
== Series Details ==
Series: drm/i915/hwconfig: Report no hwconfig support on ADL-N
URL : https://patchwork.freedesktop.org/series/104270/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11690_full -> Patchwork_104270v1_full
On Thu, May 19, 2022 at 04:07:30PM -0700, Zanoni, Paulo R wrote:
On Tue, 2022-05-17 at 11:32 -0700, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
v2: Ensure proper kernel-doc formatting with cross references.
Also add new uapi and documentation as per review comments
On Mon, May 23, 2022 at 12:05:05PM -0700, Niranjana Vishwanathapura wrote:
On Thu, May 19, 2022 at 03:52:01PM -0700, Zanoni, Paulo R wrote:
On Tue, 2022-05-17 at 11:32 -0700, Niranjana Vishwanathapura wrote:
VM_BIND design document with description of intended use cases.
v2: Add more documenta
On Thu, May 19, 2022 at 03:52:01PM -0700, Zanoni, Paulo R wrote:
On Tue, 2022-05-17 at 11:32 -0700, Niranjana Vishwanathapura wrote:
VM_BIND design document with description of intended use cases.
v2: Add more documentation and format as per review comments
from Daniel.
Signed-off-by: Nira
== Series Details ==
Series: drm/i915: Media freq factor and per-gt enhancements/fixes (rev7)
URL : https://patchwork.freedesktop.org/series/102665/
State : warning
== Summary ==
Error: dim checkpatch failed
9e468bd7db66 drm/i915/gt: Add media freq factor to per-gt sysfs
10b8fc18842f drm/i915/
== Series Details ==
Series: drm/i915: Add HWMON support
URL : https://patchwork.freedesktop.org/series/104278/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11691 -> Patchwork_104278v1
Summary
---
**FAILURE**
Ser
== Series Details ==
Series: drm/i915: Add HWMON support
URL : https://patchwork.freedesktop.org/series/104278/
State : warning
== Summary ==
Error: dim checkpatch failed
461a66ade2f0 drm/i915/hwmon: Add HWMON power sensor support
Traceback (most recent call last):
File "scripts/spdxcheck.py
Hi Zhi & Zhenyu,
Please review gvt changes below, I'd prefer to get your ack included.
Thanks!
Alex
On Thu, 19 May 2022 14:33:11 -0400
Matthew Rosato wrote:
> Rather than relying on a notifier for associating the KVM with
> the group, let's assume that the association has already been
> made
== Series Details ==
Series: drm/i915/hwconfig: Report no hwconfig support on ADL-N
URL : https://patchwork.freedesktop.org/series/104270/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11690 -> Patchwork_104270v1
Summary
--
All kmalloc'd kobjects need a kobject_put() to free memory. For example in
previous code, kobj_gt_release() never gets called. The requirement of
kobject_put() now results in a slightly different code organization.
v2: s/gtn/gt/ (Andi)
Fixes: b770bcfae9ad ("drm/i915/gt: create per-tile sysfs inte
From: Dale B Stimson
Retrieve RP0 and RPn freq for media IP from PCODE and display in per-gt
sysfs. This patch adds the following files to gt/gtN sysfs:
* media_RP0_freq_mhz
* media_RPn_freq_mhz
v2: Fixed commit author (Rodrigo)
v3: Convert to new uncore interface for pcode functions
v4: Adapt t
Extend pcode initialization to pcode on different gt's.
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Signed-off-by: Ashutosh Dixit
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_driver.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
Expose new sysfs to program and retrieve media freq factor. Factor values
of 0 (dynamic), 0.5 and 1.0 are supported via a u8.8 fixed point
representation (corresponding to integer values of 0, 128 and 256
respectively).
Media freq factor is converted to media_ratio_mode for GuC. It is
programmed i
Some recent Intel dGfx platforms allow media IP to work at a different
frequency from the base GT. This patch series exposes sysfs controls for
this functionality in the new per-gt sysfs. Some enhancements and fixes to
previous per-gt functionality are also included to complete the new
functionalit
On 11/05/2022 13:42, Thomas Hellström wrote:
Hi, Bob,
On Tue, 2022-05-03 at 19:13 +, Robert Beckett wrote:
internal buffers should be shmem backed.
if a volatile buffer is requested, allow ttm to use the pool
allocator
to provide volatile pages as backing
Signed-off-by: Robert Beckett
On 11/05/2022 11:13, Thomas Hellström wrote:
Hi,
On Tue, 2022-05-03 at 19:13 +, Robert Beckett wrote:
Internal gem objects will soon just be volatile system memory region
objects.
To enable this, create a separate dummy object creation function
for gen6 ppgtt
It's not clear from the c
On 11/05/2022 15:14, Thomas Hellström wrote:
On Tue, 2022-05-03 at 19:13 +, Robert Beckett wrote:
refactor internal buffer backend to allocate volatile pages via
ttm pool allocator
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 264 -
-
On Sat, May 21, 2022 at 03:09:30PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/d12+: Disable DMC firmware flip queue handlers (rev4)
> URL : https://patchwork.freedesktop.org/series/103888/
> State : success
Pushed to drm-intel-next, thanks for the reviews.
> == Summary
On Mon, 23 May 2022, Badal Nilawar wrote:
> From: Riana Tauro
>
> As part of the System Managemenent Interface (SMI), use the HWMON
> subsystem to display current voltage
>
> Cc: Anshuman Gupta
> Signed-off-by: Riana Tauro
> Signed-off-by: Badal Nilawar
> ---
> .../ABI/testing/sysfs-driver-in
On Mon, 23 May 2022, Badal Nilawar wrote:
> From: Dale B Stimson
>
> As part of the System Managemenent Interface (SMI), use the HWMON
> subsystem to display power utilization.
>
> Signed-off-by: Dale B Stimson
> Signed-off-by: Ashutosh Dixit
> Signed-off-by: Riana Tauro
> Signed-off-by: Badal
On Mon, 23 May 2022, Badal Nilawar wrote:
> From: Dale B Stimson
>
> As part of the System Managemenent Interface (SMI), use the HWMON
> subsystem to display power utilization.
>
> Signed-off-by: Dale B Stimson
> Signed-off-by: Ashutosh Dixit
> Signed-off-by: Riana Tauro
> Signed-off-by: Badal
On Fri, May 20, 2022 at 10:28:31AM +0300, Kasireddy, Vivek wrote:
> Hi Imre,
> [...]
> > > > > @@ -131,6 +137,20 @@ int intel_digital_connector_atomic_check(struct
> > > > > drm_connector *conn,
> > > > >
> > > > > crtc_state = drm_atomic_get_new_crtc_state(state,
> > > > > new_state->crtc)
From: Dale B Stimson
As part of the System Managemenent Interface (SMI), use the HWMON
subsystem to display energy utilization
Signed-off-by: Dale B Stimson
Signed-off-by: Ashutosh Dixit
Signed-off-by: Riana Tauro
Signed-off-by: Badal Nilawar
---
.../ABI/testing/sysfs-driver-intel-i915-hwmo
From: Riana Tauro
As part of the System Managemenent Interface (SMI), use the HWMON
subsystem to display current voltage
Cc: Anshuman Gupta
Signed-off-by: Riana Tauro
Signed-off-by: Badal Nilawar
---
.../ABI/testing/sysfs-driver-intel-i915-hwmon | 8 +++
drivers/gpu/drm/i915/gt/intel_gt_reg
From: Dale B Stimson
As part of the System Managemenent Interface (SMI), use the HWMON
subsystem to display power utilization.
Signed-off-by: Dale B Stimson
Signed-off-by: Ashutosh Dixit
Signed-off-by: Riana Tauro
Signed-off-by: Badal Nilawar
---
.../ABI/testing/sysfs-driver-intel-i915-hwmo
This series adds the HWMON support for DG1, DG2
Dale B Stimson (2):
drm/i915/hwmon: Add HWMON power sensor support
drm/i915/hwmon: Add HWMON energy support
Riana Tauro (1):
drm/i915/hwmon: Add HWMON current voltage support
.../ABI/testing/sysfs-driver-intel-i915-hwmon | 43 ++
drivers/gp
On Thu, 19 May 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Give block_size()/block_offset() a "raw_" prefix since they
> both operate on the "raw" (as in not duplicated) BDB block
> contents.
>
> What actually spurred this was a conflict between intel_bios.c
> block_size() vs. block_size
On 13/05/2022 02:36, Ashutosh Dixit wrote:
Some recent Intel dGfx platforms allow media IP to work at a different
frequency from the base GT. This patch series exposes sysfs controls for
this functionality in the new per-gt sysfs. Some enhancements and fixes to
previous per-gt functionality are
On Thu, 19 May 2022, Bhanuprakash Modem wrote:
> This series will expose the Connector's max supported bpc via connector
> debugfs and Crtc's current bpc via crtc debugfs. Also move the existing
> vendor specific "output_bpc" logic to drm.
Pushed the series to drm-misc-next, thanks for that patch
On 20/05/2022 12:02, Jani Nikula wrote:
Hi all,
This is for Tvrtko to pull to cross-merge sync drm-intel-next to
drm-intel-gt-next.
Dave, Daniel, IIUC this is what you prefer over having topic branches
for all the small things that are needed between drm-intel branches. I
don't think we've d
On Mon, May 23, 2022 at 11:06:05AM +0300, Govindapillai, Vinod wrote:
> Hi Stan
>
> Pls see some comments inline..
>
> BR
> Vinod
>
> On Wed, 2022-05-18 at 13:59 +0300, Stanislav Lisovskiy wrote:
> > Otherwise we seem to get FIFO underruns. It is being disabled
> > anyway, so kind of logical to
On Fri, 20 May 2022, Ville Syrjälä wrote:
> On Fri, May 20, 2022 at 12:46:00PM +0300, Jani Nikula wrote:
>> The VBT send packet port selection was never updated for ICL+ where the
>> 2nd link is on port B instead of port C as in VLV+ DSI.
>>
>> First, single link DSI needs to use the configured p
Hi Stan
Pls see some comments inline..
BR
Vinod
On Wed, 2022-05-18 at 13:59 +0300, Stanislav Lisovskiy wrote:
> Otherwise we seem to get FIFO underruns. It is being disabled
> anyway, so kind of logical to write those as zeroes, even if
> disabling is temporary.
>
> Signed-off-by: Stanislav Lis
On 21/05/2022 00:04, Matt Roper wrote:
As with EU masks, it's easier to store subslice/DSS masks internally in
a format that's more natural for the driver to work with, and then only
covert into the u8[] uapi form when the query ioctl is invoked. Since
the hardware design changed significantly
ADL-N being a subplatform of ADL-P, it lacks support for hwconfig
table. Explicit check added to skip ADL-N.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/u
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