On Mon, Jun 20, 2022 at 12:00:46AM -0300, Jason Gunthorpe wrote:
> On Fri, Jun 17, 2022 at 01:54:05AM -0700, Christoph Hellwig wrote:
> > There is a bunch of code an comments in the iommu type1 code that
> > suggest we can pin memory that is not page backed.
>
> AFAIK you can.. The whole
On Thu, May 26, 2022 at 4:55 PM Dmitry Osipenko
wrote:
>
> Introduce a common DRM SHMEM shrinker framework that allows to reduce
> code duplication among DRM drivers by replacing theirs custom shrinker
> implementations with the generic shrinker.
>
> In order to start using DRM SHMEM shrinker
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms (rev3)
URL : https://patchwork.freedesktop.org/series/102339/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11776_full -> Patchwork_102339v3_full
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms (rev3)
URL : https://patchwork.freedesktop.org/series/102339/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11776 -> Patchwork_102339v3
Summary
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms (rev3)
URL : https://patchwork.freedesktop.org/series/102339/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms (rev3)
URL : https://patchwork.freedesktop.org/series/102339/
State : warning
== Summary ==
Error: dim checkpatch failed
7345b6d5fb21 HAX: drm/i915: force INTEL_MEI_GSC on for CI
4785ff3d2d94 drm/i915/gsc: skip irq
From: Tomas Winkler
GSC requires more operational memory than available on chip.
Reserve 4M of LMEM for GSC operation. The memory is provided to the
GSC as struct resource to the auxiliary data of the child device.
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan
From: Tomas Winkler
CC: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/debugfs.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c
index 1ce61e9e24fc..4074fec866a6 100644
---
From: Vitaly Lubart
Added transition to PXP mode in resume flow.
CC: Daniele Ceraolo Spurio
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/gsc-me.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/misc/mei/gsc-me.c
From: Vitaly Lubart
Exported common mkhi definitions from bus-fixup.c into a separate
header file mkhi.h for other driver usage.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 32 ++---
drivers/misc/mei/mkhi.h | 45
From: Tomas Winkler
Add GSC memory ready command.
The command indicates to the firmware that
extend operation memory was setup and
the firmware may enter PXP mode.
CC: Daniele Ceraolo Spurio
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/mkhi.h | 14 +-
1 file changed, 13
From: Tomas Winkler
1. Retrieve extended operational memory physical pointers from the
auxiliary device info.
2. Setup memory registers.
3. Notify firmware that the memory is ready by sending the memory
ready command.
4. Disable PXP device if GSC is not in PXP mode.
CC: Daniele Ceraolo
Parametrize operational timeouts in order
to support slow firmware on some graphic devices.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 3 +--
drivers/misc/mei/client.c| 14 +++---
drivers/misc/mei/gsc-me.c| 2 +-
Wait for reset work to complete before initiating
stop reset flow sequence.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index
From: Tomas Winkler
A work-around for a HW issue in XEHPSDV that manifests itself when SW reads
a gsc register when gsc is sending an interrupt. The work-around is
to disable interrupts and to use polling instead.
Cc: James Ausmus
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
Define GSC on XeHP SDV (Intel(R) dGPU without display)
XeHP SDV uses the same hardware settings as DG1, but uses polling
instead of interrupts and runs the firmware in slow pace due to
hardware limitations.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander
Add slow_fw flag to the gsc device definition
and pass it to mei auxiliary device.
Signed-off-by: Alexander Usyskin
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c
Add slow_fw flag to the mei auxiliary device info
to inform the mei driver about slow underlying firmware.
Such firmware will require to use larger operation timeouts.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Reviewed-by: Daniele Ceraolo Spurio
---
include/linux/mei_aux.h
From: Vitaly Lubart
Some platforms require the host to poll on the
GSC registers instead of relaying on the interrupts.
For those platforms, irq initialization should be skipped
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
Reviewed-by: Daniele
From: Daniele Ceraolo Spurio
After the new config option is merged we'll enable it by default in the
CI config, but for now just force it on via the i915 Kconfig so we can
get pre-merge CI results for it.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig.debug | 1 +
1
Add GSC support for XeHP SDV and DG2 platforms.
The series includes changes for the mei driver:
- add ability to use polling instead of interrupts
- add ability to use extended timeouts
- setup extended operational memory for GSC
The series includes changes for the i915 driver:
- allocate
On Fri, Jun 17, 2022 at 03:06:25PM -0700, Nicolin Chen wrote:
> On Fri, Jun 17, 2022 at 01:54:05AM -0700, Christoph Hellwig wrote:
> > There is a bunch of code an comments in the iommu type1 code that
> > suggest we can pin memory that is not page backed.
>
> Would you mind explaining the use
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