On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:
>
> +static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps
> *rps, u32 *max_act_freq)
> +{
> + struct intel_gt *gt = rps_to_gt(rps);
> + u32 perf_limit_reasons;
> + int err = 0;
>
> -
On Thu, 23 Jun 2022 16:21:46 -0700, Belgaumkar, Vinay wrote:
> On 6/22/2022 1:32 PM, Dixit, Ashutosh wrote:
> > On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:
> >> This test will validate we can achieve actual frequency of RP0. Pcode
> >> grants frequencies based on what GuC is
== Series Details ==
Series: series starting with [1/2] drm/i915: Correct duplicated/misplaced GT
register definitions
URL : https://patchwork.freedesktop.org/series/105619/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11805 -> Patchwork_105619v1
On Thu, Jun 23, 2022 at 11:56:56AM +0300, Jani Nikula wrote:
> On Thu, 23 Jun 2022, Thomas Zimmermann wrote:
> > Hi
> >
> > Am 23.06.22 um 10:26 schrieb Jani Nikula:
> >> On Thu, 23 Jun 2022, Thomas Zimmermann wrote:
> >>> I forgot to mention that we backmerged v5.19-rc2. That's why the list of
== Series Details ==
Series: series starting with [1/2] drm/i915: Correct duplicated/misplaced GT
register definitions
URL : https://patchwork.freedesktop.org/series/105619/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be
Actually add Jordan this time :)
> -Original Message-
> From: Chery, Nanley G
> Sent: Friday, June 24, 2022 5:39 PM
> To: Deak, Imre ; dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH] drm/fourcc: Document the Intel CCS modifiers' CC plane
>
+Jordan (FYI)
I think the commit message has an extra "color" next to "CC".
With or without that dropped,
Reviewed-by: Nanley Chery
Thanks for the fix.
> -Original Message-
> From: Deak, Imre
> Sent: Thursday, June 23, 2022 10:50 AM
> To: dri-de...@lists.freedesktop.org
> Cc:
We've been introducing new registers with a mix of "XEHP_"
(architecture) and "XEHPSDV_" (platform) prefixes. For consistency,
let's settle on "XEHP_" as the preferred form.
XEHPSDV_RP_STATE_CAP stays with its current name since that's truly a
platform-specific register and not something that
XEHPSDV_FLAT_CCS_BASE_ADDR, GEN8_L3_LRA_1_GPGPU, and MMCD_MISC_CTRL were
duplicated between i915_reg.h and intel_gt_regs.h. These are all GT
registers, so we should drop the copy from i915_reg.h.
XEHPSDV_TILE0_ADDR_RANGE was defined in i915_reg.h, but really belongs
in intel_gt_regs.h. Move it.
On Mon, Jun 20, 2022 at 08:18:04AM -0700, Rob Clark wrote:
> On Mon, Jun 20, 2022 at 7:09 AM Dmitry Osipenko
> wrote:
> >
> > On 6/19/22 20:53, Rob Clark wrote:
> > ...
> > >> +static unsigned long
> > >> +drm_gem_shmem_shrinker_count_objects(struct shrinker *shrinker,
> > >> +
Let's compare "tlb invalidate at vm unbind" vs "tlb invalidate at backing
storage":
Correctness:
consider this sequence of:
1. unbind va1 from pa1,
2. then bind va1 to pa2. //user space has the freedom to do this as it manages
virtual address space
3. Submit shader code using va1,
4. Then
On Sun, Jun 19, 2022 at 10:53:03AM -0700, Rob Clark wrote:
> On Thu, May 26, 2022 at 4:55 PM Dmitry Osipenko
> wrote:
> > + mutex_unlock(_shrinker->lock);
>
> As I mentioned on other thread, count_objects, being approximate but
> lockless and fast is the important thing. Otherwise when
On Fri, Jun 24, 2022 at 10:49:36AM -0700, Niranjana Vishwanathapura wrote:
> VM_BIND and related uapi definitions
>
> v2: Reduce the scope to simple Mesa use case.
> v3: Expand VM_UNBIND documentation and add
> I915_GEM_VM_BIND/UNBIND_FENCE_VALID
> and I915_GEM_VM_BIND_TLB_FLUSH flags.
>
On Fri, Jun 24, 2022 at 10:49:35AM -0700, Niranjana Vishwanathapura wrote:
> Add some missing i915 upai documentation which the new
> i915 VM_BIND feature documentation will be refer to.
>
> Signed-off-by: Niranjana Vishwanathapura
> Reviewed-by: Matthew Auld
> ---
>
On Fri, Jun 24, 2022 at 10:49:34AM -0700, Niranjana Vishwanathapura wrote:
> VM_BIND design document with description of intended use cases.
>
> v2: Reduce the scope to simple Mesa use case.
> v3: Expand documentation on dma-resv usage, TLB flushing and
> execbuf3.
> v4: Remove vm_bind tlb
== Series Details ==
Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL : https://patchwork.freedesktop.org/series/105608/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11804 -> Patchwork_105608v1
Summary
---
== Series Details ==
Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL : https://patchwork.freedesktop.org/series/105608/
State : warning
== Summary ==
Error: dim checkpatch failed
f158211cdc88 drm/doc/rfc: VM_BIND feature design document
-:17: WARNING:FILE_PATH_CHANGES: added,
== Series Details ==
Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL : https://patchwork.freedesktop.org/series/105608/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
VM_BIND design document with description of intended use cases.
v2: Reduce the scope to simple Mesa use case.
v3: Expand documentation on dma-resv usage, TLB flushing and
execbuf3.
v4: Remove vm_bind tlb flush request support.
v5: Update TLB flushing documentation.
Signed-off-by: Niranjana
Add some missing i915 upai documentation which the new
i915 VM_BIND feature documentation will be refer to.
Signed-off-by: Niranjana Vishwanathapura
Reviewed-by: Matthew Auld
---
include/uapi/drm/i915_drm.h | 205
1 file changed, 160 insertions(+), 45
This is the i915 driver VM_BIND feature design RFC patch series along
with the required uapi definition and description of intended use cases.
v2: Reduce the scope to simple Mesa use case.
Remove all compute related uapi, vm_bind/unbind queue support and
only support a timeline out fence
VM_BIND and related uapi definitions
v2: Reduce the scope to simple Mesa use case.
v3: Expand VM_UNBIND documentation and add
I915_GEM_VM_BIND/UNBIND_FENCE_VALID
and I915_GEM_VM_BIND_TLB_FLUSH flags.
v4: Remove I915_GEM_VM_BIND_TLB_FLUSH flag and add additional
documentation for
== Series Details ==
Series: DG2 VRAM_SR Support (rev4)
URL : https://patchwork.freedesktop.org/series/104128/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
Add d3cold_sr_lmem_threshold modparam to choose between
d3cold-off zero watt and d3cold-VRAM Self Refresh.
i915 requires to evict the lmem objects to smem in order to
support d3cold-Off. if platform does not supports vram_sr
feature then fall back to d3hot by disabling d3cold to
avoid the rpm
From: Tvrtko Ursulin
Store a pointer to respective local memory region in intel_gt so it can be
used when memory local to a GT needs to be allocated.
v2:
- Use forward decalaration instead of heder file. [Jani]
Cc: Andi Shyti
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Anshuman Gupta
Setup VRAM Self Refresh with D3COLD state.
VRAM Self Refresh will retain the context of VRAM, driver
need to save any corresponding hardware state that needs
to be restore on D3COLD exit.
v2:
- Moved intel_pcode_enable_vram_sr to intel_pm.c. [Jani]
- Removed vram_sr.lock. [Jani]
- Dropped
Add has_lmem_sr platform specific flag to know,
whether platform has VRAM self refresh support.
As of now both DG1 and DG2 client platforms supports VRAM self refresh
with D3Cold but let it enable first on DG2 as primary lead platform
for D3Cold support. Let it get enable on DG1 once this feature
Add DG2 Motherboard Down Config check condition
to intel_opregion_vram_sr_required().
v2:
- Use MBD Subplatform to check DG2 MBD. [Jani]
BSpec: 44477
Cc: Rodrigo Vivi
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_opregion.c | 2 ++
1 file changed, 2 insertions(+)
diff
Intel Client DGFX card supports D3Cold with two option.
D3Cold-off zero watt, D3Cold-VRAM Self Refresh.
i915 requires to evict the lmem objects to smem in order to
support D3Cold-Off, which increases i915 the suspend/resume
latency. Enabling VRAM Self Refresh feature optimize the
latency with
DG2 NB SKU need to distinguish between MBD and AIC to probe
the VRAM Self Refresh feature support. Adding those sub platform
accordingly.
v2:
- Adding only required MBD subplatform. [Jani, Matt]
Cc: Matt Roper
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
DGFX cards support both Add in Card(AIC) and Mother Board Down(MBD)
configs. MBD config requires HOST BIOS GPIO toggling support
in order to enable/disable vram_sr using ACPI OpRegion.
i915 requires to check OpRegion PCON MBD Config bits to
discover whether DG1 Card is MBD config before enabling
Intel DGFX cards provides a feature Video Ram Self Refrsh(vram_sr).
vram_sr can be enabled with runtime suspend D3Cold flow and with
opportunistic S0ix system wide suspend flow as well.
vram_sr feature requires Host BIOS support, vram_sr will be
enable/disable by HOST BIOS using ACPI OpRegion.
This series add DG2 D3Cold VRAM_SR support.
TODO: GT and GuC Interface state save/restore on VRAM_SR entry/exit.
Anshuman Gupta (8):
drm/i915/dgfx: OpRegion VRAM Self Refresh Support
drm/i915/dg1: OpRegion PCON DG1 MBD config support
drm/i915/dg2: Add DG2_NB_MBD subplatform
drm/i915/dg2:
On Fri, Jun 24, 2022 at 09:11:35AM +0100, Tvrtko Ursulin wrote:
On 24/06/2022 06:32, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
v2: Reduce the scope to simple Mesa use case.
v3: Expand VM_UNBIND documentation and add
I915_GEM_VM_BIND/UNBIND_FENCE_VALID
and
== Series Details ==
Series: drm: i915: fix a possible refcount leak in intel_dp_add_mst_connector()
URL : https://patchwork.freedesktop.org/series/105601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11803 -> Patchwork_105601v1
On 6/24/2022 2:46 PM, Andrzej Hajda wrote:
On 24.06.2022 13:08, Nirmoy Das wrote:
For some platfroms we use stop_machine version of
gen8_ggtt_insert_page/gen8_ggtt_insert_entries to avoid a
concurrent GGTT access bug but this causes a circular locking
dependency warning:
Possible unsafe
On 6/24/2022 2:49 PM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* drm/i915: Fix a lockdep warning at error capture (rev2)
*URL:* https://patchwork.freedesktop.org/series/105291/
*State:*failure
*Details:*
== Series Details ==
Series: drm/i915/selftests: fix subtraction overflow bug
URL : https://patchwork.freedesktop.org/series/105597/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11803 -> Patchwork_105597v1
Summary
---
Hi Hangyu
Don't know why but our CI still did not caught this patch.
Maybe it is because intel-gfx@lists.freedesktop.org needs to be in the "to"
list, try that in future patches.
Anyways I have resend it and it is properly behaving now.
https://patchwork.freedesktop.org/series/105601/
After CI
From: Hangyu Hua
If drm_connector_init fails, intel_connector_free will be called to take
care of proper free. So it is necessary to drop the refcount of port
before intel_connector_free.
Fixes: 091a4f91942a ("drm/i915: Handle drm-layer errors in
intel_dp_add_mst_connector")
Signed-off-by:
On Fri, 2022-06-24 at 09:39 +0300, Dan Carpenter wrote:
> This function is supposed to return zero or negative error codes but it
> accidentally returns true on failure.
Reviewed-by: José Roberto de Souza
>
> Fixes: 92a020747d6c ("drm/i915: Split shared dpll .get_dplls() into compute
> and
== Series Details ==
Series: drm/i915: Fix a lockdep warning at error capture (rev2)
URL : https://patchwork.freedesktop.org/series/105291/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11803 -> Patchwork_105291v2
Summary
On 24.06.2022 13:08, Nirmoy Das wrote:
For some platfroms we use stop_machine version of
gen8_ggtt_insert_page/gen8_ggtt_insert_entries to avoid a
concurrent GGTT access bug but this causes a circular locking
dependency warning:
Possible unsafe locking scenario:
CPU0
== Series Details ==
Series: drm/i915: Fix a lockdep warning at error capture (rev2)
URL : https://patchwork.freedesktop.org/series/105291/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Andrzej,
On Fri, Jun 24, 2022 at 01:35:28PM +0200, Andrzej Hajda wrote:
> On some machines hole_end can be small enough to cause subtraction
> overflow. On the other side (addr + 2 * min_alignment) can overflow
> in case of mock tests. This patch should handle both cases.
>
> Fixes:
On some machines hole_end can be small enough to cause subtraction
overflow. On the other side (addr + 2 * min_alignment) can overflow
in case of mock tests. This patch should handle both cases.
Fixes: e1c5f754067b59 ("drm/i915: Avoid overflow in computing pot_hole loop
termination")
Closes:
For some platfroms we use stop_machine version of
gen8_ggtt_insert_page/gen8_ggtt_insert_entries to avoid a
concurrent GGTT access bug but this causes a circular locking
dependency warning:
Possible unsafe locking scenario:
CPU0CPU1
== Series Details ==
Series: series starting with [01/14] fs: add per file RSS
URL : https://patchwork.freedesktop.org/series/105588/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11803 -> Patchwork_105588v1
Summary
== Series Details ==
Series: series starting with [01/14] fs: add per file RSS
URL : https://patchwork.freedesktop.org/series/105588/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [01/14] fs: add per file RSS
URL : https://patchwork.freedesktop.org/series/105588/
State : warning
== Summary ==
Error: dim checkpatch failed
babddea434e1 fs: add per file RSS
-:31: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use
On 23/06/2022 12:17, Andi Shyti wrote:
Hi Mauro,
On Wed, Jun 15, 2022 at 04:27:39PM +0100, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Don't allow two engines to be reset in parallel, as they would both
try to select a reset bit (and send requests to common registers)
and wait on that
On 23/06/2022 22:05, Zeng, Oak wrote:
-Original Message-
From: Intel-gfx On Behalf Of Tvrtko
Ursulin
Sent: June 23, 2022 7:06 AM
To: Landwerlin, Lionel G ; Vishwanathapura,
Niranjana
Cc: Zanoni, Paulo R ; intel-gfx@lists.freedesktop.org;
dri-de...@lists.freedesktop.org; Hellstrom,
On 24/06/2022 06:32, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
v2: Reduce the scope to simple Mesa use case.
v3: Expand VM_UNBIND documentation and add
I915_GEM_VM_BIND/UNBIND_FENCE_VALID
and I915_GEM_VM_BIND_TLB_FLUSH flags.
v4: Remove
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/tegra/drm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 4cdc8faf798f..cc0c2fc57250 100644
---
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/nouveau_drm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c
b/drivers/gpu/drm/nouveau/nouveau_drm.c
index
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/omapdrm/omap_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c
b/drivers/gpu/drm/omapdrm/omap_drv.c
index
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/i915/i915_driver.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index
From: Andrey Grodzovsky
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
From: Andrey Grodzovsky
Large amounts of VRAM are usually not CPU accessible, so they are not mapped
into the processes address space. But since the device drivers usually support
swapping buffers from VRAM to system memory we can still run into an out of
memory situation when userspace starts
This allows the OOM killer to make a better decision which process to reap.
Signed-off-by: Christian König
---
drivers/gpu/drm/gma500/psb_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index
Just return the size of the DMA-buf in pages since pages allocated or
mapped through DMA-bufs are usually not accounted elsewhere.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/dma-buf/dma-buf.c
Add the per file RSS to the memory management accounting.
This allows to see the per file RSS in tools like top as well.
Signed-off-by: Christian König
---
fs/proc/array.c | 7 +--
fs/proc/internal.h | 3 ++-
fs/proc/task_mmu.c | 6 --
fs/proc/task_nommu.c | 3 ++-
4 files
From: Andrey Grodzovsky
Some files allocate large amounts of memory on behalf of userspace without
any on disk backing store. This memory isn't necessarily mapped into the
address space, but should still accounts towards the RSS of a process just
like mapped shared pages do.
That information
This gives the OOM killer an additional hint which processes are
referencing shmem files with potentially no other accounting for them.
Signed-off-by: Christian König
---
mm/shmem.c | 16
1 file changed, 16 insertions(+)
diff --git a/mm/shmem.c b/mm/shmem.c
index
From: Andrey Grodzovsky
Try to make better decisions which process to kill based on
per file RSS.
Signed-off-by: Andrey Grodzovsky
---
mm/oom_kill.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/mm/oom_kill.c b/mm/oom_kill.c
index 3c6cf9e3cd66..76a5ea73eb6a
Hello everyone,
To summarize the issue I'm trying to address here: Processes can allocate
resources through a file descriptor without being held responsible for it.
I'm not explaining all the details again. See here for a more deeply
description of the problem:
== Series Details ==
Series: drm/i915: Fix error code in icl_compute_combo_phy_dpll()
URL : https://patchwork.freedesktop.org/series/105583/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11802 -> Patchwork_105583v1
Summary
This function is supposed to return zero or negative error codes but it
accidentally returns true on failure.
Fixes: 92a020747d6c ("drm/i915: Split shared dpll .get_dplls() into compute and
get phases")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
1
== Series Details ==
Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL : https://patchwork.freedesktop.org/series/105577/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11802 -> Patchwork_105577v1
Summary
---
== Series Details ==
Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL : https://patchwork.freedesktop.org/series/105577/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL : https://patchwork.freedesktop.org/series/105577/
State : warning
== Summary ==
Error: dim checkpatch failed
088efc82aee4 drm/doc/rfc: VM_BIND feature design document
-:17: WARNING:FILE_PATH_CHANGES: added,
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