== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev6)
URL : https://patchwork.freedesktop.org/series/105557/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_105557v6
===
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev6)
URL : https://patchwork.freedesktop.org/series/105557/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 2022.07.13 09:11:55 +0100, Mauro Carvalho Chehab wrote:
> Some functions seem to have been renamed without updating the kernel-doc
> markup causing warnings. Also, struct intel_vgpu_dmabuf_obj is not
> properly documented, but has a kerneld-doc markup.
>
> Fix those warnings:
> drivers/gp
> -Original Message-
> From: Hajda, Andrzej
> Sent: Wednesday, July 13, 2022 8:50 PM
> To: Jani Nikula ; Ville Syrjälä
> ; Murthy, Arun R
> Cc: Hajda, Andrzej ; Joonas Lahtinen
> ; Vivi, Rodrigo ;
> Tvrtko Ursulin ; Daniel Vetter
> ; intel-gfx@lists.freedesktop.org; dri-
> de...@lists.fre
> -Original Message-
> From: Hajda, Andrzej
> Sent: Wednesday, July 13, 2022 8:50 PM
> To: Jani Nikula ; Ville Syrjälä
> ; Murthy, Arun R
> Cc: Hajda, Andrzej ; Joonas Lahtinen
> ; Vivi, Rodrigo ;
> Tvrtko Ursulin ; Daniel Vetter
> ; intel-gfx@lists.freedesktop.org; dri-
> de...@lists.fre
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev5)
URL : https://patchwork.freedesktop.org/series/105557/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11877_full -> Patchwork_105557v5_full
=
== Series Details ==
Series: Random assortment of (mostly) GuC related patches (rev2)
URL : https://patchwork.freedesktop.org/series/106272/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11877_full -> Patchwork_106272v2_full
On Wed, Jul 13, 2022 at 09:11:57AM +0100, Mauro Carvalho Chehab wrote:
> Two documented functions don't match the kernel-doc comments,
> as reported by kernel-doc:
>
> drivers/gpu/drm/i915/intel_wakeref.h:117: warning: expecting prototype
> for intel_wakeref_get_if_in_use(). Prototype was f
On Wed, Jul 13, 2022 at 09:11:55AM +0100, Mauro Carvalho Chehab wrote:
> Some functions seem to have been renamed without updating the kernel-doc
> markup causing warnings. Also, struct intel_vgpu_dmabuf_obj is not
> properly documented, but has a kerneld-doc markup.
>
> Fix those warnings:
>
On Wed, Jul 13, 2022 at 09:11:54AM +0100, Mauro Carvalho Chehab wrote:
> There are several trivial warnings there, due to trivial things:
> - lack of function name at the kerneldoc markup;
> - undocumented structs with kernel-doc markups;
> - wrong parameter syntax.
>
> Fix s
On Wed, Jul 13, 2022 at 09:11:53AM +0100, Mauro Carvalho Chehab wrote:
> There are a couple of issues at i915 display kernel-doc markups:
>
> drivers/gpu/drm/i915/display/intel_display_debugfs.c:2238: warning:
> Function parameter or member 'intel_connector' not described in
> 'intel_conne
On Wed, Jul 13, 2022 at 09:11:51AM +0100, Mauro Carvalho Chehab wrote:
> From: Jiapeng Chong
>
> Fix the following W=1 kernel warnings:
>
> drivers/gpu/drm/i915/gvt/aperture_gm.c:308: warning: expecting prototype
> for inte_gvt_free_vgpu_resource(). Prototype was for
> intel_vgpu_free_resource()
On Wed, Jul 13, 2022 at 09:11:52AM +0100, Mauro Carvalho Chehab wrote:
> There are several trivial warnings there, due to trivial things:
> - lack of function name at the kerneldoc markup;
> - renamed functions;
> - wrong parameter syntax.
>
> Fix such warnings:
> drivers/g
On Wed, Jul 13, 2022 at 05:54:44PM -0400, Rodrigo Vivi wrote:
> On Wed, Jul 13, 2022 at 09:11:49AM +0100, Mauro Carvalho Chehab wrote:
> > From: Jiapeng Chong
> >
> > Fix the following W=1 kernel warnings:
> >
> > drivers/gpu/drm/i915/gvt/mmio_context.c:560: warning: expecting
> > prototype for
On Wed, Jul 13, 2022 at 09:11:50AM +0100, Mauro Carvalho Chehab wrote:
> From: Jiapeng Chong
>
> Fix the following W=1 kernel warnings:
>
> drivers/gpu/drm/i915/gvt/handlers.c:3066: warning: expecting prototype
> for intel_t_default_mmio_write(). Prototype was for
> intel_vgpu_default_mmio_write
On Wed, Jul 13, 2022 at 09:11:49AM +0100, Mauro Carvalho Chehab wrote:
> From: Jiapeng Chong
>
> Fix the following W=1 kernel warnings:
>
> drivers/gpu/drm/i915/gvt/mmio_context.c:560: warning: expecting
> prototype for intel_gvt_switch_render_mmio(). Prototype was for
> intel_gvt_switch_mmio()
> -Original Message-
> From: Dixit, Ashutosh
> Sent: July 12, 2022 3:48 PM
> To: Dong, Zhanjun
> Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/guc: Check for ct enabled while
> waiting for response
>
> On Thu, 16 Jun 2
Hi Dave and Daniel,
On behalf of Jani, here goes the drm-intel-fixes targeting
5.19-rc7.
Please notice that this also includes the patches you already
pulled last week. But for some reason they are not in the
5.19-rc6 yet.
Well, we always use the official -rc as the base, but if it
gets easier f
Hi Dave and Daniel,
On behalf of Tvrtko, who is recovering from Covid,
here goes the latest drm-intel-gt-next pull request
targeting 5.20.
Thanks,
Rodrigo.
Driver uAPI changes:
- All related to the Small BAR support: (and all by Matt Auld)
* add probed_cpu_visible_size
* expose the avail memor
On Wed, 2022-07-13 at 20:58 +, Souza, Jose wrote:
> On Mon, 2022-07-11 at 14:17 +0300, Jouni Högander wrote:
> > Currently PSR is left enabled when all planes are disabled if there
> > is no attached encoder in new state. This seems to be causing FIFO
> > underruns.
>
> What is the case were t
On Mon, 2022-07-11 at 14:17 +0300, Jouni Högander wrote:
> Currently PSR is left enabled when all planes are disabled if there
> is no attached encoder in new state. This seems to be causing FIFO
> underruns.
What is the case were there is no attached encoder and active_planes > 0?
>
> Fix this
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev5)
URL : https://patchwork.freedesktop.org/series/105557/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_105557v5
===
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev5)
URL : https://patchwork.freedesktop.org/series/105557/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Random assortment of (mostly) GuC related patches (rev2)
URL : https://patchwork.freedesktop.org/series/106272/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_106272v2
Summary
== Series Details ==
Series: Random assortment of (mostly) GuC related patches (rev2)
URL : https://patchwork.freedesktop.org/series/106272/
State : warning
== Summary ==
Error: dim checkpatch failed
dea3dbd81ade drm/i915: Remove bogus GEM_BUG_ON in unpark
909eeb72fb3d drm/i915/guc: Don't call
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev4)
URL : https://patchwork.freedesktop.org/series/105557/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_105557v4
===
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev4)
URL : https://patchwork.freedesktop.org/series/105557/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: ttm for stolen (rev9)
URL : https://patchwork.freedesktop.org/series/101396/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11877_full -> Patchwork_101396v9_full
Summary
---
**FA
== Series Details ==
Series: drm/i915: ttm for internal (rev3)
URL : https://patchwork.freedesktop.org/series/104909/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11877_full -> Patchwork_104909v3_full
Summary
---
**
Hi,
On 7/12/22 21:39, Hans de Goede wrote:
acpi_backlight=native is the default for these, but as the comment
explains the quirk was still necessary because even briefly registering
the acpi_video0 backlight; and then unregistering it once the native
driver showed up, was leading to issues.
Aft
We are tracking igt@i915_selftest@live@hangcheck failures with no logs here
https://gitlab.freedesktop.org/drm/intel/-/issues/6172
igt@i915_selftest@live@hangcheck - incomplete - No warnings/errors
Lakshmi.
-Original Message-
From: Roper, Matthew D
Sent: Wednesday, July 13, 2022 9:26 AM
On Wed, Jul 13, 2022 at 03:50:35AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Correct ss -> steering calculation for pre-Xe_HP platforms
> URL : https://patchwork.freedesktop.org/series/106269/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_1
On Tue, Apr 26, 2022 at 10:21:43PM +0530, Balasubramani Vivekanandan wrote:
Fast copy using non-temporal instructions for x86 currently exists at two
locations. One is implemented in i915 driver at i915/i915_memcpy.c and
another copy at drm_cache.c. The plan is to remove the duplicate
implementat
On Tue, Jul 12, 2022 at 03:05:13PM -0700, Matt Roper wrote:
Accidental use of a "SLICE" macro where a "SUBSLICE" macro was intended
causes the group ID for steering to be calculated incorrectly on
pre-Xe_HP platforms.
Fixes: 9a92732f040a ("drm/i915/gt: Add general DSS steering iterator to
intel
== Series Details ==
Series: Add support for LMEM PCIe resizable bar
URL : https://patchwork.freedesktop.org/series/106298/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11877_full -> Patchwork_106298v1_full
Summary
---
== Series Details ==
Series: drm/i915: ttm for stolen (rev9)
URL : https://patchwork.freedesktop.org/series/101396/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_101396v9
Summary
---
**SUCCESS**
HPD events during driver removal can be generated by hardware and
software frameworks - drm_dp_mst, the former we can avoid by disabling
interrupts, the latter can be triggered by any drm_dp_mst transaction,
and this is too late. Introducing suspended flag allows to solve this
chicken-egg problem.
HPD event after fbdev unregistration can cause registration of deferred
fbdev which will not be unregistered later, causing use-after-free.
To avoid it HPD handling should be suspended before fbdev unregistration.
It should fix following GPF:
[272.634530] general protection fault, probably for non
i915->hotplug.dig_port_work can be queued from intel_hpd_irq_handler
called by IRQ handler or by intel_hpd_trigger_irq called from dp_mst.
Since dp_mst is suspended after irq handler uninstall, a cleaner approach
is to cancel hpd work after intel_dp_mst_suspend, otherwise we risk
use-after-free.
I
Hi Jani, Ville, Arun,
This patchset is replacement of patch
"drm/i915/display: disable HPD workers before display driver unregister" [1].
Ive decided to split patch into two parts - fbdev and MST, there are different
issues.
Ive also dropped shutdown path, as it has slightly different requirements
== Series Details ==
Series: drm/i915: ttm for stolen (rev9)
URL : https://patchwork.freedesktop.org/series/101396/
State : warning
== Summary ==
Error: dim checkpatch failed
a9138083bda2 drm/i915/ttm: dont trample cache_level overrides during ttm move
9d3769792d14 drm/i915: limit ttm to dma32
== Series Details ==
Series: drm/i915: ttm for stolen (rev9)
URL : https://patchwork.freedesktop.org/series/101396/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: ttm for internal (rev3)
URL : https://patchwork.freedesktop.org/series/104909/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_104909v3
Summary
---
**SUCCESS**
Reviewed-by: Nirmoy Das
On 7/12/2022 7:40 PM, Matthew Auld wrote:
Since segment_pages is no longer a compile time constant, it looks the
DIV_ROUND_UP(node->size, segment_pages) breaks the 32b build. Simplest
is just to use the ULL variant, but really we should need not need more
than u32 for th
== Series Details ==
Series: Add support for LMEM PCIe resizable bar
URL : https://patchwork.freedesktop.org/series/106298/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11877 -> Patchwork_106298v1
Summary
---
**SUCC
== Series Details ==
Series: Add support for LMEM PCIe resizable bar
URL : https://patchwork.freedesktop.org/series/106298/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Commit "bcb9aa45d5a0 Revert "drm/i915: Hold reference to intel_context over
life of i915_request""
Stopped requests from maintaining a ref on the context.
This caused the contexts to be freed, releasing stolen memory while
under test, leading to false positive detection of stolen corruption.
Fix t
refactor stolen memory region to use ttm.
this necessitates using ttm resources to track reserved stolen regions
instead of drm_mm_nodes.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/display/intel_fbc.c | 78 ++--
.../gpu/drm/i915/gem/i915_gem_object_types.h | 2 -
drivers/gpu
igt_reset_engines_stolen tries to reset engines without checking if it
is possible.
Engines using GuC submission are not able to be reset from the host.
In this scenario, the reset exits early, then on the next iteration of
the each engine loop, the async teardown of the spinner request
context's
Stolen regions are not page backed or considered iomem.
Prevent flags indicating such.
This correctly prevents stolen buffers from attempting to directly map
them.
See i915_gem_object_has_struct_page() and i915_gem_object_has_iomem()
usage for where it would break otherwise.
Signed-off-by: Robert
ttm managed buffers start off with system resource definitions and ttm_tt
tracking structures allocated (though unpopulated).
currently this prevents clearing of buffers on first move to desired
placements.
The desired behaviour is to clear user allocated buffers and any kernel
buffers that specif
For situations where allocations need to fail on alloc instead of
delayed get_pages, add a new alloc flag to pin the ttm bo.
This makes sure that the resource has been allocated during buffer
creation, allowing it to fail with an error if the placement is
exhausted.
This allows existing fallback op
prepare for ttm based stolen region by using ttm range manager
as the resource manager for stolen region.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 6 ++--
drivers/gpu/drm/i915/intel_region_ttm.c | 31 +++
By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
This is divergent from existing backends code which only considers
HAS_LLC.
Testing shows that trusting snooping on gen5- is unreliable and bsw via
ggtt mappings, so limit DGFX for now and maintain previous behaviour.
Signed-of
i965G[M] cannot relocate objects above 4GiB.
Ensure ttm uses dma32 on these systems.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/intel_region_ttm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_regio
Various places within the driver override the default chosen cache_level.
Before ttm, these overrides were permanent until explicitly changed again
or for the lifetime of the buffer.
TTM movement code came along and decided that it could make that
decision at that time, which is usually well after
This series refactors i915's stolen memory region to use ttm.
v2: handle disabled stolen similar to legacy version.
relying on ttm to fail allocs works fine, but is dmesg noisy and causes
testing
dmesg warning regressions.
v3: rebase to latest drm-tip.
fix v2 code
Create a kernel only internal memory region that uses ttm pool allocator to
allocate volatile system pages.
Refactor internal buffer backend to simply allocate from this new
region.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 187 +-
drivers/
Internal/volatile buffers should not be shmem backed.
If a volatile buffer is requested, allow ttm to use the pool allocator
to provide volatile pages as backing.
Fix i915_ttm_shrink to handle !is_shmem volatile buffers by purging.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_
In commit 450cede7f380 ("drm/i915/gem: Fix the mman selftest") we fixed up
the mman selftest to allocate user buffers via smem only if we have lmem,
otherwise it uses internal buffers.
As the commit message asserts, we should only be using buffers that
userland should be able to create.
Internal b
Various places within the driver override the default chosen cache_level.
Before ttm, these overrides were permanent until explicitly changed again
or for the lifetime of the buffer.
TTM movement code came along and decided that it could make that
decision at that time, which is usually well after
Reorder scratch page allocation so that memory regions are available
to allocate the buffers
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 20 ++--
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
drivers/gpu/drm/i915/i915_dri
Internal gem objects will soon just be volatile system memory region
objects.
To enable this, create a separate dummy object creation function
for gen6 ppgtt. The object only exists as a fake object pointing to ggtt
and gains no benefit in going via the internal backend.
Instead, create a dummy gem
By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
This is divergent from existing backends code which only considers
HAS_LLC.
Testing shows that trusting snooping on gen5- is unreliable and bsw via
ggtt mappings, so limit DGFX for now and maintain previous behaviour.
Signed-of
i965G[M] cannot relocate objects above 4GiB.
Ensure ttm uses dma32 on these systems.
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/intel_region_ttm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_regio
This series refactors i915's internal buffer backend to use ttm.
It uses ttm's pool allocator to allocate volatile pages in place of the
old code which rolled its own via alloc_pages.
This is continuing progress to align all backends on using ttm.
v2: - commit message improvements to add detai
From: Priyanka Dandamudi
For testing purposes, support forcing the lmem_bar_size through a new
modparam. In CI we only have a limited number of configurations for DG2,
but we still need to be reasonably sure we get a usable device (also
verifying we report the correct values for things like
probe
From: Akeem G Abodunrin
Add support for the local memory PICe resizable bar, so that
local memory can be resized to the maximum size supported by the device,
and mapped correctly to the PCIe memory bar. It is usual that GPU
devices expose only 256MB BARs primarily to be compatible with 32-bit
sys
From: Priyanka Dandamudi
Added support to resize the bar to maximum supported.
Also, added new modparam lmem_bar_size which can resize the bar to one of the
supported sizes.
Akeem G Abodunrin (1):
drm/i915: Add support for LMEM PCIe resizable bar
Priyanka Dandamudi (1):
drm/i915: Add lmem_
== Series Details ==
Series: Fix performance regressions with TLB and add GuC support (rev2)
URL : https://patchwork.freedesktop.org/series/106293/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/106293/revisions/2/mbox/ not
applied
Applying: drm/i
Hi all,
After merging the drm-intel-fixes tree, today's linux-next build (i386
defconfig) failed like this:
x86_64-linux-gnu-ld: drivers/gpu/drm/i915/i915_scatterlist.o: in function
`i915_rsgt_from_mm_node':
i915_scatterlist.c:(.text+0x196): undefined reference to `__udivdi3'
Caused by commit
On Tue, 12 Jul 2022 at 12:46, Christian König
wrote:
>
> Make sure we can at least move and alloc TT objects without backing store.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 6 ++
> drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +-
> 2 files
== Series Details ==
Series: Fix performance regressions with TLB and add GuC support
URL : https://patchwork.freedesktop.org/series/106293/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/106293/revisions/1/mbox/ not
found
TLB invalidation is a slow operation. It should not be doing lightly, as it
causes performance regressions, like this:
[178.821002] i915 :00:02.0: [drm] *ERROR* rcs0 TLB invalidation did not
complete in 4ms!
This series contain
1) some patches that makes TLB invalidation to happen only on
From: Chris Wilson
Prepare for supporting more TLB invalidation scenarios by moving
the current MMIO invalidation to its own file.
Signed-off-by: Chris Wilson
Cc: Fei Yang
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...
From: Chris Wilson
Don't flush TLBs when the buffer is only used in the GGTT under full
control of the kernel, as there's no risk of concurrent access
and stale access from prefetch.
We only need to invalidate the TLB if they are accessible by the user.
That helps to reduce the performance regre
Add documentation for the kAPI functions that do TLB cache
invalidation via GuC.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 52 ++
1 file c
From: Prathap Kumar Valsan
Add an interface for GuC TLB actions, supporting both selective and
full TLB invalidations. After this change, when GuC is enabled,
tlb invalidations use GuC ct. Otherwise, use mmio interface.
Signed-off-by: Prathap Kumar Valsan
Cc: Niranjana Vishwanathapura
Cc: Fei
From: Prathap Kumar Valsan
For platforms supporting selective tlb invalidations, we don't need to
do a full tlb invalidation. Rather do a range based tlb invalidation for
every unbind of purged vma belongs to an active vm.
[mchehab: change moved from intel_ppgtt.c to i915_vma.c]
Signed-off-by: P
From: Prathap Kumar Valsan
Add routines to interface with GuC firmware for selective TLB invalidation
supported on XeHP.
Signed-off-by: Prathap Kumar Valsan
Cc: Matthew Brost
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche
TLB cache invalidation can happen on two different situations:
1. synchronously, at __vma_put_pages();
2. asynchronously.
On the first case, TLB cache invalidation happens inside
__vma_put_pages(). So, no need to do it later on.
However, on the second case, the pages will keep in memory
until __
From: Chris Wilson
With multi-GT devices, the object may have been bound on each GT.
Invalidate the TLBs across all GT before releasing the pages
back to the system.
Signed-off-by: Chris Wilson
Cc: Fei Yang
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.o
From: Chris Wilson
Check if the device is powered down prior to any engine activity,
as, on such cases, all the TLBs were already invalidated, so an
explicit TLB invalidation is not needed, thus reducing the
performance regression impact due to it.
This becomes more significant with GuC, as it c
From: Chris Wilson
Invalidate TLB in patch, in order to reduce performance regressions.
Currently, every caller performs a full barrier around a TLB
invalidation, ignoring all other invalidations that may have already
removed their PTEs from the cache. As this is a synchronous operation
and can
From: Prathap Kumar Valsan
Add routines to interface with GuC firmware for TLB invalidation.
Signed-off-by: Prathap Kumar Valsan
Cc: Bruce Chang
Cc: Michal Wajdeczko
Cc: Matthew Brost
Cc: Chris Wilson
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/
Add a description for the kAPI functions inside intel_tlb.c.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/intel_tlb.c | 36 +
1 file changed, 36 insertion
From: Prathap Kumar Valsan
Add support for selective TLB invalidation, which is a platform
feature supported on XeHP.
Signed-off-by: Prathap Kumar Valsan
Cc: Niranjana Vishwanathapura
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926
Add a description for intel_guc_tlb_invalidation_type enum.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 12
1 file changed, 12 insertions(+)
Add documentation to the TLB field inside
struct drm_i915_gem_object.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
1 file changed, 1 insertion(+)
dif
From: Chris Wilson
Skip all further TLB invalidations once the device is wedged and
had been reset, as, on such cases, it can no longer process instructions
on the GPU and the user no longer has access to the TLB's in each engine.
That helps to reduce the performance regression introduced by TLB
Add documentation for the 3 new members of struct intel_guc
that are used to handle TLB cache invalidation logic.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 14 +++
From: Piotr Piórkowski
Add a new way to invalidate TLB via GuC using actions 0x7002
(TLB_INVALIDATION_ALL).
Those actions will be used on upcoming patches.
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kerne
Add a kernel-doc markup to document this new macro.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/
Transform the comments for intel_guc_tlb_inval_mode into a
kernel-doc markup.
Signed-off-by: Mauro Carvalho Chehab
---
See [PATCH 00/21] at:
https://lore.kernel.org/all/cover.1657703926.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 11 +++
1 file changed,
From: Chris Wilson
Ensure that the TLB of the OA unit is also invalidated
on gen12 HW, as just invalidating the TLB of an engine is not
enough.
Cc: sta...@vger.kernel.org
Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
Signed-off-by: Chris Wilson
Cc: Fei Yang
Cc: An
== Series Details ==
Series: Dual LFP/EDP enablement (rev2)
URL : https://patchwork.freedesktop.org/series/104663/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/104663/revisions/2/mbox/ not
applied
Applying: drm/i915/bios: calculate drrs mode usi
Customer report abnormal display output while switch eDP off sometimes.
In current display disable flow, plane will be off at first. Then turn
eDP off and disable HW pipe line. We found the abnormal pixel comes
after turn plane off. Clear plane color ctl register when driver disable
plane can solve
|Reviewed-by: Nirmoy Das |
On 7/13/2022 10:12 AM, Mauro Carvalho Chehab wrote:
There are some parameters missing at the kernel-doc markups on
some gem files. Some of those are trivial enough to be added.
Document them.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large n
|Reviewed-by: Nirmoy Das|
On 7/13/2022 10:11 AM, Mauro Carvalho Chehab wrote:
Two new fields were added to __i915_gem_ttm_object_init() without
their corresponding documentation.
Document them.
Fixes: 9b78b5dade2d ("drm/i915: add i915_gem_object_create_region_at()")
Signed-off-by: Mauro Carval
On 7/13/2022 10:11 AM, Mauro Carvalho Chehab wrote:
There are several trivial issueson kernel-doc markups at gem:
drivers/gpu/drm/i915/gem/i915_gem_create.c:146: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
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