Re: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Disable PSR before disable pipe

On Thu, 2022-07-14 at 08:07 -0700, José Roberto de Souza wrote: > The issue here was on for_each_intel_encoder_mask_with_psr() over the > new_crtc_state encoder mask, so if the CRTC was being disabled mask > would be zero and it would not have any chance to disable PSR. > > So here doing

Re: [Intel-gfx] [PATCH 1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state"

On Thu, 2022-07-14 at 08:07 -0700, José Roberto de Souza wrote: > This patches fixes a issue but not in the right way as > for_each_oldnew_intel_crtc_in_state() will interate over all CRTCs > not only the crtc passed as parameter, also this two for_each loops > are not necessary and only make code

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Don't use pr_err when not necessary (rev2)

== Series Details == Series: drm/i915/guc: Don't use pr_err when not necessary (rev2) URL : https://patchwork.freedesktop.org/series/106275/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11893_full -> Patchwork_106275v2_full

Re: [Intel-gfx] [PATCH] drm/i915/guc: Don't use pr_err when not necessary

On 7/14/2022 17:40, john.c.harri...@intel.com wrote: From: John Harrison A bunch of code was copy/pasted using pr_err as the default way to report errors. However, drm_err is significantly more useful in identifying where the error came from. So update the code to use that instead.

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state" (rev2)

== Series Details == Series: series starting with [1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state" (rev2) URL : https://patchwork.freedesktop.org/series/106357/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11893_full ->

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Don't use pr_err when not necessary (rev2)

== Series Details == Series: drm/i915/guc: Don't use pr_err when not necessary (rev2) URL : https://patchwork.freedesktop.org/series/106275/ State : success == Summary == CI Bug Log - changes from CI_DRM_11893 -> Patchwork_106275v2 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Don't use pr_err when not necessary (rev2)

== Series Details == Series: drm/i915/guc: Don't use pr_err when not necessary (rev2) URL : https://patchwork.freedesktop.org/series/106275/ State : warning == Summary == Error: dim checkpatch failed f62cba4d0bd9 drm/i915/guc: Don't use pr_err when not necessary -:79: WARNING:OOM_MESSAGE:

[Intel-gfx] [PATCH] drm/i915/guc: Don't use pr_err when not necessary

From: John Harrison A bunch of code was copy/pasted using pr_err as the default way to report errors. However, drm_err is significantly more useful in identifying where the error came from. So update the code to use that instead. Signed-off-by: John Harrison ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: ttm for internal (rev4)

== Series Details == Series: drm/i915: ttm for internal (rev4) URL : https://patchwork.freedesktop.org/series/104909/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11893_full -> Patchwork_104909v4_full Summary ---

Re: [Intel-gfx] [PATCH v2 00/29] drm/kms: Stop registering multiple /sys/class/backlight devs for a single display

I assume you're probably good on review for the non-nouveau stuff, but if you end up needing any help with that feel free to poke me! On Tue, 2022-07-12 at 21:38 +0200, Hans de Goede wrote: > Hi All, > > As mentioned in my RFC titled "drm/kms: control display brightness through > drm_connector

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: ttm for stolen (rev10)

== Series Details == Series: drm/i915: ttm for stolen (rev10) URL : https://patchwork.freedesktop.org/series/101396/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11893_full -> Patchwork_101396v10_full Summary ---

Re: [Intel-gfx] [PATCH 1/1] drm/i915/guc: Update to GuC version 70.1.1

On Fri, 15 Apr 2022 at 10:15, Matt Roper wrote: > > On Tue, Apr 12, 2022 at 03:59:55PM -0700, john.c.harri...@intel.com wrote: > > From: John Harrison > > > > The latest GuC firmware drops the context descriptor pool in favour of > > passing all creation data in the create H2G. It also greatly

Re: [Intel-gfx] [PATCH v2 05/29] drm/nouveau: Don't register backlight when another backlight should be used

Reviewed-by: Lyude Paul You also have permission to push this to drm-misc-whatever On Tue, 2022-07-12 at 21:38 +0200, Hans de Goede wrote: > Before this commit when we want userspace to use the acpi_video backlight > device we register both the GPU's native backlight device and acpi_video's >

Re: [Intel-gfx] [PATCH v2 27/29] ACPI: video: Drop Clevo/TUXEDO NL5xRU and NL5xNU acpi_backlight=native quirks

Hi, On 7/13/22 19:21, Limonciello, Mario wrote: > [Public] > > > >> -Original Message- >> From: Werner Sembach >> Sent: Wednesday, July 13, 2022 12:08 >> To: Hans de Goede ; Ben Skeggs >> ; Karol Herbst ; Lyude >> ; Daniel Dadap ; Maarten >> Lankhorst ; Maxime Ripard >> ; Thomas

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state" (rev2)

== Series Details == Series: series starting with [1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state" (rev2) URL : https://patchwork.freedesktop.org/series/106357/ State : success == Summary == CI Bug Log - changes from CI_DRM_11893 -> Patchwork_106357v2

Re: [Intel-gfx] [PATCH v2 00/29] drm/kms: Stop registering multiple /sys/class/backlight devs for a single display

On Tue, Jul 12, 2022 at 9:39 PM Hans de Goede wrote: > > Hi All, > > As mentioned in my RFC titled "drm/kms: control display brightness through > drm_connector properties": > https://lore.kernel.org/dri-devel/0d188965-d809-81b5-74ce-7d30c49fe...@redhat.com/ > > The first step towards this is to

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: ttm for internal (rev4)

== Series Details == Series: drm/i915: ttm for internal (rev4) URL : https://patchwork.freedesktop.org/series/104909/ State : success == Summary == CI Bug Log - changes from CI_DRM_11893 -> Patchwork_104909v4 Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: ttm for stolen (rev10)

== Series Details == Series: drm/i915: ttm for stolen (rev10) URL : https://patchwork.freedesktop.org/series/101396/ State : success == Summary == CI Bug Log - changes from CI_DRM_11893 -> Patchwork_101396v10 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: ttm for stolen (rev10)

== Series Details == Series: drm/i915: ttm for stolen (rev10) URL : https://patchwork.freedesktop.org/series/101396/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: ttm for stolen (rev10)

== Series Details == Series: drm/i915: ttm for stolen (rev10) URL : https://patchwork.freedesktop.org/series/101396/ State : warning == Summary == Error: dim checkpatch failed fc7cf622891a drm/i915/ttm: dont trample cache_level overrides during ttm move 65b85eed04f1 drm/i915: limit ttm to

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state"

== Series Details == Series: series starting with [1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state" URL : https://patchwork.freedesktop.org/series/106357/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11893 -> Patchwork_106357v1

Re: [Intel-gfx] [PATCH v2 16/21] drm/i915: Define GuC Based TLB invalidation routines

On 14.07.2022 14:06, Mauro Carvalho Chehab wrote: > From: Prathap Kumar Valsan > > Add routines to interface with GuC firmware for selective TLB invalidation > supported on XeHP. > > Signed-off-by: Prathap Kumar Valsan > Cc: Matthew Brost > Signed-off-by: Mauro Carvalho Chehab > --- > >

Re: [Intel-gfx] [PATCH v2] drm/i915/display: Ensure PSR gets disabled if no encoders in new state

On Thu, 2022-07-14 at 07:22 +, Hogander, Jouni wrote: > On Wed, 2022-07-13 at 21:04 +, Souza, Jose wrote: > > On Wed, 2022-07-13 at 20:58 +, Souza, Jose wrote: > > > On Mon, 2022-07-11 at 14:17 +0300, Jouni Högander wrote: > > > > Currently PSR is left enabled when all planes are

[Intel-gfx] [PATCH 1/2] Revert "drm/i915/display: Ensure PSR gets disabled if no encoders in new state"

This patches fixes a issue but not in the right way as for_each_oldnew_intel_crtc_in_state() will interate over all CRTCs not only the crtc passed as parameter, also this two for_each loops are not necessary and only make code harder to understand. Proper fix will be discussed in the next patch.

[Intel-gfx] [PATCH 2/2] drm/i915/psr: Disable PSR before disable pipe

The issue here was on for_each_intel_encoder_mask_with_psr() over the new_crtc_state encoder mask, so if the CRTC was being disabled mask would be zero and it would not have any chance to disable PSR. So here doing for_each_intel_encoder_mask_with_psr() over the old_crtc_state encoder mask and

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: stop HPD workers before display driver unregister (rev6)

On 14.07.2022 12:42, Patchwork wrote: *Patch Details* *Series:* drm/i915/display: stop HPD workers before display driver unregister (rev6) *URL:* https://patchwork.freedesktop.org/series/105557/ *State:*failure *Details:*

[Intel-gfx] [PULL] drm-misc-next-fixes

Hi Dave and Daniel, here's the first PR for drm-misc-next-fixes for v5.20. Best regards Thomas drm-misc-next-fixes-2022-07-14: Short summary of fixes: - dma-buf: revert change to fence handling - mgag200: fix PCI register initialization The following changes since commit

Re: [Intel-gfx] [PATCH v2 09/21] drm/i915/guc: Define CTB based TLB invalidation routines

On 14.07.2022 14:06, Mauro Carvalho Chehab wrote: > From: Prathap Kumar Valsan > > Add routines to interface with GuC firmware for TLB invalidation. > > Signed-off-by: Prathap Kumar Valsan > Cc: Bruce Chang > Cc: Michal Wajdeczko > Cc: Matthew Brost > Cc: Chris Wilson > Signed-off-by:

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Fix performance regressions with TLB and add GuC support (rev3)

== Series Details == Series: Fix performance regressions with TLB and add GuC support (rev3) URL : https://patchwork.freedesktop.org/series/106293/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/106293/revisions/3/mbox/ not applied Applying:

[Intel-gfx] [PATCH v2 04/21] drm/i915/gt: Only invalidate TLBs exposed to user manipulation

From: Chris Wilson Don't flush TLBs when the buffer is only used in the GGTT under full control of the kernel, as there's no risk of concurrent access and stale access from prefetch. We only need to invalidate the TLB if they are accessible by the user. That helps to reduce the performance

[Intel-gfx] [PATCH v2 16/21] drm/i915: Define GuC Based TLB invalidation routines

From: Prathap Kumar Valsan Add routines to interface with GuC firmware for selective TLB invalidation supported on XeHP. Signed-off-by: Prathap Kumar Valsan Cc: Matthew Brost Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were

[Intel-gfx] [PATCH v2 14/21] drm/i915: document tlb field at struct drm_i915_gem_object

Add documentation to the TLB field inside struct drm_i915_gem_object. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at:

[Intel-gfx] [PATCH v2 13/21] drm/i915: Invalidate the TLBs on each GT

From: Chris Wilson With multi-GT devices, the object may have been bound on each GT. Invalidate the TLBs across all GT before releasing the pages back to the system. Signed-off-by: Chris Wilson Cc: Fei Yang Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of

[Intel-gfx] [PATCH v2 17/21] drm/i915: Add generic interface for tlb invalidation for XeHP

From: Prathap Kumar Valsan Add an interface for GuC TLB actions, supporting both selective and full TLB invalidations. After this change, when GuC is enabled, tlb invalidations use GuC ct. Otherwise, use mmio interface. Signed-off-by: Prathap Kumar Valsan Cc: Niranjana Vishwanathapura Cc: Fei

[Intel-gfx] [PATCH v2 15/21] drm/i915: Add platform macro for selective tlb flush

From: Prathap Kumar Valsan Add support for selective TLB invalidation, which is a platform feature supported on XeHP. Signed-off-by: Prathap Kumar Valsan Cc: Niranjana Vishwanathapura Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing

[Intel-gfx] [PATCH v2 02/21] drm/i915/gt: document with_intel_gt_pm_if_awake()

Add a kernel-doc markup to document this new macro. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mche...@kernel.org/

[Intel-gfx] [PATCH v2 08/21] drm/i915/gt: Move TLB invalidation to its own file

From: Chris Wilson Prepare for supporting more TLB invalidation scenarios by moving the current MMIO invalidation to its own file. Signed-off-by: Chris Wilson Cc: Fei Yang Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C

[Intel-gfx] [PATCH v2 00/21] Fix performance regressions with TLB and add GuC support

TLB invalidation is a slow operation. It should not be doing lightly, as it causes performance regressions, like this: [178.821002] i915 :00:02.0: [drm] *ERROR* rcs0 TLB invalidation did not complete in 4ms! This series contain 1) some patches that makes TLB invalidation to happen only on

[Intel-gfx] [PATCH v2 01/21] drm/i915/gt: Ignore TLB invalidations on idle engines

From: Chris Wilson Check if the device is powered down prior to any engine activity, as, on such cases, all the TLBs were already invalidated, so an explicit TLB invalidation is not needed, thus reducing the performance regression impact due to it. This becomes more significant with GuC, as it

[Intel-gfx] [PATCH v2 19/21] drm/i915/gt: document TLB cache invalidation functions

Add a description for the kAPI functions inside intel_tlb.c. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mche...@kernel.org/

[Intel-gfx] [PATCH v2 12/21] drm/i915/guc: Introduce TLB_INVALIDATION_ALL action

From: Piotr Piórkowski Add a new way to invalidate TLB via GuC using actions 0x7002 (TLB_INVALIDATION_ALL). Those actions will be used on upcoming patches. Signed-off-by: Piotr Piórkowski Cc: Michal Wajdeczko Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number

[Intel-gfx] [PATCH v2 20/21] drm/i915/guc: describe enum intel_guc_tlb_invalidation_type

Add a description for intel_guc_tlb_invalidation_type enum. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mche...@kernel.org/

[Intel-gfx] [PATCH v2 03/21] drm/i915/gt: Invalidate TLB of the OA unit at TLB invalidations

From: Chris Wilson Ensure that the TLB of the OA unit is also invalidated on gen12 HW, as just invalidating the TLB of an engine is not enough. Cc: sta...@vger.kernel.org Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") Signed-off-by: Chris Wilson Cc: Fei Yang Cc:

[Intel-gfx] [PATCH v2 06/21] drm/i915/gt: Batch TLB invalidations

From: Chris Wilson Invalidate TLB in patch, in order to reduce performance regressions. Currently, every caller performs a full barrier around a TLB invalidation, ignoring all other invalidations that may have already removed their PTEs from the cache. As this is a synchronous operation and can

[Intel-gfx] [PATCH v2 21/21] drm/i915/guc: document TLB cache invalidation functions

Add documentation for the kAPI functions that do TLB cache invalidation via GuC. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at:

[Intel-gfx] [PATCH v2 09/21] drm/i915/guc: Define CTB based TLB invalidation routines

From: Prathap Kumar Valsan Add routines to interface with GuC firmware for TLB invalidation. Signed-off-by: Prathap Kumar Valsan Cc: Bruce Chang Cc: Michal Wajdeczko Cc: Matthew Brost Cc: Chris Wilson Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of

[Intel-gfx] [PATCH v2 05/21] drm/i915/gt: Skip TLB invalidations once wedged

From: Chris Wilson Skip all further TLB invalidations once the device is wedged and had been reset, as, on such cases, it can no longer process instructions on the GPU and the user no longer has access to the TLB's in each engine. That helps to reduce the performance regression introduced by

[Intel-gfx] [PATCH v2 18/21] drm/i915: Use selective tlb invalidations where supported

From: Prathap Kumar Valsan For platforms supporting selective tlb invalidations, we don't need to do a full tlb invalidation. Rather do a range based tlb invalidation for every unbind of purged vma belongs to an active vm. [mchehab: change moved from intel_ppgtt.c to i915_vma.c] Signed-off-by:

[Intel-gfx] [PATCH v2 10/21] drm/i915/guc: use kernel-doc for enum intel_guc_tlb_inval_mode

Transform the comments for intel_guc_tlb_inval_mode into a kernel-doc markup. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at:

[Intel-gfx] [PATCH v2 11/21] drm/i915/guc: document the TLB invalidation struct members

Add documentation for the 3 new members of struct intel_guc that are used to handle TLB cache invalidation logic. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at:

[Intel-gfx] [PATCH v2 07/21] drm/i915/gt: describe the new tlb parameter at i915_vma_resource

TLB cache invalidation can happen on two different situations: 1. synchronously, at __vma_put_pages(); 2. asynchronously. On the first case, TLB cache invalidation happens inside __vma_put_pages(). So, no need to do it later on. However, on the second case, the pages will keep in memory until

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev4)

== Series Details == Series: Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev4) URL : https://patchwork.freedesktop.org/series/104704/ State : failure == Summary == Error: patch

Re: [Intel-gfx] [PATCH v3 4/7] drm/i915: Check for integer truncation on the configuration of ttm place

On Thu, 14 Jul 2022 12:08:04 +0300 Gwan-gyeong Mun wrote: > There is an impedance mismatch between the first/last valid page > frame number of ttm place in unsigned and our memory/page accounting in > unsigned long. > As the object size is under the control of userspace, we have to be prudent >

Re: [Intel-gfx] [PATCH v3 2/7] drm/i915/gem: Typecheck page lookups

On Thu, 14 Jul 2022 12:08:02 +0300 Gwan-gyeong Mun wrote: > From: Chris Wilson > > We need to check that we avoid integer overflows when looking up a page, > and so fix all the instances where we have mistakenly used a plain > integer instead of a more suitable long. Be pedantic and add

Re: [Intel-gfx] [PATCH v3 2/7] drm: Add drm_memcpy_from_wc() variant which accepts destination address

Am 13.07.22 um 17:47 schrieb Lucas De Marchi: On Tue, Apr 26, 2022 at 10:21:43PM +0530, Balasubramani Vivekanandan wrote: Fast copy using non-temporal instructions for x86 currently exists at two locations. One is implemented in i915 driver at i915/i915_memcpy.c and another copy at

Re: [Intel-gfx] [PATCH v3 1/7] drm: Move and add a few utility macros into drm util header

On Thu, 14 Jul 2022 12:08:01 +0300 Gwan-gyeong Mun wrote: > It moves overflows_type utility macro into drm util header from i915_utils > header. The overflows_type can be used to catch the truncation between data > types. And it adds safe_conversion() macro which performs a type conversion >

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: stop HPD workers before display driver unregister (rev6)

== Series Details == Series: drm/i915/display: stop HPD workers before display driver unregister (rev6) URL : https://patchwork.freedesktop.org/series/105557/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11877_full -> Patchwork_105557v6_full

Re: [Intel-gfx] [PATCH v2 06/39] drm/i915: gt: fix some Kernel-doc issues

On Wed, 13 Jul 2022 18:07:44 -0400 Rodrigo Vivi wrote: > On Wed, Jul 13, 2022 at 09:11:54AM +0100, Mauro Carvalho Chehab wrote: > > There are several trivial warnings there, due to trivial things: > > - lack of function name at the kerneldoc markup; > > - undocumented structs with

Re: [Intel-gfx] [PATCH v2 05/39] drm/i915: display: fix kernel-doc markup warnings

On Wed, 13 Jul 2022 18:05:06 -0400 Rodrigo Vivi wrote: > On Wed, Jul 13, 2022 at 09:11:53AM +0100, Mauro Carvalho Chehab wrote: > > There are a couple of issues at i915 display kernel-doc markups: > > > > drivers/gpu/drm/i915/display/intel_display_debugfs.c:2238: warning: > > Function

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/fbdev: suspend HPD before fbdev unregistration

On 14.07.2022 05:09, Murthy, Arun R wrote: -Original Message- From: Hajda, Andrzej Sent: Wednesday, July 13, 2022 8:50 PM To: Jani Nikula ; Ville Syrjälä ; Murthy, Arun R Cc: Hajda, Andrzej ; Joonas Lahtinen ; Vivi, Rodrigo ; Tvrtko Ursulin ; Daniel Vetter ;

Re: [Intel-gfx] [PATCH] dma-buf: revert "return only unsignaled fences in dma_fence_unwrap_for_each v3"

Hi Am 14.07.22 um 11:13 schrieb Christian König: Am 14.07.22 um 11:06 schrieb Thomas Zimmermann: Hi Am 14.07.22 um 10:49 schrieb Christian König: Hi Thomas, Am 14.07.22 um 10:40 schrieb Thomas Zimmermann: Hi Christian Am 12.07.22 um 12:28 schrieb Christian König: This reverts commit

[Intel-gfx] [PATCH v3 7/7] drm/i915: Remove truncation warning for large objects

From: Chris Wilson Having addressed the issues surrounding incorrect types for local variables and potential integer truncation in using the scatterlist API, we have closed all the loop holes we had previously identified with dangerously large object creation. As such, we can eliminate the

[Intel-gfx] [PATCH v3 6/7] drm/i915: Use error code as -E2BIG when the size of gem ttm object is too large

The ttm_bo_init_reserved() functions returns -ENOSPC if the size is too big to add vma. The direct function that returns -ENOSPC is drm_mm_insert_node_in_range(). To handle the same error as other code returning -E2BIG when the size is too large, it converts return value to -E2BIG.

[Intel-gfx] [PATCH v3 3/7] drm/i915: Check for integer truncation on scatterlist creation

From: Chris Wilson There is an impedance mismatch between the scatterlist API using unsigned int and our memory/page accounting in unsigned long. That is we may try to create a scatterlist for a large object that overflows returning a small table into which we try to fit very many pages. As the

[Intel-gfx] [PATCH v3 5/7] drm/i915: Check if the size is too big while creating shmem file

The __shmem_file_setup() function returns -EINVAL if size is greater than MAX_LFS_FILESIZE. To handle the same error as other code that returns -E2BIG when the size is too large, it add a code that returns -E2BIG when the size is larger than the size that can be handled. Signed-off-by:

[Intel-gfx] [PATCH v3 4/7] drm/i915: Check for integer truncation on the configuration of ttm place

There is an impedance mismatch between the first/last valid page frame number of ttm place in unsigned and our memory/page accounting in unsigned long. As the object size is under the control of userspace, we have to be prudent and catch the conversion errors. To catch the implicit truncation as

[Intel-gfx] [PATCH v3 1/7] drm: Move and add a few utility macros into drm util header

It moves overflows_type utility macro into drm util header from i915_utils header. The overflows_type can be used to catch the truncation between data types. And it adds safe_conversion() macro which performs a type conversion (cast) of an source value into a new variable, checking that the

[Intel-gfx] [PATCH v3 2/7] drm/i915/gem: Typecheck page lookups

From: Chris Wilson We need to check that we avoid integer overflows when looking up a page, and so fix all the instances where we have mistakenly used a plain integer instead of a more suitable long. Be pedantic and add integer typechecking to the lookup so that we can be sure that we are safe.

[Intel-gfx] [PATCH v3 0/7] Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

This patch series fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation, etc. We need to check that we avoid integer overflows when looking up a page, and so fix all the instances where we have mistakenly used a plain integer instead

Re: [Intel-gfx] [PATCH] dma-buf: revert "return only unsignaled fences in dma_fence_unwrap_for_each v3"

Hi Am 14.07.22 um 10:49 schrieb Christian König: Hi Thomas, Am 14.07.22 um 10:40 schrieb Thomas Zimmermann: Hi Christian Am 12.07.22 um 12:28 schrieb Christian König: This reverts commit 8f61973718485f3e89bc4f408f929048b7b47c83. I only found this commit in drm-misc-next. Should the revert

Re: [Intel-gfx] [PATCH v2 01/39] drm/i915/gvt: Fix kernel-doc for intel_gvt_switch_mmio()

On Wed, 13 Jul 2022 18:00:59 -0400 Rodrigo Vivi wrote: > On Wed, Jul 13, 2022 at 05:54:44PM -0400, Rodrigo Vivi wrote: > > On Wed, Jul 13, 2022 at 09:11:49AM +0100, Mauro Carvalho Chehab wrote: > > > From: Jiapeng Chong > > > > > > Fix the following W=1 kernel warnings: > > > > > >

Re: [Intel-gfx] [PATCH] dma-buf: revert "return only unsignaled fences in dma_fence_unwrap_for_each v3"

Hi Christian Am 12.07.22 um 12:28 schrieb Christian König: This reverts commit 8f61973718485f3e89bc4f408f929048b7b47c83. I only found this commit in drm-misc-next. Should the revert be cherry-picked into drm-misc-next-fixes? Best regards Thomas It turned out that this is not correct.

Re: [Intel-gfx] [PATCH v2] drm/i915/display: Ensure PSR gets disabled if no encoders in new state

On Wed, 2022-07-13 at 21:04 +, Souza, Jose wrote: > On Wed, 2022-07-13 at 20:58 +, Souza, Jose wrote: > > On Mon, 2022-07-11 at 14:17 +0300, Jouni Högander wrote: > > > Currently PSR is left enabled when all planes are disabled if > > > there > > > is no attached encoder in new state. This

[Intel-gfx] [PULL] drm-misc-fixes

Hi Dave, Daniel, Here's this week drm-misc-fixes PR Maxime drm-misc-fixes-2022-07-14: Only a revert for amdgpu reverting the switch to the drm buddy allocator. The following changes since commit b68277f19e31a25312c4acccadb5cf1502e52e84: drm/ssd130x: Fix pre-charge period setting (2022-07-07

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: stop HPD workers before display driver unregister (rev6)

== Series Details == Series: drm/i915/display: stop HPD workers before display driver unregister (rev6) URL : https://patchwork.freedesktop.org/series/105557/ State : success == Summary == CI Bug Log - changes from CI_DRM_11877 -> Patchwork_105557v6

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: stop HPD workers before display driver unregister (rev6)

== Series Details == Series: drm/i915/display: stop HPD workers before display driver unregister (rev6) URL : https://patchwork.freedesktop.org/series/105557/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked