== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling
URL : https://patchwork.freedesktop.org/series/110970/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390_full -> Patchwork_110970v1_full
== Series Details ==
Series: linux-next: build failure after merge of the drm-misc tree
URL : https://patchwork.freedesktop.org/series/111006/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/111006/revisions/1/mbox/ not
applied
Patch is empty.
Hi all,
After merging the drm-misc tree, today's linux-next build (powerpc
ppc44x_defconfig) failed like this:
ld: drivers/video/fbdev/core/fbmon.o: in function `fb_modesetting_disabled':
fbmon.c:(.text+0x1e4): multiple definition of `fb_modesetting_disabled';
== Series Details ==
Series: mei: add timeout to send (rev3)
URL : https://patchwork.freedesktop.org/series/110495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390_full -> Patchwork_110495v3_full
Summary
---
== Series Details ==
Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test
pattern (rev4)
URL : https://patchwork.freedesktop.org/series/108636/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12391 -> Patchwork_108636v4
Hi Rodrigo,
On 15-11-2022 20:57, Rodrigo Vivi wrote:
On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
From: Vinay Belgaumkar
By defaut idle mesaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
v2:
- Fix review comments
On 2022.11.17 03:37:17 +, Vivi, Rodrigo wrote:
> On Thu, 2022-11-17 at 11:02 +0800, Zhenyu Wang wrote:
> > On 2022.11.15 10:36:59 -0500, Rodrigo Vivi wrote:
> > > On Fri, Nov 11, 2022 at 04:59:03PM +0800, Zhenyu Wang wrote:
> > > > Hi,
> > > >
> > > > Here's current accumulated changes in
On Fri, Nov 11, 2022 at 03:17:08PM -0700, Jim Cromie wrote:
> hi Jason, Greg, DRM-folk,
>
> drm.debug-on-dyndbg has a regression due to a chicken-&-egg problem;
> drm.debug is applied to enable dyndbg callsites before the dependent
> modules' callsites are available to be enabled.
>
> My "fixes"
On Fri, Nov 11, 2022 at 03:17:09PM -0700, Jim Cromie wrote:
> drm.debug-on-dyndbg has a regression, due to a chicken-egg
> initialization problem:
>
> 1- modprobe i915
>i915 needs drm.ko, which is loaded 1st
>
> 2- "modprobe drm drm.debug=0x1ff" (virtual/implied)
>drm.debug is set
Bspecs has updated recently to remove the restriction to disable
DDI/Transcoder before setting PHY test pattern. This update is to
address PHY compliance test failures observed on a port with LTTPR.
The issue is that when Transc. is disabled, the main link signals fed
to LTTPR will be dropped
On 2022.11.17 03:37:17 +, Vivi, Rodrigo wrote:
> On Thu, 2022-11-17 at 11:02 +0800, Zhenyu Wang wrote:
> > On 2022.11.15 10:36:59 -0500, Rodrigo Vivi wrote:
> > > On Fri, Nov 11, 2022 at 04:59:03PM +0800, Zhenyu Wang wrote:
> > > > Hi,
> > > >
> > > > Here's current accumulated changes in
On Thu, 2022-11-17 at 11:02 +0800, Zhenyu Wang wrote:
> On 2022.11.15 10:36:59 -0500, Rodrigo Vivi wrote:
> > On Fri, Nov 11, 2022 at 04:59:03PM +0800, Zhenyu Wang wrote:
> > > Hi,
> > >
> > > Here's current accumulated changes in gvt-next. Sorry that I
> > > delayed
> > > to refresh them on time
== Series Details ==
Series: drm/i915: Fix timeout handling when retiring requests
URL : https://patchwork.freedesktop.org/series/110964/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12389_full -> Patchwork_110964v1_full
On 2022.11.15 10:36:59 -0500, Rodrigo Vivi wrote:
> On Fri, Nov 11, 2022 at 04:59:03PM +0800, Zhenyu Wang wrote:
> > Hi,
> >
> > Here's current accumulated changes in gvt-next. Sorry that I delayed
> > to refresh them on time for upstream...It contains mostly kernel doc,
> > typo fixes and small
== Series Details ==
Series: series starting with [1/1] drm/i915: use the original Wa_14010685332
for PCH_ADP
URL : https://patchwork.freedesktop.org/series/110988/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12391 -> Patchwork_110988v1
== Series Details ==
Series: series starting with [1/1] drm/i915: use the original Wa_14010685332
for PCH_ADP
URL : https://patchwork.freedesktop.org/series/110988/
State : warning
== Summary ==
Error: dim checkpatch failed
8187aa163d26 drm/i915: use the original Wa_14010685332 for PCH_ADP
Hi Daniele,
On Thu, Nov 10, 2022 at 04:56:51PM -0800, Daniele Ceraolo Spurio wrote:
> The fence is always initialized in huc_init_early, but the cleanup in
> huc_fini is only being run if HuC is enabled. This causes a leaking of
> the debug object when HuC is disabled/not supported, which can in
Bspec: 33450 lists 2 sequences for Wa_14010685332.
The original sequence was implemented for PCH_ICP+
commit b896898c7369 implemented the tweaked verson for ICP, JSP and MCC
commit b8441b288d60 removed the orignal and applied the tweaked one to
all PCHs(CNP+), and caused regressions on ADP.
== Series Details ==
Series: drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev4)
URL : https://patchwork.freedesktop.org/series/109429/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_109429v4
== Series Details ==
Series: series starting with [1/2] drm/ttm: Clean up page shift operation
URL : https://patchwork.freedesktop.org/series/110957/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12389_full -> Patchwork_110957v1_full
On Wed, Nov 16, 2022 at 01:50:39PM -0800, Anusha Srivatsa wrote:
> From: Ville Syrjälä
>
> For MTL, changing cdclk from between certain frequencies has
> both squash and crawl. Use the current cdclk config and
> the new(desired) cdclk config to construct a mid cdclk config.
> Set the cdclk
== Series Details ==
Series: drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev4)
URL : https://patchwork.freedesktop.org/series/109429/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Nov 16, 2022 at 09:49:20PM +, Patchwork wrote:
> == Series Details ==
>
> Series: mei: add timeout to send (rev3)
> URL : https://patchwork.freedesktop.org/series/110495/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_12390 -> Patchwork_110495v3
>
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling
URL : https://patchwork.freedesktop.org/series/110986/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_110986v1
Ensure i915_pxp_tee_component_bind / unbind implicitly sorts out
getting the correct per-GT PXP control-context from the PXP-owning-GT
when establishing or ending connection. Thus, replace _i915_to_pxp_gt
with intel_pxp_get_owning_gt (also takes in i915).
Signed-off-by: Alan Previn
Reviewed-by:
Make intel_pxp_is_start implicitly find the PXP-owning-GT.
Callers of this function shall now pass in i915 since PXP
is a global GPU feature. Make intel_pxp_start implicitly
find the right gt to start PXP arb session so
it's transparent to the callers.
Signed-off-by: Alan Previn
Reviewed-by:
Make intel_pxp_key_check implicitly find the PXP-owning-GT.
Callers of this function shall now pass in i915 since PXP
is a global GPU feature. Make intel_pxp_key_check implicitly
find the right gt to verify pxp session key establishment count
so it's transparent to the callers.
Signed-off-by:
Make intel_pxp_is_active a global check and implicitly find
the PXP-owning-GT.
As per prior two patches, callers of this function shall now
pass in i915 since PXP is a global GPU feature. Make
intel_pxp_is_active implicitly find the right gt so it's transparent
for global view callers (like
Make intel_pxp_is_enabled a global check and implicitly find the
PXP-owning-GT.
PXP feature support is a device-config flag. In preparation for MTL
PXP control-context shall reside on of the two GT's. That said,
update intel_pxp_is_enabled to take in i915 as its input and internally
find the
MTL has two tiles that is represented by the intel_gt structure in the i915
code. The PXP feature has a control-structure that contains the PXP context
and this hangs of the intel_gt structure. In MTL, the standalone media tile
(i.e. not the root tile) contains the VDBOX and KCR engine which is
In preparation for future MTL-PXP feature support, PXP control
context should only valid on the correct gt tile. Depending on the
device-info this depends on which tile owns the VEBOX and KCR.
PXP is still a global feature though (despite its control-context
located in the owning GT structure).
== Series Details ==
Series: i915: CAGF and RC6 changes for MTL (rev14)
URL : https://patchwork.freedesktop.org/series/108156/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_108156v14
Summary
---
== Series Details ==
Series: drm/i915: Finish (de)gamma readout (rev9)
URL : https://patchwork.freedesktop.org/series/79614/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_79614v9
Summary
---
== Series Details ==
Series: drm/i915/edp: wait power off delay at driver remove to optimize probe
URL : https://patchwork.freedesktop.org/series/110971/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_110971v1
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling
URL : https://patchwork.freedesktop.org/series/110986/
State : warning
== Summary ==
Error: dim checkpatch failed
aa8ce217526b drm/i915/display: Add missing checks for cdclk
== Series Details ==
Series: i915: CAGF and RC6 changes for MTL (rev14)
URL : https://patchwork.freedesktop.org/series/108156/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Finish (de)gamma readout (rev9)
URL : https://patchwork.freedesktop.org/series/79614/
State : warning
== Summary ==
Error: dim checkpatch failed
cac4d657a616 drm/i915: Clean up legacy palette defines
ce63ce25648d drm/i915: Clean up 10bit precision
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling
URL : https://patchwork.freedesktop.org/series/110970/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_110970v1
cdclk_sanitize() function was written assuming vco was a signed integer.
vco gets assigned to -1 (essentially ~0) for the case where PLL
might be enabled and vco is not a frequency that will ever
get used. In such a scenario the right thing to do is disable the
PLL and re-enable it again with a
As per bSpec MTL has 38.4 MHz Reference clock.
Adding the cdclk tables and cdclk_funcs that MTL
will use.
v2: Revert to using bxt_get_cdclk()
BSpec: 65243
Cc: Clint Taylor
Signed-off-by: Anusha Srivatsa
Reviewed-by: Clint Taylor
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 22
From: Ville Syrjälä
For MTL, changing cdclk from between certain frequencies has
both squash and crawl. Use the current cdclk config and
the new(desired) cdclk config to construct a mid cdclk config.
Set the cdclk twice:
- Current cdclk -> mid cdclk
- mid cdclk -> desired cdclk
Driver should
== Series Details ==
Series: mei: add timeout to send (rev3)
URL : https://patchwork.freedesktop.org/series/110495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12390 -> Patchwork_110495v3
Summary
---
**SUCCESS**
just recapping offline conversation summary - we agreed on:
intel_pxp_enabled(i915)
intel_pxp_enabled_on_gt(pxp)
(where one is wrapper over the other, the action part of the function
name stays the same).
...alan
On Mon, 2022-11-14 at 21:13 -0800, Alan Previn Teres Alexis wrote:
>
>
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling
URL : https://patchwork.freedesktop.org/series/110970/
State : warning
== Summary ==
Error: dim checkpatch failed
8b43fdea884d drm/i915/display: Add missing checks for cdclk
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, November 16, 2022 10:44 AM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org; Vivekanandan, Balasubramani
>
> Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/display: Do both crawl and
> squash when changing
== Series Details ==
Series: drm/i915: Fix timeout handling when retiring requests
URL : https://patchwork.freedesktop.org/series/110964/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12389 -> Patchwork_110964v1
Summary
On Wed, Nov 16, 2022 at 06:50:07AM -0800, Anusha Srivatsa wrote:
> From: Ville Syrjälä
>
> For MTL, changing cdclk from between certain frequencies has
> both squash and crawl. Use the current cdclk config and
> the new(desired) cdclk config to construtc a mid cdclk config.
> Set the cdclk
== Series Details ==
Series: series starting with [1/2] drm/ttm: Clean up page shift operation
URL : https://patchwork.freedesktop.org/series/110957/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12389 -> Patchwork_110957v1
On Wed, Nov 16, 2022 at 05:06:57PM +0200, Jani Nikula wrote:
> Panel power off delay is the time the panel power needs to remain off
> after being switched off, before it can be switched on again.
>
> For the purpose of respecting panel power off delay at driver probe,
> assuming the panel was
Thank you everyone for your work!
Matthieu.
On Wed, Nov 16 2022 at 03:32:01 PM +0200, Jani Nikula
wrote:
On Wed, 16 Nov 2022, Thomas Zimmermann wrote:
Hi
Am 14.11.22 um 12:17 schrieb Jani Nikula:
We've used a temporary platform device for firmware EDID loading
since
it was introduced
On 11/15/2022 5:44 AM, Badal Nilawar wrote:
From: Vinay Belgaumkar
By defaut idle mesaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
v2:
- Fix review comments (Vinay)
- Set GSC idle hysterisis to 5 us (Badal)
Bspec: 71496
Cc:
I'm assuming that you have verified that the GuC ADS code is calling for the
registration of the GSC capture register
list accordingly and for the correct tile. That said:
Reviewed-by: Alan Previn
On Thu, 2022-11-10 at 16:18 -0800, Ceraolo Spurio, Daniele wrote:
> For the GSC engine we only
On Wednesday, November 16, 2022 11:45 PM, Jani Nikula
wrote:
>On Mon, 14 Nov 2022, Lee Shawn C wrote:
>> After i915 dirver initialized, a panel power off cycle delay always
>> append before turn eDP on. If eDP display did not power on before.
>> With this change, power off duration might
On Wednesday, 16 November 2022 15:42:46 CET Andrzej Hajda wrote:
> On 16.11.2022 12:25, Janusz Krzysztofik wrote:
> > According to the docs of i915_request_wait_timeout(), its return value
> > "may be zero if the request is unfinished after the timeout expires."
> > However, 0 is also returned
On Mon, 14 Nov 2022, Lee Shawn C wrote:
> After i915 dirver initialized, a panel power off cycle delay
> always append before turn eDP on. If eDP display did not
> power on before. With this change, power off duration might
> longer than power cycle delay. So driver can save power cycle
> delay
Panel power off delay is the time the panel power needs to remain off
after being switched off, before it can be switched on again.
For the purpose of respecting panel power off delay at driver probe,
assuming the panel was last switched off at driver probe is overly
pessimistic. If the panel was
From: Ville Syrjälä
For MTL, changing cdclk from between certain frequencies has
both squash and crawl. Use the current cdclk config and
the new(desired) cdclk config to construtc a mid cdclk config.
Set the cdclk twice:
- Current cdclk -> mid cdclk
- mid cdclk -> desired cdclk
Driver should
As per bSpec MTL has 38.4 MHz Reference clock.
Adding the cdclk tables and cdclk_funcs that MTL
will use.
v2: Revert to using bxt_get_cdclk()
BSpec: 65243
Cc: Clint Taylor
Signed-off-by: Anusha Srivatsa
Reviewed-by: Clint Taylor
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 22
cdclk_sanitize() function was written assuming vco was a signed integer.
vco gets assigned to -1 (essentially ~0) for the case where PLL
might be enabled and vco is not a frequency that will ever
get used. In such a scenario the right thing to do is disable the
PLL and re-enable it again with a
On 16.11.2022 12:25, Janusz Krzysztofik wrote:
According to the docs of i915_request_wait_timeout(), its return value
"may be zero if the request is unfinished after the timeout expires."
However, 0 is also returned when the request is found finished right
after the timeout has expired.
Since
On 16.11.2022 12:25, Janusz Krzysztofik wrote:
Users of intel_gt_retire_requests_timeout() expect 0 return value on
success. However, we have no protection from passing back 0 potentially
returned by dma_fence_wait_timeout() on timeout.
Replace 0 with -ETIME before using timeout as return
On Fr, 2022-11-11 at 15:58 +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Rudimentary vendor agnostic example of how lib_igt_drm_clients can be used
> to display a sorted by card and usage list of processes using GPUs.
>
> Borrows a bit of code from intel_gpu_top but for now omits the
On Wed, 16 Nov 2022, Thomas Zimmermann wrote:
> Hi
>
> Am 14.11.22 um 12:17 schrieb Jani Nikula:
>> We've used a temporary platform device for firmware EDID loading since
>> it was introduced in commit da0df92b5731 ("drm: allow loading an EDID as
>> firmware to override broken monitor"), but
On 16.11.2022 12:25, Janusz Krzysztofik wrote:
Commit b97060a99b01 ("drm/i915/guc: Update intel_gt_wait_for_idle to work
with GuC") extended the API of intel_gt_retire_requests_timeout() with an
extra argument 'remaining_timeout', intended for passing back unconsumed
portion of requested timeout
On Wed, Nov 16, 2022 at 12:08:27PM +0200, Jani Nikula wrote:
> On Sun, 06 Nov 2022, Tetsuo Handa wrote:
> > Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> > macro") says, flush_scheduled_work() is dangerous and will be forbidden.
> > We are on the way for removing all
Move PXP mode state machine to SETUP mode only if
memory ready message sent successfully to the firmware.
Leave it in INIT mode otherwise to allow try to send message later.
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/bus-fixup.c | 7 ---
1 file changed, 4 insertions(+), 3
When driver wakes up the firmware from the low power state,
it is sending a memory ready message.
The send is done via synchronous/blocking function to ensure
that firmware is in ready state. However, in case of firmware
undergoing reset send might be block forever.
To address this issue a timeout
When driver wakes up the firmware from the low power state,
it is sending a memory ready message.
The send is done via synchronous/blocking function to ensure
that firmware is in ready state. However, in case of firmware
undergoing reset send might be block forever.
To address this issue a timeout
Am 16.11.22 um 09:50 schrieb Somalapuram Amaranath:
remove page shift operations as ttm_resource moved
from num_pages to size_t size in bytes.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +---
drivers/gpu/drm/ttm/ttm_range_manager.c| 2 +-
Am 16.11.22 um 01:25 schrieb Stephen Rothwell:
Hi all,
On Wed, 16 Nov 2022 10:47:52 +1100 Stephen Rothwell
wrote:
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
between commit:
eca13f3c67b6 ("drm/amdgpu: use the last IB as
== Series Details ==
Series: drm/i915: Update workaround documentation (rev2)
URL : https://patchwork.freedesktop.org/series/110639/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12382_full -> Patchwork_110639v2_full
According to the docs of i915_request_wait_timeout(), its return value
"may be zero if the request is unfinished after the timeout expires."
However, 0 is also returned when the request is found finished right
after the timeout has expired.
Since the docs also state: "If the timeout is 0, it will
Users of intel_gt_retire_requests_timeout() expect 0 return value on
success. However, we have no protection from passing back 0 potentially
returned by dma_fence_wait_timeout() on timeout.
Replace 0 with -ETIME before using timeout as return value.
Fixes: f33a8a51602c ("drm/i915: Merge
Commit b97060a99b01 ("drm/i915/guc: Update intel_gt_wait_for_idle to work
with GuC") extended the API of intel_gt_retire_requests_timeout() with an
extra argument 'remaining_timeout', intended for passing back unconsumed
portion of requested timeout when 0 (success) is returned. However, when
Fixes for issues discovered via code review while working on
https://gitlab.freedesktop.org/drm/intel/issues/7349.
Reworked version of a series supposed to fix the same issues, sent before
under the same subject. Since some solutions are significantly different
than before, I'm not marking this
> -Original Message-
> From: Gupta, Anshuman
> Sent: 16 November 2022 15:38
> To: Ghimiray, Himal Prasad ; intel-
> g...@lists.freedesktop.org
> Cc: Iddamsetty, Aravind
> Subject: RE: [Intel-gfx] [PATCH 1/1] drm/i915: Export LMEM max memory
> bandwidth via sysfs.
>
>
>
> >
Am 16.11.22 um 10:20 schrieb Arunpravin Paneer Selvam:
Hi Amar,
On 11/16/2022 2:20 PM, Somalapuram Amaranath wrote:
ttm_resource allocate size in bytes i.e less than page size.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/drm_gem.c | 2 +-
1 file changed, 1 insertion(+), 1
> -Original Message-
> From: Intel-gfx On Behalf Of
> Himal Prasad Ghimiray
> Sent: Tuesday, November 15, 2022 1:39 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/1] drm/i915: Export LMEM max memory
> bandwidth via sysfs.
>
> Export lmem maximum memory
On Sun, 06 Nov 2022, Tetsuo Handa wrote:
> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
> We are on the way for removing all flush_scheduled_work() callers from
> the kernel, and there are only
On 15/11/2022 18:13, Andrzej Hajda wrote:
On 08.11.2022 11:24, Matthew Auld wrote:
On 19/10/2022 22:59, Andrzej Hajda wrote:
Since almost all calls to i915_vma_move_to_active are prepended with
i915_request_await_object, let's call the latter from
_i915_vma_move_to_active by default and add
On 11/15/2022 11:34 AM, Matthew Auld wrote:
Simple regression test for lmem to check if an in-progress async unbind
and eviction is syncronised with discarding the pages when marking
the object as DONTNEED.
Signed-off-by: Matthew Auld
Cc: Niranjana Vishwanathapura
Cc: Andrzej Hajda
Cc:
On 15-11-2022 13:38, Himal Prasad Ghimiray wrote:
> Export lmem maximum memory bandwidth to the userspace via sysfs.
>
> Signed-off-by: Himal Prasad Ghimiray
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/i915_sysfs.c | 27 +++
> 2 files
Hi
Am 14.11.22 um 12:17 schrieb Jani Nikula:
We've used a temporary platform device for firmware EDID loading since
it was introduced in commit da0df92b5731 ("drm: allow loading an EDID as
firmware to override broken monitor"), but there's no explanation why.
Using a temporary device does not
On Tue, Nov 15, 2022 at 10:30:01AM +0100, Andrzej Hajda wrote:
> On 13.07.2021 15:59, Daniel Vetter wrote:
> > Some vague evidences suggests this can go wrong. Try to prevent it by
> > holding the right mutex and clearing ->deferred_setup to make sure we
> > later on don't accidentally try to
== Series Details ==
Series: drm/i915/mtl: Media GT and Render GT share common GGTT (rev4)
URL : https://patchwork.freedesktop.org/series/110321/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12382_full -> Patchwork_110321v4_full
Hi Amar,
On 11/16/2022 2:20 PM, Somalapuram Amaranath wrote:
ttm_resource allocate size in bytes i.e less than page size.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/drm_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem.c
ttm_resource allocate size in bytes i.e less than page size.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/drm_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index b8db675e7fb5..a346e3b7f9a8 100644
---
remove page shift operations as ttm_resource moved
from num_pages to size_t size in bytes.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +---
drivers/gpu/drm/ttm/ttm_range_manager.c| 2 +-
2 files changed, 2 insertions(+), 4 deletions(-)
diff
== Series Details ==
Series: drm/i915: Fix build failure with debug and extra logging enabled
URL : https://patchwork.freedesktop.org/series/110930/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12382_full -> Patchwork_110930v1_full
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