On Wed, Jan 18, 2023 at 07:30:13PM +, Mark Yacoub wrote:
> From: Sean Paul
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/enc
On Tue, 2023-01-10 at 16:27 +0530, Suraj Kandpal wrote:
> Add function that takes care of sending command to gsc cs. We start
> of with allocation of memory for our command intel_hdcp_gsc_message that
> contains gsc cs memory header as directed in specs followed by the
> actual payload hdcp message
From: John Harrison
Engine resets are supposed to never fail. But in the case when one
does (due to unknown reasons that normally come down to a missing
w/a), it is useful to get as much information out of the system as
possible. Given that the GuC intentionally dies on such a situation,
it is no
From: John Harrison
When GuC support was added to error capture, the locking around the
request object was broken. Fix it up.
The context based search manages the spinlocking around the search
internally. So it needs to grab the reference count internally as
well. The execlist only request based
From: John Harrison
There was a report of error captures occurring without any hung
context being indicated despite the capture being initiated by a 'hung
context notification' from GuC. The problem was not reproducible.
However, it is possible to happen if the context in question has no
active r
From: John Harrison
The debugfs dump of requests was confused about what state requires
the execlist lock versus the GuC lock. There was also a bunch of
duplicated messy code between it and the error capture code.
So refactor the hung request search into a re-usable function. And
reduce the span
From: John Harrison
For understanding bug reports, it can be useful to have an explicit
dmesg print when a reset notification is received from GuC. As opposed
to simply inferring that this happened from other messages.
Signed-off-by: John Harrison
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/d
From: John Harrison
It is technically possible to get a hung context without a valid
request. In such a situation, try to provide as much information in
the error capture as possible rather than just aborting and capturing
nothing.
Similarly, in the case of an engine reset failure the GuC is not
From: John Harrison
A hang situation has been observed where the only requests on the
context were either completed or not yet started according to the
breaadcrumbs. However, the register state claimed a batch was (maybe)
in progress. So, allow capture of the pending request on the grounds
that t
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, January 13, 2023 1:49 PM
> To: Murthy, Arun R ; intel-
> g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: Re: [PATCH 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer
>
> On Fri, 13
On Thu, Jan 19, 2023 at 10:58:42AM +0800, Zhenyu Wang wrote:
> On 2023.01.11 17:55:04 +, Sean Christopherson wrote:
> > On Mon, Jan 09, 2023, Yan Zhao wrote:
> > > On Fri, Jan 06, 2023 at 11:01:53PM +, Sean Christopherson wrote:
> > > > On Fri, Jan 06, 2023, Yan Zhao wrote:
> > > > > On Thu
> From: Matthew Rosato
> Sent: Wednesday, January 18, 2023 10:56 PM
>
> On 1/18/23 4:03 AM, Tian, Kevin wrote:
> >> From: Alex Williamson
> >> Sent: Wednesday, January 18, 2023 5:23 AM
> >>
> >> On Fri, 13 Jan 2023 19:03:51 -0500
> >> Matthew Rosato wrote:
> >>
> >>> void vfio_device_group_clos
On 2023.01.11 17:55:04 +, Sean Christopherson wrote:
> On Mon, Jan 09, 2023, Yan Zhao wrote:
> > On Fri, Jan 06, 2023 at 11:01:53PM +, Sean Christopherson wrote:
> > > On Fri, Jan 06, 2023, Yan Zhao wrote:
> > > > On Thu, Jan 05, 2023 at 05:40:32PM +, Sean Christopherson wrote:
> > > >
== Series Details ==
Series: linux-next: build failure after merge of the drm tree
URL : https://patchwork.freedesktop.org/series/113069/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113069v1
Summary
---
== Series Details ==
Series: linux-next: build failure after merge of the drm tree
URL : https://patchwork.freedesktop.org/series/113069/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
On 1/11/2023 1:42 PM, Alan Previn wrote:
On legacy platforms, KCR HW enabling is done at the time the mei
component interface is bound. It's also disabled during unbind.
However, for MTL onwards, we don't depend on the tee-component
operation before we can start sending GSC-CS firmware message
Hi all,
After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
In file included from drivers/gpu/drm/drm_fb_helper.c:33:
drivers/gpu/drm/drm_fb_helper.c: In function 'drm_fb_helper_single_fb_probe':
drivers/gpu/drm/drm_fb_helper.c:1968:24: error: 'dev' undecl
== Series Details ==
Series: series starting with [1/7] drm/i915: add i915_config.h and move
relevant declarations there (rev2)
URL : https://patchwork.freedesktop.org/series/113025/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113025v2
===
On 1/11/2023 1:42 PM, Alan Previn wrote:
Despite KCR subsystem being in the media-tile (close to the
GSC-CS), the IRQ controls for it are on GT-0 with other global
IRQ controls. Thus, add a helper for KCR hw interrupt
enable/disable functions to get the correct gt structure (for
uncore) for MT
On 1/11/2023 1:42 PM, Alan Previn wrote:
Add MTL's function for ARB session creation using PXP firmware
version 4.3 ABI structure format.
Before checking the return status, look at the GSC-CS-Mem-Header's
pending-bit which means the GSC firmware is busy and we should
resubmit.
Signed-off-by:
On 2023.01.14 21:12:39 +0530, Deepak R Varma wrote:
> Remove the extra semicolon at end. Issue identified using
> semicolon.cocci Coccinelle semantic patch.
>
> Signed-off-by: Deepak R Varma
> ---
> drivers/gpu/drm/i915/gvt/vgpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
On 2023.01.18 11:44:55 -0500, Rodrigo Vivi wrote:
> On Wed, Jan 18, 2023 at 10:18:11AM +0530, Deepak R Varma wrote:
> > On Tue, Jan 17, 2023 at 02:29:37PM -0500, Rodrigo Vivi wrote:
> > > On Mon, Jan 16, 2023 at 01:44:46PM +0800, Zhenyu Wang wrote:
> > > > On 2023.01.10 13:49:57 -0500, Rodrigo Vivi
On 1/11/2023 1:42 PM, Alan Previn wrote:
Add GSC engine based method for sending PXP firmware packets
to the GSC firmware for MTL (and future) products. Use the newly
added helpers to populate the GSC-CS memory header and send the
message packet to the FW by dispatching the GSC_HECI_CMD_PKT
in
== Series Details ==
Series: series starting with [1/7] drm/i915: add i915_config.h and move
relevant declarations there (rev2)
URL : https://patchwork.freedesktop.org/series/113025/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won'
== Series Details ==
Series: series starting with [1/7] drm/i915: add i915_config.h and move
relevant declarations there (rev2)
URL : https://patchwork.freedesktop.org/series/113025/
State : warning
== Summary ==
Error: dim checkpatch failed
c1c34828b1db drm/i915: add i915_config.h and move r
Hi Mark
On 1/18/2023 11:30 AM, Mark Yacoub wrote:
From: Sean Paul
This patch adds the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller. Now that these are supported, change the
compatible string to "dp-h
== Series Details ==
Series: drm/i915/gvt: Avoid full proxy f_ops for debugfs attributes
URL : https://patchwork.freedesktop.org/series/113059/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113059v1
Summa
On 1/11/2023 1:42 PM, Alan Previn wrote:
Add helper functions into (new) common heci-packet-submission files
to handle generating the MTL GSC-CS Memory-Header and emitting of
the Heci-Cmd-Packet instructions that gets submitted to the engine.
NOTE1: This common functions for heci-packet-submi
On Wed, 18 Jan 2023 19:30:13 +, Mark Yacoub wrote:
> From: Sean Paul
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encrypt
== Series Details ==
Series: drm/i915/gvt: Avoid full proxy f_ops for debugfs attributes
URL : https://patchwork.freedesktop.org/series/113059/
State : warning
== Summary ==
Error: dim checkpatch failed
0a2fe8a8a5a3 drm/i915/gvt: Avoid full proxy f_ops for debugfs attributes
-:20: WARNING:COMM
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/vmwgfx/ttm_object.h
between commit:
a309c7194e8a ("drm/vmwgfx: Remove rcu locks from user resources")
from Linus' tree and commit:
13acb368bf02 ("drm/ttm/vmwgfx: move ttm_bo_wait into VMWGFX")
from
== Series Details ==
Series: drm/i915: Remove unused variable
URL : https://patchwork.freedesktop.org/series/113046/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113046v1
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev6)
URL : https://patchwork.freedesktop.org/series/94712/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/94712/revisions/6/mbox/ not
applied
Applying: drm/hdcp: A
== Series Details ==
Series: drm/i915: Remove unused variable
URL : https://patchwork.freedesktop.org/series/113046/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
== Series Details ==
Series: drm/i915: Load LUTs with DSB
URL : https://patchwork.freedesktop.org/series/113042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113042v1
Summary
---
**SUCCESS**
No
On 1/11/2023 1:42 PM, Alan Previn wrote:
Add MTL hw-plumbing enabling for KCR operation under PXP
which includes:
1. Updating 'pick-gt' to get the media tile for
KCR interrupt handling
2. Adding MTL's KCR registers for PXP operation
(init, status-checking, etc.).
While doing #2, lets
== Series Details ==
Series: drm/i915: Load LUTs with DSB
URL : https://patchwork.freedesktop.org/series/113042/
State : warning
== Summary ==
Error: dim checkpatch failed
dec4d3704799 drm/i915/dsb: Define more DSB registers
-:62: WARNING:LONG_LINE_COMMENT: line length of 105 exceeds 100 colum
== Series Details ==
Series: drm/i915/gt: Move LSC_CHICKEN_BIT* workarounds to correct function
(Series)
URL : https://patchwork.freedesktop.org/series/113036/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113036v1
==
On 1/11/2023 1:42 PM, Alan Previn wrote:
For MTL, PXP transport back-end uses the GSC engine to submit
HECI packets for PXP arb session management. The command submission
that uses non-priveleged mode requires us to allocate (or free)
a set of execution submission resources (buffer-object, bat
== Series Details ==
Series: drm/i915/gt: Move LSC_CHICKEN_BIT* workarounds to correct function
(Series)
URL : https://patchwork.freedesktop.org/series/113036/
State : warning
== Summary ==
Error: dim checkpatch failed
6c2b52a5e74a drm/i915/doc: Document where to implement register workaround
== Series Details ==
Series: drm/i915/selftest: fix intel_selftest_modify_policy argument types
(rev2)
URL : https://patchwork.freedesktop.org/series/112938/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_112938v2
== Series Details ==
Series: series starting with [1/4] drm/i915/params: use generics for parameter
printing
URL : https://patchwork.freedesktop.org/series/113033/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113033v1
==
== Series Details ==
Series: series starting with [1/7] drm/i915: add i915_config.h and move
relevant declarations there
URL : https://patchwork.freedesktop.org/series/113025/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12605 -> Patchwork_113025v1
==
On 18. 01. 2023. 11:39, Das, Nirmoy wrote:
>>>
>>> Copying Mirsad who reported the issue in case he is still happy to give it
>>> a quick test. Mirsad, I don't know if you are subscribed to one of the two
>>> mailing lists where series was posted. In case not, you can grab both
>>> patches from
== Series Details ==
Series: series starting with [1/7] drm/i915: add i915_config.h and move
relevant declarations there
URL : https://patchwork.freedesktop.org/series/113025/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be ch
On Wed, Jan 18, 2023 at 12:07:01PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Move/adjust register definitions related to Wa_22011450934
> URL : https://patchwork.freedesktop.org/series/112966/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_1
On Wed, Jan 18, 2023 at 07:56:20AM +1100, Stephen Rothwell wrote:
> Hi Karol,
>
> On Tue, 17 Jan 2023 14:52:12 +0100 Karol Herbst wrote:
> >
> > On Tue, Jan 17, 2023 at 5:02 AM Stephen Rothwell
> > wrote:
> > >
> > > The following commit is also in the drm-misc tree as a different commit
> > >
Hi Niranjana,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-intel/for-linux-next-fixes drm-tip/drm-tip
drm/drm-next drm-exynos/exynos-drm-next drm-misc/drm-misc-next linus/master
v6.2-rc4 next-20230118]
[If
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
Hi,
On Tue, 8 Nov 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Second attempt at ELD precompute + readout.
>
> v2:
> - get rid of the hw ELD buffer entirely on !g4x
> - actually use the precomputed ELD in acomp .get_eld()
> - more cleanups/etc. here and there
sorry for the long delay.
From: Sean Paul
This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
helpers.
Cc: Stephen Boyd
Cc: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Sean Paul
Signed-off-by: Mark Yacoub
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-s..
From: Sean Paul
This patch adds the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller. Now that these are supported, change the
compatible string to "dp-hdcp".
Signed-off-by: Sean Paul
Signed-off-by: Mark
From: Sean Paul
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are
From: Sean Paul
Now that all of the HDCP 1.x logic has been migrated to the central HDCP
helpers, use it in the i915 driver.
The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
however there are a few helper hooks which are connector-specific and
need to be partially or fully
From: Sean Paul
Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/2021091317574
From: Sean Paul
The shim functions return error codes, but they are discarded in
intel_hdcp.c. This patch plumbs the return codes through so they are
properly handled.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
Signed-off-by: Mark Yacoub
Link:
https://patchwork
From: Sean Paul
This patch expands upon the HDCP helper library to manage HDCP
enable, disable, and check.
Previous to this patch, the majority of the state management and sink
interaction is tucked inside the Intel driver with the understanding
that once a new platform supported HDCP we could m
From: Sean Paul
This patch updates the connector's property value in 2 cases which were
previously missed:
1- Content type changes. The value should revert back to DESIRED from
ENABLED in case the driver must re-authenticate the link due to the
new content type.
2- Userspace sets value to
From: Sean Paul
Instead of forcing a modeset in the hdcp atomic check, simply return
true if the content protection value is changing and let the driver
decide whether a modeset is required or not.
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Sean Paul
Signed-off-by: Mark Ya
From: Sean Paul
This patch moves the hdcp atomic check from i915 to drm_hdcp so other
drivers can use it. No functional changes, just cleaned up some of the
code when moving it over.
Acked-by: Jani Nikula
Acked-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
Reviewed-by: Abhinav Kumar
Signed-off-b
From: Mark Yacoub
Hello,
I rebased this series which is authored by Sean Paul.
A major rebase conflict was that drm/drm_hdcp was split to drm/display/drm_hdcp
& drm/display/drm_hdcp_helper.
Another major one was in msm dp where drm_connector was no longer tracked, but
it's replaced by msm_dp
On Tue, Jan 17, 2023 at 12:26:27PM -0800, Matt Roper wrote:
> The implementation of Wa_22011450934 introduced three new register
> definitions in i915_reg.h that didn't get moved to the GT/engine
> register headers when all the other registers moved; let's move them to
> the appropriate headers and
On Thu, Jan 12, 2023 at 09:11:55PM +0100, Thomas Zimmermann wrote:
> Set the framebuffer info for drivers that support VGA switcheroo. Only
> affects the amdgpu and nouveau drivers, which use VGA switcheroo and
> generic fbdev emulation. For other drivers, this does nothing.
>
> This fixes a poten
On Wed, Jan 18, 2023 at 1:35 PM Rodrigo Vivi wrote:
>
> On Wed, Jan 18, 2023 at 06:06:24PM +0100, Nirmoy Das wrote:
> > Removed unused i915 var.
> >
> > Fixes: a273e95721e9 ("drm/i915: Allow switching away via vga-switcheroo if
> > uninitialized")
> > Signed-off-by: Nirmoy Das
>
> Reviewed-by: R
On Wed, Jan 18, 2023 at 06:06:24PM +0100, Nirmoy Das wrote:
> Removed unused i915 var.
>
> Fixes: a273e95721e9 ("drm/i915: Allow switching away via vga-switcheroo if
> uninitialized")
> Signed-off-by: Nirmoy Das
Reviewed-by: Rodrigo Vivi
and pushed to drm-misc-fixes.
Thanks for the patch.
>
On Wed, Jan 18, 2023 at 12:45:08PM +, Matthew Auld wrote:
On 18/01/2023 07:16, Niranjana Vishwanathapura wrote:
Support dump capture of persistent mappings upon user request.
Capture of a mapping is requested with the VM_BIND ioctl and
processed during the GPU error handling. They are synch
On 1/18/2023 09:54, Andy Shevchenko wrote:
On Wed, Jan 18, 2023 at 09:34:47AM -0800, John Harrison wrote:
On 1/18/2023 00:29, Andy Shevchenko wrote:
On Tue, Jan 17, 2023 at 01:36:26PM -0800, john.c.harri...@intel.com wrote:
From: John Harrison
When GuC support was added to error capture, the
On 1/18/2023 08:22, Tvrtko Ursulin wrote:
On 17/01/2023 21:36, john.c.harri...@intel.com wrote:
From: John Harrison
When GuC support was added to error capture, the locking around the
request object was broken. Fix it up.
The context based search manages the spinlocking around the search
inte
On Wed, Jan 18, 2023 at 09:34:47AM -0800, John Harrison wrote:
> On 1/18/2023 00:29, Andy Shevchenko wrote:
> > On Tue, Jan 17, 2023 at 01:36:26PM -0800, john.c.harri...@intel.com wrote:
> > > From: John Harrison
> > >
> > > When GuC support was added to error capture, the locking around the
> >
On 1/11/2023 1:42 PM, Alan Previn wrote:
Add MTL PXP GSC-CS back-end stub functions hook them
up from PXP front-end and PXP session management functions.
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/pxp/intel_pxp.c | 19 +
On Tue, Jan 17, 2023 at 01:06:17PM -0500, Rodrigo Vivi wrote:
> On Thu, Jan 12, 2023 at 10:19:47PM -0300, Gustavo Sousa wrote:
> > That register doesn't belong to a specific engine, so the proper
> > placement for workarounds programming it should be
> > general_render_compute_wa_init().
>
>
> Lo
On 1/18/2023 00:29, Andy Shevchenko wrote:
On Tue, Jan 17, 2023 at 01:36:26PM -0800, john.c.harri...@intel.com wrote:
From: John Harrison
When GuC support was added to error capture, the locking around the
request object was broken. Fix it up.
The context based search manages the spinlocking
Removed unused i915 var.
Fixes: a273e95721e9 ("drm/i915: Allow switching away via vga-switcheroo if
uninitialized")
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_driver.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i9
On Wed, Jan 18, 2023 at 09:54:56AM +, Tvrtko Ursulin wrote:
>
> On 28/11/2022 18:26, Matt Roper wrote:
> > On Wed, Nov 23, 2022 at 04:45:25PM -0300, Gustavo Sousa wrote:
> > > On Wed, Nov 23, 2022 at 10:36:47AM -0800, Matt Atwood wrote:
> > > > Wa_18018764978 applies to specific steppings of D
== Series Details ==
Series: Enable YCbCr420 for VDSC
URL : https://patchwork.freedesktop.org/series/112993/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12596_full -> Patchwork_112993v1_full
Summary
---
**SUCCESS**
On Wed, Jan 18, 2023 at 10:18:11AM +0530, Deepak R Varma wrote:
> On Tue, Jan 17, 2023 at 02:29:37PM -0500, Rodrigo Vivi wrote:
> > On Mon, Jan 16, 2023 at 01:44:46PM +0800, Zhenyu Wang wrote:
> > > On 2023.01.10 13:49:57 -0500, Rodrigo Vivi wrote:
> > > > On Wed, Jan 11, 2023 at 12:00:12AM +0530,
On Wed, Jan 18, 2023 at 10:13:04AM +0530, Deepak R Varma wrote:
> On Tue, Jan 17, 2023 at 02:21:59PM -0500, Rodrigo Vivi wrote:
> > On Sat, Jan 14, 2023 at 07:33:53PM +0530, Deepak R Varma wrote:
> > > Convert function i9xx_pipe_crc_auto_source() to return void instead
> > > of int since the curren
On 17/01/2023 21:36, john.c.harri...@intel.com wrote:
From: John Harrison
Engine resets are supposed to never fail. But in the case when one
does (due to unknown reasons that normally come down to a missing
w/a), it is useful to get as much information out of the system as
possible. Given tha
On 17/01/2023 21:36, john.c.harri...@intel.com wrote:
From: John Harrison
A hang situation has been observed where the only requests on the
context were either completed or not yet started according to the
breaadcrumbs. However, the register state claimed a batch was (maybe)
in progress. So,
On 17/01/2023 21:36, john.c.harri...@intel.com wrote:
From: John Harrison
There was a report of error captures occurring without any hung
context being indicated despite the capture being initiated by a 'hung
context notification' from GuC. The problem was not reproducible.
However, it is pos
From: Ville Syrjälä
In order to validate LUT programming more thoroughly let's
do a state check for all color management updates as well.
Not sure we really want this outside CI. It is rather heavy
and color management updates could become rather common
with all the HDR/etc. stuff happening. May
From: Ville Syrjälä
The DSB has problems loading the legacy LUT. Looks like
simply writing each LUT entry twice back-to-back is
sufficient workaround for this.
Curiously it doesn't even matter what data we provide for the
first write, the second write always seems to work 100%. So
this doesn't s
From: Ville Syrjälä
The known DSB vs. LUT issues (anti-collision logic, and
legacy LUT fails) have been dealt with. Use the DSB to
load the LUTs (except during full modesets).
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 3 ---
1 file changed, 3 deletions(-)
d
From: Ville Syrjälä
Loading LUTs with the DSB outside of vblank doesn't really
work due to the palette anti-collision logic. Apparently the
DSB register writes don't get stalled like CPU mmio writes
do and instead we end up corrupting the LUT entries. Disabling
the anti-collision logic would allo
From: Ville Syrjälä
Allow the caller to ask for the DSB commands to execute
during vblank.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 2 +-
drivers/gpu/drm/i915/display/intel_dsb.c | 4 +++-
drivers/gpu/drm/i915/display/intel_dsb.h | 3 ++-
3 files change
From: Ville Syrjälä
Using the DSB for LUT loading during full modesets would require
some actual though. Let's just use mmio for the time being.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i
From: Ville Syrjälä
If we have no LUTs to load there is no point in setting up
the DSB command buffer.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/dr
From: Ville Syrjälä
We'll be wanting to start the DSB from the vblank evasion critical
section so printk()s are a big nono. Get rid if the debug print.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/
From: Ville Syrjälä
Introduce a function to emits whatever commands we need
at the end of the DSB command buffer. For the moment we
only do the tail cacheline alignment there, but eventually
we might want eg. emit an interrupt.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/inte
From: Ville Syrjälä
Dump the full DSB command buffers and head/tail pointers if the
the DSB hasn't completed its job in time.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 33 +---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git a/
From: Ville Syrjälä
Starting the DSB execution vs. waiting for it stop are two
totally different things. Split intel_dsb_wait() from
intel_dsb_commit() so that we can eventually allow the DSB
to execute asynchronously.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c
From: Ville Syrjälä
Print the crtc/DSB id information to make it clear which DSB engine
we're talking about.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i
From: Ville Syrjälä
Add definitions for more DSB registers. Less annoying spec
trawling when working on the DSB code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 50 +++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/
From: Ville Syrjälä
Restore DSB usage for lodaing the LUTs, and do so
properly during vblank to avoid tearing. And also
included are some improvements to aid in analyzing
DSB issues.
There is one undocumented (afaik) hw issue with
the legacy LUT that I still need to report to the
hw folks. But I
On 17/01/2023 21:36, john.c.harri...@intel.com wrote:
From: John Harrison
When GuC support was added to error capture, the locking around the
request object was broken. Fix it up.
The context based search manages the spinlocking around the search
internally. So it needs to grab the reference
On Wed, Jan 04, 2023 at 12:05:30PM +0200, Jani Nikula wrote:
> The BPC quirks are closer to home in update_display_info().
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_edid.c | 26 +-
> 1 file changed, 13 in
On Wed, Jan 04, 2023 at 12:05:29PM +0200, Jani Nikula wrote:
> Simplify display info update by merging ELD handling as well as clearing
> of the data in update_display_info().
>
> The connector->eld really should be moved under display_info altogether,
> but that's for another time.
>
> Cc: Ville
On Wed, Jan 04, 2023 at 12:05:28PM +0200, Jani Nikula wrote:
> Now that quirks are stored in display info, we can just look them up
> using the connector instead of having to pass them around.
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/d
On Wed, Jan 04, 2023 at 12:05:27PM +0200, Jani Nikula wrote:
> Although the quirks are internal to EDID parsing, it'll be helpful to
> store them in display info to avoid having to pass them around.
>
> This will also help separate adding probed modes (which needs the
> quirks) from updating displ
On Wed, Jan 04, 2023 at 12:05:26PM +0200, Jani Nikula wrote:
> Separate the parsing of display info and modes from the HDMI VSDB. This
> is prerequisite work for overall better separation of the two parsing
> steps.
>
> The info parsing is about figuring out whether the sink supports HDMI
> infofr
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