> From: Liu, Yi L
> Sent: Wednesday, March 15, 2023 12:40 PM
>
> > From: Tian, Kevin
> > Sent: Friday, March 10, 2023 6:07 PM
> >
> > > From: Liu, Yi L
> > > Sent: Friday, March 10, 2023 5:58 PM
> > >
> > > > From: Tian, Kevin
> > > > Sent: Friday, March 10, 2023 5:02 PM
> > > >
> > > > > From
> From: Nicolin Chen
> Sent: Wednesday, March 15, 2023 2:22 PM
>
> On Wed, Mar 15, 2023 at 06:16:37AM +, Tian, Kevin wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > > From: Nicolin Chen
> > > Sent: Wednesday, March 15, 2023 2:51 AM
> > >
> > > On Fri, Mar 10, 20
> From: Nicolin Chen
> Sent: Wednesday, March 15, 2023 2:33 PM
>
> On Wed, Mar 15, 2023 at 06:15:23AM +, Tian, Kevin wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > > From: Nicolin Chen
> > > Sent: Wednesday, March 15, 2023 9:01 AM
> > >
> > > Hi Jason/Kevin,
>
On Wed, Mar 15, 2023 at 06:15:23AM +, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
>
>
> > From: Nicolin Chen
> > Sent: Wednesday, March 15, 2023 9:01 AM
> >
> > Hi Jason/Kevin,
> >
> > >
> > > Perhaps we can have iommufd_access_attach/detach in this series
>
On Wed, Mar 15, 2023 at 06:15:02AM +, Liu, Yi L wrote:
> > > +void vfio_iommufd_emulated_detach_ioas(struct vfio_device *vdev)
> > > +{
> > > + lockdep_assert_held(&vdev->dev_set->lock);
> > > +
> > > + if (WARN_ON(!vdev->iommufd_access))
> > > + return;
> > > +
> > [
== Series Details ==
Series: vfio: Make emulated devices prepared for vfio device cdev (rev2)
URL : https://patchwork.freedesktop.org/series/114846/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/114846/revisions/2/mbox/ not
applied
Patch is empty
On Wed, Mar 15, 2023 at 06:16:37AM +, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
>
>
> > From: Nicolin Chen
> > Sent: Wednesday, March 15, 2023 2:51 AM
> >
> > On Fri, Mar 10, 2023 at 02:08:15AM +, Tian, Kevin wrote:
> > > External email: Use caution ope
> From: Nicolin Chen
> Sent: Wednesday, March 15, 2023 2:51 AM
>
> On Fri, Mar 10, 2023 at 02:08:15AM +, Tian, Kevin wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > > From: Liu, Yi L
> > > Sent: Wednesday, March 8, 2023 9:14 PM
> > >
> > > @@ -449,33 +450,18 @@
> From: Nicolin Chen
> Sent: Wednesday, March 15, 2023 9:01 AM
>
> Hi Jason/Kevin,
>
> >
> > Perhaps we can have iommufd_access_attach/detach in this series
> > along with a vfio_iommufd_emulated_detach_ioas, and the locking
> > will come with another patch in replace series?
>
> I recall that
> From: Nicolin Chen
> Sent: Saturday, March 11, 2023 7:43 AM
> On Wed, Mar 08, 2023 at 05:28:58AM -0800, Yi Liu wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > this prepares for adding DETACH ioctl for emulated VFIO devices.
> >
> > Signed-off-by: Yi Liu
> > Revie
== Series Details ==
Series: drm/i915/huc: Cancel HuC delayed load timer on reset.
URL : https://patchwork.freedesktop.org/series/115080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12853_full -> Patchwork_115080v1_full
S
> From: Tian, Kevin
> Sent: Friday, March 10, 2023 6:07 PM
>
> > From: Liu, Yi L
> > Sent: Friday, March 10, 2023 5:58 PM
> >
> > > From: Tian, Kevin
> > > Sent: Friday, March 10, 2023 5:02 PM
> > >
> > > > From: Liu, Yi L
> > > > Sent: Wednesday, March 8, 2023 9:29 PM
> > > > +
> > > > +stati
== Series Details ==
Series: drm/i915: Fix format for perf_limit_reasons
URL : https://patchwork.freedesktop.org/series/115160/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12857 -> Patchwork_115160v1
Summary
---
**
On Tue, 14 Mar 2023 19:29:06 -0700, Vinay Belgaumkar wrote:
>
> Use hex format so that it is easier to decode.
>
> Fixes: fe5979665f64 ('Add perf_limit_reasons in debugfs')
>
> Signed-off-by: Vinay Belgaumkar
> ---
> drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
> 1 file changed, 1 insert
Use hex format so that it is easier to decode.
Fixes: fe5979665f64 ('Add perf_limit_reasons in debugfs')
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debu
On Fri, Mar 10, 2023 at 04:22:42PM -0800, Sean Christopherson wrote:
...
> -static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,
> - struct kvm_memory_slot *slot,
> - struct kvm_page_track_notifier_node *node)
> -{
> - kvm_mmu_zap_all_fast
Hi Jason/Kevin,
On Tue, Mar 14, 2023 at 01:20:52AM -0700, Nicolin Chen wrote:
> On Fri, Mar 10, 2023 at 01:36:22PM -0400, Jason Gunthorpe wrote:
> > On Wed, Mar 08, 2023 at 05:13:36AM -0800, Yi Liu wrote:
> >
> > > +int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id)
> > > +{
On Thu, 2023-03-09 at 15:29 -0800, Teres Alexis, Alan Previn wrote:
> > >
alan:snip
> > > +static int guc_log_relay_subbuf_size_get(void *data, u64 *val)
> > > +{
> > > + struct intel_guc_log *log = data;
> > > +
> > > + if (!log->vma)
> > > + return -ENODEV;
> >
> > For the record, from
== Series Details ==
Series: drm: Add plane SIZE_HINTS property (rev3)
URL : https://patchwork.freedesktop.org/series/113758/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12853_full -> Patchwork_113758v3_full
Summary
-
On Fri, Mar 10, 2023 at 02:08:15AM +, Tian, Kevin wrote:
> External email: Use caution opening links or attachments
>
>
> > From: Liu, Yi L
> > Sent: Wednesday, March 8, 2023 9:14 PM
> >
> > @@ -449,33 +450,18 @@ iommufd_access_create(struct iommufd_ctx *ictx,
> > u32 ioas_id,
> > acce
== Series Details ==
Series: drm/i915/pxp: limit drm-errors or warning on firmware API failures
(rev2)
URL : https://patchwork.freedesktop.org/series/113680/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12857 -> Patchwork_113680v2
lgtm,
Reviewed-by: Umesh Nerlige Ramappa
On Tue, Mar 14, 2023 at 12:17:40PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
On a slow machine, or with many processes and/or file descriptors to
parse, the period of the scanning loop can drift significantly from the
assumed value. This resul
Waitboost is supported with SLPC. Re-enable the tests so
we have coverage.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/i915_pm_rps.c | 8
1 file changed, 8 deletions(-)
diff --git a/tests/i915/i915_pm_rps.c b/tests/i915/i915_pm_rps.c
index 4865ed1f..d4ee2d58 100644
--- a/tests/i915/
MESA driver is creating protected context on every driver handle
creation to query caps bits for app. So when running CI tests,
they are observing hundreds of drm_errors when enabling PXP
in .config but using SOC fusing or BIOS configuration that cannot
support PXP sessions.
The fixes tag referenc
Since we cannot do DSC with this output format currently, can this check be
added as part of the intel_dp_supports_dsc() ?
Regards
Manasi
On Tue, Mar 14, 2023 at 4:07 AM Ankit Nautiyal
wrote:
> Currently, DSC with YCBCR420 is not supported.
> Return -EINVAL when trying with DSC with output_for
== Series Details ==
Series: drm/i915: Plane cleanups and extra registers
URL : https://patchwork.freedesktop.org/series/115127/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12857 -> Patchwork_115127v1
Summary
---
*
Hi Andrzej,
On Fri, Mar 10, 2023 at 10:23:49AM +0100, Andrzej Hajda wrote:
> The callback will be responsible for setting scratch page PTEs for
> specified range. In contrast to clear_range it cannot be optimized to nop.
> It will be used by code adding guard pages.
>
> Signed-off-by: Andrzej Haj
On Tue, Mar 14, 2023, Yan Zhao wrote:
> On Fri, Mar 10, 2023 at 04:22:35PM -0800, Sean Christopherson wrote:
> > Honor KVM's max allowed page size when determining whether or not a 2MiB
> > GTT shadow page can be created for the guest. Querying KVM's max allowed
> > size is somewhat odd as there's
== Series Details ==
Series: drm/i915: Plane cleanups and extra registers
URL : https://patchwork.freedesktop.org/series/115127/
State : warning
== Summary ==
Error: dim checkpatch failed
802cf3411ec1 drm/i915: Stop using pipe_offsets[] for PIPE_MISC*
76f7c6ff785e drm/i915: s/PIPEMISC/PIPE_MIS
On Tue, Mar 14, 2023 at 05:25:18PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> When ACPI is disabled, i915 fails to build because of a missing
> declaration:
Hi Arnd,
thanks for catching this, I sent the same after the lkp note about the
build failure:
https://lore.kernel.org/intel-g
From: Arnd Bergmann
When ACPI is disabled, i915 fails to build because of a missing
declaration:
drivers/gpu/drm/i915/i915_driver.c: In function 'i915_driver_hw_probe':
drivers/gpu/drm/i915/i915_driver.c:556:9: error: implicit declaration of
function 'intel_opregion_cleanup'; did you mean 'inte
Am 14.03.23 um 15:18 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
With the typical model where the display server opends the file descriptor
and then hands it over to the client we were showing stale data in
debugfs.
Fix it by updating the drm_file->pid on ioctl access from a different
process
Thanks Andi and Jani N for the review comments.
Sorry for the delay.
Will send the next rev soon.
On 14-Feb-23 5:55 PM, Jani Nikula wrote:
On Wed, 08 Feb 2023, Andi Shyti wrote:
Hi Swati,
[...]
+static void intel_fifo_underrun_inc_count(struct intel_crtc *crtc,
+
== Series Details ==
Series: Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev12)
URL : https://patchwork.freedesktop.org/series/107550/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12857 -> Patchwork_107550v12
==
On Tue, Mar 14, 2023 at 04:19:20PM +0100, Andrzej Hajda wrote:
> Probe pseudo errors should be injected only in places where real errors
> can be encountered, otherwise unwinding code can be broken.
> Placing intel_uc_init_late before i915_inject_probe_error violated
> this rule, resulting in follo
Am 14.03.23 um 15:18 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Thread group id (aka pid from userspace point of view) is a more
interesting thing to show as an owner of a DRM fd, so track and show that
instead of the thread id.
In the next patch we will make the owner updated post file desc
Probe pseudo errors should be injected only in places where real errors
can be encountered, otherwise unwinding code can be broken.
Placing intel_uc_init_late before i915_inject_probe_error violated
this rule, resulting in following bug:
__intel_gt_disable:655 GEM_BUG_ON(intel_gt_pm_is_awake(gt))
== Series Details ==
Series: DP2.0 SDP CRC16 for 128/132b link layer (rev5)
URL : https://patchwork.freedesktop.org/series/113134/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12829 -> Patchwork_113134v5
Summary
---
== Series Details ==
Series: drm/i915/active: Fix missing debug object activation (rev3)
URL : https://patchwork.freedesktop.org/series/114981/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12851_full -> Patchwork_114981v3_full
=
From: Tvrtko Ursulin
When notified by the drm core we are over our allotted time budget, i915
instance will check if any of the GPU engines it is reponsible for is
fully saturated. If it is, and the client in question is using that
engine, it will throttle it.
For now throttling is done simplist
From: Tvrtko Ursulin
Implement the drm_cgroup_ops->active_time_us callback.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_driver.c | 10
drivers/gpu/drm/i915/i915_drm_client.c | 76 ++
drivers/gpu/drm/i915/i915_drm_client.h | 2 +
3 files changed
From: Tvrtko Ursulin
Similar to CPU scheduling, implement a concept of weight in the drm cgroup
controller.
Uses the same range and default as the CPU controller - CGROUP_WEIGHT_MIN,
CGROUP_WEIGHT_DFL and CGROUP_WEIGHT_MAX.
Later each cgroup is assigned a time budget proportionaly based on the
From: Tvrtko Ursulin
Add a new callback via which the drm cgroup controller is notifying the
drm core that a certain process is above its allotted GPU time.
Signed-off-by: Tvrtko Ursulin
---
include/drm/drm_drv.h | 8
kernel/cgroup/drm.c | 16
2 files changed, 24 i
From: Tvrtko Ursulin
To reduce the number of tracking going on, especially with drivers which
will not support any sort of control from the drm cgroup controller side,
lets express the funcionality as opt-in and use the presence of
drm_cgroup_ops as activation criteria.
Signed-off-by: Tvrtko Urs
From: Tvrtko Ursulin
Add a driver callback and core helper which allow querying the time spent
on GPUs for processes belonging to a group.
Signed-off-by: Tvrtko Ursulin
---
include/drm/drm_drv.h | 28
kernel/cgroup/drm.c | 20
2 files changed
From: Tvrtko Ursulin
To enable propagation of settings from the cgroup DRM controller to DRM
and vice-versa, we need to start tracking to which cgroups DRM clients
belong.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_file.c | 6
include/drm/drm_file.h | 6
include/linu
From: Tvrtko Ursulin
Thread group id (aka pid from userspace point of view) is a more
interesting thing to show as an owner of a DRM fd, so track and show that
instead of the thread id.
In the next patch we will make the owner updated post file descriptor
handover, which will also be tgid based
From: Tvrtko Ursulin
Skeleton controller without any functionality.
Signed-off-by: Tvrtko Ursulin
---
include/linux/cgroup_drm.h| 9 ++
include/linux/cgroup_subsys.h | 4 +++
init/Kconfig | 7
kernel/cgroup/Makefile| 1 +
kernel/cgroup/drm.c
From: Tvrtko Ursulin
With the typical model where the display server opends the file descriptor
and then hands it over to the client we were showing stale data in
debugfs.
Fix it by updating the drm_file->pid on ioctl access from a different
process.
The field is also made RCU protected to allo
From: Tvrtko Ursulin
This series contains a proposal for a DRM scheduling cgroup controller which
implements a weight based hierarchical GPU usage budget based controller
similar in concept to some of the existing controllers.
Motivation mostly comes from my earlier proposal where I identified t
== Series Details ==
Series: DP2.0 SDP CRC16 for 128/132b link layer (rev5)
URL : https://patchwork.freedesktop.org/series/113134/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Feb 15, 2023 at 10:38:32AM +0200, Vinod Govindapillai wrote:
> If the ignore long HPD flag is set, ignore the link training
> failures as well. Because of spurious HPDs, some unexpected link
> training failures are happening while executing IGT test cases.
> Ignore the link training failure
From: Ville Syrjälä
Move intel_plane_check_src_coordinates() from the pre-skl sprite
plane specific code to a more suitable place for common plane code.
Signed-off-by: Ville Syrjälä
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 60 ++-
.../gpu/drm/i915/display/intel_atomi
From: Ville Syrjälä
Move the sprite colorkey ioctl handler to its own file
so that intel_sprite.c becomes all about the low level
details of pre-skl sprite planes.
And drop a bunch of unnecessary includes while at it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/Makefile
From: Ville Syrjälä
Convert a few more skl+ plane registers to REG_BIT() & co.
Somehow thse were missed during the earlier cleanup.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i91
From: Ville Syrjälä
Might as well complete the SURFLIVE register definitions
for all platforms/plane types. We are only missing the
VLV/CHV sprite planes.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i91
From: Ville Syrjälä
Add the definitions for the skl+ univerals plane SURFLIVE
registers. Despite not being used for anything real
these came in suprisingly handy during some DSB debugging
recently, so having the defines around can be useful.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i91
From: Ville Syrjälä
VLV/CHV have an extra register to configure some stereo3d
signalling details via DP MSA. Make sure we reset that
register to zero (since we don't do any stereo3d stuff).
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
drivers/gpu/drm/i9
From: Ville Syrjälä
Add definitions for various pipe timestamp registers:
- frame timestamp (last start of vblank) (g4x+), already had this defined
- flip timestamp (when SURF was last written) (g4x+)
- flipdone timestamp (when last flipdone was signalled) (tgl+)
Note that on pre-tgl the flip re
From: Ville Syrjälä
The PIPE_MISC registers don't exist on pre-bdw hardware,
so there is no point in using pipe_offsets[] for them.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915
From: Ville Syrjälä
This PIPEMISC vs. PIPE_MISC inconsitency is ugly. Unify
the naming (PIPE_MISC is also what bspec has always called it).
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 56 ++---
From: Ville Syrjälä
Do a bit of cleanup/reorganization around mostly plane
relatd stuff, and also add some more plane/pipe registers
that are useful for development/debugging.
Ville Syrjälä (9):
drm/i915: Stop using pipe_offsets[] for PIPE_MISC*
drm/i915: s/PIPEMISC/PIPE_MISC/
drm/i915: De
== Series Details ==
Series: dma-fence: Deadline awareness
URL : https://patchwork.freedesktop.org/series/114863/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12829 -> Patchwork_114863v1
Summary
---
**SUCCESS**
N
From: Tvrtko Ursulin
On a slow machine, or with many processes and/or file descriptors to
parse, the period of the scanning loop can drift significantly from the
assumed value. This results in artificially inflated client busyness
percentages.
To alleviate the issue take some real timestamps and
> -Original Message-
> From: Shameerali Kolothum Thodi
> Sent: 08 March 2023 15:55
> To: 'Nicolin Chen'
> Cc: Xu, Terrence ; Liu, Yi L ;
> Jason Gunthorpe ; alex.william...@redhat.com; Tian,
> Kevin ; j...@8bytes.org; robin.mur...@arm.com;
> coh...@redhat.com; eric.au...@redhat.com; k..
== Series Details ==
Series: dma-fence: Deadline awareness
URL : https://patchwork.freedesktop.org/series/114863/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
Now that i915 is the last flush_scheduled_work() user, for now let's
start with blind conversion inside the whole drivers/gpu/drm/i915/
directory. Jani
Currently, DSC with YCBCR420 is not supported.
Return -EINVAL when trying with DSC with output_format as YCBCR420.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/
Add a wrapper function to check dp_downstream clock/bandwidth
constraints. Based on whether the sink supports FRL/TMDS the wrapper
calls the appropriate FRL/TMDS functions.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 51 +++--
1 file changed, 2
Currently we use the highest input BPC supported by DP sink while using
DSC.In cases where PCON with HDMI2.1 as branch device, if PCON supports
DSC but HDMI2.1 sink does not supports DSC, The PCON tries to use same
input BPC that is used between Source and the PCON without DSC, which
might not work
During FRL bandwidth check for downstream HDMI2.1 sink,
the min BPC supported is incorrectly taken for DP, and the check does
not consider ybcr420 only modes.
This patch fixes the bandwidth calculation similar to the TMDS case, by
taking min 8Bpc and considering Ycbcr420 only modes.
v2: Rebase
S
Add an inline helper function to check if the sink_format is set to
YCBCR420 format.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++
drivers/gpu/drm/i915/display/intel_dp.c| 4 ++--
drivers/gpu/drm/i915/display/intel_hdmi.c |
During modevalid step, the pipe bpp is computed assuming RGB output
format. When checking with DSC, consider the output_format and compute
the input bpp for DSC appropriately.
v2: For DP-MST we currently use RGB output format only, so continue
using RGB while computing dsc_bpp for MST case.
Signe
Start passing the sink_format, to all functions that take a bool
ycbcr420_output as parameter. This will make the functions generic,
and will serve as a slight step towards 4:2:2 support later.
v2: Rebased.
Suggested-by: Ville Syrj_l_
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/disp
Check for MODE_H_ILLEGAL before calculating max rates, lanes etc.
Move comments about compressed bpp U6.4 format closer to where it is used.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
New member to store the YCBCR20 Pass through capability of the DP sink.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/inte
The decision to use DFP output format conversion capabilities should be
during compute_config phase.
This patch uses the members of intel_dp->dfp to only store the
format conversion capabilities of the DP device and uses the crtc_state
sink_format member, to program the protocol-converter for
colo
This series fixes issues faced when an HDMI2.1 sink that does not
support DSC is connected via HDMI2.1PCON. It also includes other minor
HDMI2.1 PCON fixes/refactoring.
Patch 1-2 Have minor fixes/cleanups.
Patch 3-6 Pull the decision making to use DFP conversion capabilities
for every mode during
The decision to use DFP output format conversion capabilities should be
during compute_config phase.
This patch adds new member to crtc_state to represent the final
output_format to the sink. In case of a DFP this can be different than
the output_format, as per the format conversion done via the P
== Series Details ==
Series: cover-letter: Add vfio_device cdev for iommufd support
URL : https://patchwork.freedesktop.org/series/114850/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/114850/revisions/1/mbox/ not
applied
Applying: vfio: Allocate
== Series Details ==
Series: series starting with [1/4] drm/i915/opregion: Fix opregion setup during
system resume on platforms without display (rev2)
URL : https://patchwork.freedesktop.org/series/114222/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
D
== Series Details ==
Series: High refresh rate PSR fixes
URL : https://patchwork.freedesktop.org/series/115109/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12853 -> Patchwork_115109v1
Summary
---
**SUCCESS**
No
Hi Stan
Few other places also do not ceil the result as per the 64631
deinterleave, peakbw, clperchgroup
Well! I am not sure if this has any real impact, but FYI
Vinod
On Tue, 2023-03-14 at 11:27 +0200, Govindapillai, Vinod wrote:
> Hi Stan,
>
>
>
> On Fri, 2023-03-10 at 16:40 +0200, Stani
== Series Details ==
Series: High refresh rate PSR fixes
URL : https://patchwork.freedesktop.org/series/115109/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning
On 3/14/2023 10:27 AM, Imre Deak wrote:
Add the missing intel_opregion_cleanup() prototype fixing CONFIG_ACPI=n
builds.
Fixes: 3e226e4a2180 ("drm/i915/opregion: Cleanup opregion after errors during driver
loading")
Cc: Jani Nikula
Reported-by: kernel test robot
Link: https://lore.kernel.org
On Mon, 13 Mar 2023, Ashutosh Dixit wrote:
> On dGfx, the PL1 power limit being enabled and set to a low value results
> in a low GPU operating freq. It also negates the freq raise operation which
> is done before GuC firmware load. As a result GuC firmware load can time
> out. Such timeouts were
Hi Stan,
On Fri, 2023-03-10 at 16:40 +0200, Stanislav Lisovskiy wrote:
> Currently in our bandwidth calculations for QGV
> points we round up the calculations.
> Recently there was an update to BSpec, recommending
> to floor those calculations.
> The reasoning behind this was that, overestimatin
Add the missing intel_opregion_cleanup() prototype fixing CONFIG_ACPI=n
builds.
Fixes: 3e226e4a2180 ("drm/i915/opregion: Cleanup opregion after errors during
driver loading")
Cc: Jani Nikula
Reported-by: kernel test robot
Link: https://lore.kernel.org/oe-kbuild-all/202303141610.6l1vo7gw-...@int
Hi Andi,
On 3/13/2023 7:37 PM, Andi Shyti wrote:
Hi Nirmoy,
[...]
+int i915_gem_fb_mmap(struct drm_i915_gem_object *obj, struct vm_area_struct
*vma)
+{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct drm_device *dev = &i915->drm;
+ struct i915_mmap_offset
== Series Details ==
Series: Add OAM support for MTL
URL : https://patchwork.freedesktop.org/series/114801/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Ensure vblank >= psr2 vblank
where
Psr2 vblank = PSR2_CTL Block Count Number maximum line count.
Bspec: 71580, 49274
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b
PSR WM optimization should be disabled based on any wm level being
disabled. Currently it's disabled always when using delayed vblank.
Bspec: 71580
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 1
This patch set contains fix for Wa_16013835468 and Wa_14015648006 and
check for vblank being long enough for psr2.
Cc: Ville Syrjälä
Cc: Stanislav Lisovskiy
Cc: Mika Kahola
Jouni Högander (2):
drm/i915/psr: Fix Wa_16013835468 and Wa_14015648006
drm/i915/psr: Check that vblank is long enoug
== Series Details ==
Series: drm/i915: move DSC RC tables to drm_dsc_helper.c (rev2)
URL : https://patchwork.freedesktop.org/series/114473/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/114473/revisions/2/mbox/ not
applied
Applying: drm/i915/dsc:
On Fri, Mar 10, 2023 at 01:36:22PM -0400, Jason Gunthorpe wrote:
> On Wed, Mar 08, 2023 at 05:13:36AM -0800, Yi Liu wrote:
>
> > +int iommufd_access_set_ioas(struct iommufd_access *access, u32 ioas_id)
> > +{
> > + struct iommufd_ioas *new_ioas = NULL, *cur_ioas;
> > + struct iommufd_ctx *ictx
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