Re: [Intel-gfx] [PATCH v12 14/24] iommufd/device: Add iommufd_access_detach() API

2023-06-25 Thread Nicolin Chen
On Fri, Jun 23, 2023 at 11:15:40AM -0300, Jason Gunthorpe wrote: > > +static void __iommufd_access_detach(struct iommufd_access *access) > > +{ > > + struct iommufd_ioas *cur_ioas = access->ioas; > > + > > + lockdep_assert_held(&access->ioas_lock); > > + /* > > +* Set ioas to NULL to blo

Re: [Intel-gfx] [PATCH v2 2/6] drm/i915/gt: Clear all bits from GEN12_FF_MODE2

2023-06-25 Thread Matt Roper
On Sat, Jun 24, 2023 at 10:17:53AM -0700, Lucas De Marchi wrote: > Right now context workarounds don't do a rmw and instead only write to > the register. Since 2 separate programmings to the same register are > coalesced into a single write, this is not problematic for > GEN12_FF_MODE2 since both T

Re: [Intel-gfx] [PATCH] drm/i915/display/dp: Add fallback on LT failure for DP2.0

2023-06-25 Thread Murthy, Arun R
> -Original Message- > From: Jani Nikula > Sent: Tuesday, June 20, 2023 7:26 PM > To: Murthy, Arun R ; intel- > g...@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display/dp: Add fallback on LT > failure for DP2.0 > > On Tue, 20 Jun

[Intel-gfx] [PATCH 1/2] drm/i915/color: Add function to load degamma LUT in MTL

2023-06-25 Thread Chaitanya Kumar Borah
MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16 bit precision. Until a new uapi comes along to support higher bitdepth, upscale the values sent from userland to 24 bit before writing into the HW to contin

[Intel-gfx] [PATCH 2/2] drm/i915/color: For MTL convert 24 bit lut values to 16 bit

2023-06-25 Thread Chaitanya Kumar Borah
For MTL and beyond, convert back the 24 bit lut values read from HW to 16 bit values to maintain parity with userspace values. This way we avoid pipe config mismatch for pre-csc lut values. Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 8 1 file c

[Intel-gfx] [PATCH 0/2] MTL Degamma implementation

2023-06-25 Thread Chaitanya Kumar Borah
MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16 bit precision. Until a new uapi comes along to support higher bitdepth, upscale the values sent from userland to 24 bit before writing into the HW to contin

[Intel-gfx] [PATCH] drm/i915/display: Add header file for struct seq_file

2023-06-25 Thread Chaitanya Kumar Borah
With change [1], visibility of struct seq_file is lost in intel_display_power.h leading to build errors. Add header file explicitly to restore visibility. [1] ef104443bffa ("procfs: consolidate arch_report_meminfo declaration") Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/displ

Re: [Intel-gfx] [PATCH] drm/i915/display: Add header file for struct seq_file

2023-06-25 Thread Jani Nikula
On Mon, 26 Jun 2023, Chaitanya Kumar Borah wrote: > With change [1], visibility of struct seq_file is lost in > intel_display_power.h leading to build errors. Add header > file explicitly to restore visibility. > > [1] ef104443bffa ("procfs: consolidate arch_report_meminfo declaration") > > Signe