On Fri, 2023-11-03 at 06:10 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Thursday, November 2, 2023 1:08 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> > ; Nikula,
== Series Details ==
Series: drm/i915/gt: Temporarily disable CPU caching into DMA for MTL
URL : https://patchwork.freedesktop.org/series/125926/
State : warning
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/125926/revisions/1/mbox/ not
found
== Series Details ==
Series: drm/i915/gt: Temporarily disable CPU caching into DMA for MTL
URL : https://patchwork.freedesktop.org/series/125926/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125926v1
Sum
== Series Details ==
Series: drm/i915/dp_mst: Disable DSC on ICL+ MST outputs (rev2)
URL : https://patchwork.freedesktop.org/series/125895/
State : warning
== Summary ==
Error: dim checkpatch failed
4e8024b4a423 drm/i915/dp_mst: Disable DSC on ICL+ MST outputs
-:19: WARNING:COMMIT_LOG_LONG_LIN
== Series Details ==
Series: drm/i915/dp_mst: Disable DSC on ICL+ MST outputs (rev2)
URL : https://patchwork.freedesktop.org/series/125895/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125895v2
Summary
-
== Series Details ==
Series: drm/i915/xe2lpd: choose between PSR2 and FBC
URL : https://patchwork.freedesktop.org/series/125932/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops
On 03/11/2023 06:56, Krzysztof Kozlowski wrote:
On 03/11/2023 03:32, Kunwu Chan wrote:
Fix smatch warning:
drivers/gpu/drm/i915/gem/i915_gem_context.c:847 set_proto_ctx_sseu()
warn: potential spectre issue 'pc->user_engines' [r] (local cap)
Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-co
On 02/11/2023 22:14, Sripada, Radhakrishna wrote:
Hi Tvrtko,
-Original Message-
From: Tvrtko Ursulin
Sent: Thursday, November 2, 2023 10:41 AM
To: Hajda, Andrzej ; Sripada, Radhakrishna
; intel-gfx@lists.freedesktop.org
Cc: Chris Wilson
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl:
== Series Details ==
Series: drm/i915/xe2lpd: choose between PSR2 and FBC
URL : https://patchwork.freedesktop.org/series/125932/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125932v1
Summary
---
*
On Fri, 2023-11-03 at 03:31 +, Vivi, Rodrigo wrote:
> > >
> > > Any other suggestions?
> >
> > I think it will boil down to the reason uncore lock is held over
> > the
> > respective sections ie. the comment in i915_get_crtc_scanoutpos.
> >
> > If it is timing sensitive to the extent irq of
== Series Details ==
Series: drm/i915/xe2lpd: alternate WA for underruns with PSR2 and FBC
URL : https://patchwork.freedesktop.org/series/125934/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125934v1
Sum
On Fri, 03 Nov 2023, Gareth Yu wrote:
> Print another SSEU information addition to the first one.
>
> Cc : Tejas Upadhyay
> Cc : Matt Roper
> Cc : Ville Syrjälä
Superfluous space between Cc and :.
> Signed-off-by: Gareth Yu
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 13 ++---
>
On Fri, 03 Nov 2023, Vinod Govindapillai wrote:
> Implement the alternate WA for the underruns when both PSR2
> and FBC is enabled.
But we don't enable FBC when PSR2 is enabled, for display 12+.
See intel_fbc.c line 1200 or so.
BR,
Jani.
>
> Signed-off-by: Vinod Govindapillai
> ---
> driver
On Wed, 11 Oct 2023, Animesh Manna wrote:
> Add DPCD register definition for discovering, enabling and
> checking status of panel replay of the sink.
>
> Cc: Jouni Högander
> Cc: Arun R Murthy
> Cc: Jani Nikula
> Reviewed-by: Arun R Murthy
> Signed-off-by: Animesh Manna
Maarten, Maxime, Thom
Display driver shall read DPCD 00071h[3:1] during configuration
to get PSR setup time. This register provides the setup time
requirement on the VSC SDP entry packet. If setup time cannot be
met with the current timings
(e.g., PSR setup time + other blanking requirements > blanking time),
driver sho
== Series Details ==
Series: drm/i915/mtl: Print SSEU information of all GTs for debugfs
URL : https://patchwork.freedesktop.org/series/125941/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125941v1
Summa
On 03/11/2023 08:58, Coelho, Luciano wrote:
On Fri, 2023-11-03 at 03:31 +, Vivi, Rodrigo wrote:
Any other suggestions?
I think it will boil down to the reason uncore lock is held over
the
respective sections ie. the comment in i915_get_crtc_scanoutpos.
If it is timing sensitive to the
Hi,
On Fri, 2023-11-03 at 11:21 +0200, Jani Nikula wrote:
> On Fri, 03 Nov 2023, Vinod Govindapillai
> wrote:
> > Implement the alternate WA for the underruns when both PSR2
> > and FBC is enabled.
>
> But we don't enable FBC when PSR2 is enabled, for display 12+.
>
> See intel_fbc.c line 120
== Series Details ==
Series: drm/i915/mtl: C20 state verification (rev2)
URL : https://patchwork.freedesktop.org/series/125855/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125855v2
Summary
---
**
On Fri, 03 Nov 2023, "Govindapillai, Vinod"
wrote:
> Hi,
>
>
> On Fri, 2023-11-03 at 11:21 +0200, Jani Nikula wrote:
>> On Fri, 03 Nov 2023, Vinod Govindapillai
>> wrote:
>> > Implement the alternate WA for the underruns when both PSR2
>> > and FBC is enabled.
>>
>> But we don't enable FBC whe
On 02/11/2023 16:47, Jani Nikula wrote:
On Thu, 02 Nov 2023, Tvrtko Ursulin wrote:
On 02/11/2023 15:42, Jani Nikula wrote:
The implementation details of pmu should be implementation details
hidden inside i915_pmu.c. Make it so.
Don't tell me i915->pmu bothers xe somehow?
It doesn't bothe
From: Kunwu Chan
Fix smatch warning:
drivers/gpu/drm/i915/gem/i915_gem_context.c:847 set_proto_ctx_sseu()
warn: potential spectre issue 'pc->user_engines' [r] (local cap)
Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create
parameters (v5)")
Cc: # v5.15+
Signed-off-by: Ku
On 03/11/2023 05:29, Gareth Yu wrote:
Print another SSEU information addition to the first one.
Cc : Tejas Upadhyay
Cc : Matt Roper
Cc : Ville Syrjälä
Signed-off-by: Gareth Yu
---
drivers/gpu/drm/i915/i915_debugfs.c | 13 ++---
drivers/gpu/drm/i915/i915_gpu_error.c | 6 +-
== Series Details ==
Series: drm/i915/display: Support PSR entry VSC packet to be transmitted one
frame earlier (rev3)
URL : https://patchwork.freedesktop.org/series/125558/
State : warning
== Summary ==
Error: dim checkpatch failed
b58bf98ad0fd drm/i915/display: Support PSR entry VSC packet
== Series Details ==
Series: drm/i915/display: Support PSR entry VSC packet to be transmitted one
frame earlier (rev3)
URL : https://patchwork.freedesktop.org/series/125558/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125558v3
== Series Details ==
Series: series starting with [1/2] drm/i915: move display mutex inits to
display code (rev2)
URL : https://patchwork.freedesktop.org/series/125912/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked s
From: Patchwork
Sent: Friday, November 3, 2023 1:37 PM
To: Kahola, Mika
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/display: Support PSR entry VSC
packet to be transmitted one frame earlier (rev3)
Patch Details
Series:
drm/i915/display: Support PSR entry VSC p
== Series Details ==
Series: series starting with [1/2] drm/i915: move display mutex inits to
display code (rev2)
URL : https://patchwork.freedesktop.org/series/125912/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125912v2
=
On Fri, 2023-11-03 at 12:33 +0200, Jani Nikula wrote:
> On Fri, 03 Nov 2023, "Govindapillai, Vinod"
> wrote:
> > Hi,
> >
> >
> > On Fri, 2023-11-03 at 11:21 +0200, Jani Nikula wrote:
> > > On Fri, 03 Nov 2023, Vinod Govindapillai
> > > wrote:
> > > > Implement the alternate WA for the underru
Please ignore this patch. There is a bug in the patch that I still need to fix.
Thanks!
-Mika-
> -Original Message-
> From: Kahola, Mika
> Sent: Wednesday, November 1, 2023 4:05 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Sousa, Gustavo ; Kahola, Mika
>
> Subject: [PATCH] drm/i915/
== Series Details ==
Series: drm/i915: Fix potential spectre vulnerability
URL : https://patchwork.freedesktop.org/series/125950/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13833 -> Patchwork_125950v1
Summary
---
On Fri, 2023-11-03 at 09:47 +, Tvrtko Ursulin wrote:
>
> On 03/11/2023 08:58, Coelho, Luciano wrote:
> > On Fri, 2023-11-03 at 03:31 +, Vivi, Rodrigo wrote:
> > > > >
> > > > > Any other suggestions?
> > > >
> > > > I think it will boil down to the reason uncore lock is held
> > > > over
> -Original Message-
> From: Intel-gfx On Behalf Of
> Kahola, Mika
> Sent: Thursday, November 2, 2023 4:54 PM
> To: Sousa, Gustavo ; intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Syrjala, Ville
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Clear possible sticky bits on
> PI
> -Original Message-
> From: Kahola, Mika
> Sent: Friday, November 3, 2023 4:47 PM
> To: Kahola, Mika ; Sousa, Gustavo
> ; intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Syrjala, Ville
>
> Subject: RE: [PATCH] drm/i915/mtl: Clear possible sticky bits on PICA message
> bus
>
> >
On Thu, Nov 02, 2023 at 01:35:53PM -0300, Gustavo Sousa wrote:
> Quoting Radhakrishna Sripada (2023-11-02 13:06:44-03:00)
> >Experiments were conducted with different multipliers to VTD_GUARD macro
> >with multiplier of 185 we were observing occasional pipe faults when
> >running kms_cursor_legacy
On Wed, Nov 01, 2023 at 02:44:46PM -0700, Zhanjun Dong wrote:
> The gt wedged could be triggered by missing guc firmware file, HW not
> working, etc. Once triggered, it means all gt usage is dead, therefore we
> can't enable pxp under this fatal error condition.
>
> v2: Updated commit message.
>
Hi Tvrtko,
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Friday, November 3, 2023 1:30 AM
> To: Sripada, Radhakrishna ; Hajda, Andrzej
> ; intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Increase guard pages when vt-d
> is
> enab
On Fri, Nov 03, 2023 at 11:17:18AM +, Tvrtko Ursulin wrote:
>
> On 03/11/2023 05:29, Gareth Yu wrote:
> > Print another SSEU information addition to the first one.
> >
> > Cc : Tejas Upadhyay
> > Cc : Matt Roper
> > Cc : Ville Syrjälä
> > Signed-off-by: Gareth Yu
> > ---
> > drivers/gpu
Hi Rodrigo,
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Friday, November 3, 2023 8:35 AM
> To: Sousa, Gustavo
> Cc: Sripada, Radhakrishna ; intel-
> g...@lists.freedesktop.org; Chris Wilson
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Increase guard pages when vt-d
> is
> en
Hi Tvrtko,
On 2023-10-12 at 09:15:39 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> On top of checking that parsing works, check that there are some engines
> present. This will be needed once the memory stats are added and so return
> value from __igt_parse_drm_fdinfo() will then be pos
Hi Tvrtko,
On 2023-10-12 at 09:15:40 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> A short smoke tests to exercise fdinfo reads in parallel to contexts
> getting created and destroyed.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> tests/intel/drm_fdinfo.c | 68 +++
Hi Tvrtko,
On 2023-10-12 at 09:15:44 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Same concept as with the engine map, allowing callers to pass in fixed
> map of names to indices, simplifying their implementation and avoiding
> auto-detection while parsing.
>
> Signed-off-by: Tvrtko U
Hi Tvrtko,
On 2023-10-12 at 09:15:43 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Igt_drm_fdinfo defines it as an unsigned long so it is best that it
> matches here as well.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Kamil Konieczny
> ---
> lib/igt_drm_clients.c | 2 +-
> lib
Hi Tvrtko,
On 2023-10-12 at 09:15:42 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> I will need some record of which regions were found for intel_gpu_top so
> lets just copy over the region name from the map on the first match.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Kamil Koni
Hi Tvrtko,
On 2023-10-12 at 09:15:45 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Wrap all operations on clients via the Intel specific wrappers in order to
> simplify upcoming work.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Kamil Konieczny
> ---
> tools/intel_gpu_top.c | 42
Hi Tvrtko,
On 2023-10-12 at 09:15:46 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> JSON output has the full breakdown but for now the interactive mode only
> shows total and resident aggregated for all memory regions.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Kamil Konieczny
>
Hi Tvrtko,
On 2023-10-12 at 09:15:47 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Similar as we can toggle between aggregated engines and clients, add the
> capability to toggle between aggregated and per memory region stats.
>
> It starts in aggregated mode by default and interactive
Hi Tvrtko,
On 2023-10-12 at 09:15:41 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> A few basic smoke tests to check per client memory info looks legit.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Kamil Konieczny
> ---
> tests/intel/drm_fdinfo.c | 217 +++
Hi Andy,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-intel/for-linux-next-fixes linus/master v6.6
next-20231103]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
Hi Jonathan,
> -Original Message-
> From: Intel-gfx On Behalf Of
> Jonathan
> Cavitt
> Sent: Thursday, November 2, 2023 10:59 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Gupta, saurabhg ; Cavitt, Jonathan
> ; chris.p.wil...@linux.intel.com
> Subject: [Intel-gfx] [PATCH] drm/i915/gt: T
-Original Message-
From: Sripada, Radhakrishna
Sent: Friday, November 3, 2023 1:02 PM
To: Cavitt, Jonathan ;
intel-gfx@lists.freedesktop.org
Cc: Gupta, saurabhg ; Cavitt, Jonathan
; chris.p.wil...@linux.intel.com
Subject: RE: [Intel-gfx] [PATCH] drm/i915/gt: Temporarily disable CPU cach
From: Jani Nikula
Follow the contemporary conventions.
Cc: Andy Shevchenko
Cc: Hans de Goede
Signed-off-by: Jani Nikula
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/
From: Jani Nikula
With the various sequence versions and pointer increments interleaved,
it's a bit hard to decipher what's going on. Add separate paths for
different sequence versions.
Cc: Andy Shevchenko
Cc: Hans de Goede
Signed-off-by: Jani Nikula
Signed-off-by: Andy Shevchenko
---
drive
From: Jani Nikula
The lowest level functions are about setting GPIO values, not about
executing any sequences anymore.
Cc: Andy Shevchenko
Cc: Hans de Goede
Signed-off-by: Jani Nikula
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++--
From: Hans de Goede
Fix wrong initial value for GPIOs in bxt_gpio_set_value().
Signed-off-by: Hans de Goede
Signed-off-by: Andy Shevchenko
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu
From: Jani Nikula
Purely a guess. Drop the nop function.
Cc: Andy Shevchenko
Cc: Hans de Goede
Signed-off-by: Jani Nikula
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 40ecab551232 ("pinctrl:
baytrail: Really serialize all register accesses") for the details.
Taking all this into consideratio
From: Jani Nikula
Drop the unused parameter.
Cc: Andy Shevchenko
Cc: Hans de Goede
Signed-off-by: Jani Nikula
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/displa
DSI code for VBT has a set of ugly GPIO hacks, one of which is direct
talking to GPIO IP behind the actual driver's back. A second attempt
to fix that is here.
If I understood correctly, my approach should work in the similar way as
the current IOSF GPIO.
Hans, I believe you have some devices tha
Move existing condition to while(), so it will be clear on what
circumstances the loop is successfully finishing.
Reviewed-by: Andi Shyti
Signed-off-by: Andy Shevchenko
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 5 +
1 file changed, 1 insertion(+), 4 deletions
From: Hans de Goede
To properly deal with GPIOs used in MIPI panel sequences a temporary
GPIO lookup will be used. Since there can only be 1 GPIO lookup table
for the ":00:02.0" device this will not work if the GPIO lookup
table used by intel_dsi_vbt_gpio_init() is still registered.
After ge
Extract a common soc_gpio_set_value() helper that may be used by a few SoCs.
Signed-off-by: Andy Shevchenko
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 46 +++-
1 file changed, 26 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/disp
For a couple of cases the branches call the same bxt_gpio_set_value().
As Ville suggested they can be combined by dropping the DISPLAY_VER()
check from Gen 11 to Gen 9. Do it that way.
Suggested-by: Ville Syrjälä
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c |
Names of the MIPI sequence steps are sequential and defined, no
need to check for the gaps. However in seq_name the MIPI_SEQ_END
is missing. Add it there, and drop unneeded NULL check in
sequence_name().
Reviewed-by: Andi Shyti
Signed-off-by: Andy Shevchenko
Acked-by: Jani Nikula
---
drivers/g
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 0bd50d719b00 ("pinctrl:
cherryview: prevent concurrent access to GPIO controllers") for
the details. Taking all this into con
Currently soc_gpio_set_value() supports only a single indexing for GPIO pin.
For CHV case, for example, we will need to distinguish community based index
from the one that VBT is using. Introduce an additional parameter to
soc_gpio_set_value() and its callers.
Signed-off-by: Andy Shevchenko
Acked
In the snippets like the following
if (...)
return / goto / break / continue ...;
else
...
the 'else' is redundant. Get rid of it.
Reviewed-by: Andi Shyti
Signed-off-by: Andy Shevchenko
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/display/int
Drop unused vlv_iosf_sb_read() and vlv_iosf_sb_write().
Signed-off-by: Andy Shevchenko
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/vlv_sideband.c | 17 -
drivers/gpu/drm/i915/vlv_sideband.h | 3 ---
2 files changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/vlv_side
Hi Jonathan,
> -Original Message-
> From: Cavitt, Jonathan
> Sent: Friday, November 3, 2023 1:15 PM
> To: Sripada, Radhakrishna ; intel-
> g...@lists.freedesktop.org
> Cc: Gupta, saurabhg ;
> chris.p.wil...@linux.intel.com
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/gt: Temporarily disabl
== Series Details ==
Series: drm/i915/dp_mst: Disable DSC on ICL+ MST outputs (rev3)
URL : https://patchwork.freedesktop.org/series/125895/
State : warning
== Summary ==
Error: dim checkpatch failed
757b351472e1 drm/i915/dp_mst: Disable DSC on ICL+ MST outputs
-:19: WARNING:COMMIT_LOG_LONG_LIN
Panel Replay is a power saving feature for DP 2.0 monitor and similar
to PSR on EDP.
These patches are basic enablement patches added on top of
existing psr framework to enable full-screen live active frame
update mode of panel replay. Panel replay also can be enabled
in selective update mode whic
Add DPCD register definition for discovering, enabling and
checking status of panel replay of the sink.
Cc: Jouni Högander
Cc: Arun R Murthy
Cc: Jani Nikula
Reviewed-by: Arun R Murthy
Signed-off-by: Animesh Manna
---
include/drm/display/drm_dp.h | 23 +++
1 file changed,
From: Jouni Högander
This patch is preparing adding panel replay specific dpcd init.
Cc: Arun R Murthy
Cc: Jani Nikula
Reviewed-by: Arun R Murthy
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 41 +---
1 file changed, 23 insertions(+), 18 de
Modify existing PSR implementation to enable panel replay feature of DP 2.0
which is similar to PSR feature of EDP panel. There is different DPCD
address to check panel capability compare to PSR and vsc sdp header
is different.
v1: Initial version.
v2:
- Set source_panel_replay_support flag under
Due to similarity panel replay dpcd initialization got added in psr
function which is specific for edp panel. This patch enables panel
replay initialization for dp connector.
Cc: Jouni Högander
Cc: Arun R Murthy
Cc: Jani Nikula
Reviewed-by: Arun R Murthy
Signed-off-by: Animesh Manna
---
driv
TRANS_DP2_CTL register is programmed to enable panel replay from source
and sink is enabled through panel replay dpcd configuration address.
Bspec: 1407940617
v1: Initial version.
v2:
- Use pr_* flags instead psr_* flags. [Jouni]
- Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jo
Add debugfs support which will print source and sink status
per connector basis. Existing i915_psr_status and
i915_psr_sink_status will be used to get the source and
sink status of panel replay.
v1: Initial version. [rb-ed by Arun]
v2: Added check for DP 2.0 and connector type in connector_debugfs
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, November 3, 2023 12:32 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support fo
On 03.11.2023 16:53, Sripada, Radhakrishna wrote:
Hi Tvrtko,
-Original Message-
From: Tvrtko Ursulin
Sent: Friday, November 3, 2023 1:30 AM
To: Sripada, Radhakrishna ; Hajda, Andrzej
; intel-gfx@lists.freedesktop.org
Cc: Chris Wilson
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: I
== Series Details ==
Series: drm/i915/dp_mst: Disable DSC on ICL+ MST outputs (rev3)
URL : https://patchwork.freedesktop.org/series/125895/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13835 -> Patchwork_125895v3
Summary
-
== Series Details ==
Series: drm/i915/dsi: 4th attempt to get rid of IOSF GPIO
URL : https://patchwork.freedesktop.org/series/125977/
State : warning
== Summary ==
Error: dim checkpatch failed
cf6ba57516da drm/i915/dsi: assume BXT gpio works for non-native GPIO
481d4ce37fe4 drm/i915/dsi: switc
Hi Andrzej,
The patch mentioned below does not help with the issue.
Thanks,
RK
> -Original Message-
> From: Hajda, Andrzej
> Sent: Friday, November 3, 2023 2:18 PM
> To: Sripada, Radhakrishna ; Tvrtko Ursulin
> ; intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Vivi, Rodrigo
>
> Su
== Series Details ==
Series: drm/i915/dsi: 4th attempt to get rid of IOSF GPIO
URL : https://patchwork.freedesktop.org/series/125977/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13835 -> Patchwork_125977v1
Summary
---
BTW - sorry it took me a little while to get back to this, I'm still getting
back into the swing of things but I should be able to review this next week :)
Thanks for all of the work you've done so far!
On Mon, 2023-10-30 at 17:58 +0200, Imre Deak wrote:
> This is v4 of [1] with the following cha
== Series Details ==
Series: Panel replay phase1 implementation (rev10)
URL : https://patchwork.freedesktop.org/series/94470/
State : warning
== Summary ==
Error: dim checkpatch failed
f025bc5ed357 drm/panelreplay: dpcd register definition for panelreplay
a6ba947cd35c drm/i915/psr: Move psr sp
== Series Details ==
Series: Panel replay phase1 implementation (rev10)
URL : https://patchwork.freedesktop.org/series/94470/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Panel replay phase1 implementation (rev10)
URL : https://patchwork.freedesktop.org/series/94470/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13835 -> Patchwork_94470v10
Summary
---
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