drm-misc-next
patch link:
https://lore.kernel.org/r/20240213064835.139464-17-uma.shankar%40intel.com
patch subject: [PATCH 16/28] drm/i915/color: Create a transfer function color
pipeline
config: i386-randconfig-141-20240217
(https://download.01.org/0day-ci/archive/20240218/202402180310
== Series Details ==
Series: Program Deep PKG_C_LATENCY register (rev4)
URL : https://patchwork.freedesktop.org/series/129407/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14288 -> Patchwork_129407v4
Summary
---
== Series Details ==
Series: Program Deep PKG_C_LATENCY register (rev4)
URL : https://patchwork.freedesktop.org/series/129407/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Jouni,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Jouni-H-gander/drm-display-Add-missing-aux-less-alpm-wake-related-bits/20240215-185209
base:
== Series Details ==
Series: drm/i915/scaler: Update Pipe src size check for DISPLAY_VER >= 12
URL : https://patchwork.freedesktop.org/series/130061/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14288 -> Patchwork_130061v1
If fixed refresh rate program the PKGC_LATENCY register
with the highest latency from level 1 and above LP registers
and program ADDED_WAKE_TIME = DSB execution time.
else program PKGC_LATENCY with all 1's and ADDED_WAKE_TIME as 0.
This is used to improve package C residency by sending the highest
For Earlier platforms, the Pipe source size is 12-bits so
max pipe source width and height is 4096. For newer platforms it is
13-bits so theoretically max height is 8192, but maximum width
supported on a single pipe is 5120, beyond which we need to use
bigjoiner.
Currently we are using max scaler
Hi all,
After merging the drm-intel tree, today's linux-next build (htmldocs)
produced this warning:
Documentation/gpu/i915:222: drivers/gpu/drm/i915/display/intel_cdclk.c:69:
ERROR: Unexpected indentation.
Introduced by commit
79e2ea2eaaa6 ("drm/i915/cdclk: Document CDCLK update methods")
>
> Hey,
>
> Where is xe_hdcp_gsc_message.c defined in this series?
>
> I would move this part there.
>
Hi Maarten
So there is no xe_hdcp_gsc_message.c but just intel_hdcp_gsc_message.c which\
Was separated from intel_hdcp_gsc.c for the purpose of code sharing and this
Patch just build the
Hi Christian,
On 2/16/2024 5:29 PM, Christian König wrote:
Am 16.02.24 um 12:46 schrieb Arunpravin Paneer Selvam:
On 2/16/2024 4:41 PM, Matthew Auld wrote:
On 16/02/2024 10:00, Arunpravin Paneer Selvam wrote:
Remove the duplicate list_splice_tail call when the
total_allocated < size
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