Add SCLKGATE_DIS register and it's register definition which
will be used the next patch.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/i915_reg.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3f34efcd7d6c.
Disable bit 29 of SCLKGATE_DIS register around pps sequence
when we turn panel power on.
WA: 16023567976
Bspec: 49304
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_pps.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pps
Disable DPLS Gating around Panel Power on Sequence.
WA:16023567976
Signed-off-by: Suraj Kandpal
Suraj Kandpal (2):
drm/i915: Add SCLKGATE_DIS register definition
drm/i915/pps: Disable DPLS_GATING around pps sequence
drivers/gpu/drm/i915/display/intel_pps.c | 12
drivers/gpu/dr
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced these warnings:
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Excess function parameter
'drm_scanout_buffer' description in 'drm_fb_dma_get_scanout_buffer'
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning:
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Add SCLKGATE_DIS register and it's register definition which
> will be used the next patch.
Please just squash this into the next patch.
(And please don't reference "the next patch" in commit messages, because
it's meaningless once this becomes a commi
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, April 16, 2024 1:08 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Bhadane, Dnyaneshwar
> ; Kandpal, Suraj
>
> Subject: Re: [PATCH 1/2] drm/i915: A
On 15/04/2024 19:14, Matt Roper wrote:
On Mon, Apr 15, 2024 at 10:07:32AM -0700, Matt Roper wrote:
On Mon, Apr 15, 2024 at 01:44:22PM +0530, Balasubramani Vivekanandan wrote:
From: Matthew Auld
Perform manual transient cache flush prior to flip and at the end of
frontbuffer_flush. This is nee
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Disable bit 29 of SCLKGATE_DIS register around pps sequence
> when we turn panel power on.
Add blank line here.
> WA: 16023567976
> Bspec: 49304
>
Remove blank line here.
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_pps
On Mon, 15 Apr 2024, "Dixit, Ashutosh" wrote:
> On Mon, 15 Apr 2024 16:35:02 -0700, Armin Wolf wrote:
>>
>
> Hi Armin,
>
>> Am 16.04.24 um 00:36 schrieb Ashutosh Dixit:
>> > @@ -818,10 +818,10 @@ void i915_hwmon_register(struct drm_i915_private
>> > *i915)
>> >hwm_get_preregistration_info(i91
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are
> on HDMI TMDS operation for DISPLAY_VEY >= 14.
Blank line here.
> WA: 16022217614
The workarounds need to be listed in comments, not so much in the commit
message.
> Bspec: 49273
> Bspec
> -Original Message-
> From: Kandpal, Suraj
> Sent: Tuesday, April 16, 2024 12:58 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Bhadane, Dnyaneshwar
> ; Kandpal, Suraj
>
> Subject: [PATCH 2/2] drm/i915/pps: Disable DPLS_G
On Fri, 05 Apr 2024, José Relvas wrote:
> The best approach here would probably be to expose a similar attribute to
> amdgpu's
> "panel_power_savings", with a scale that controls the feature's
> aggressiveness,
> then update userspace tools, including power-profiles-daemon, to set the value
> b
Hi Rodrigo,
On Tuesday, 16 April 2024 03:16:31 CEST Rodrigo Vivi wrote:
> On Mon, Apr 15, 2024 at 09:53:09PM +0200, Janusz Krzysztofik wrote:
> > We defer actually closing, unbinding and destroying a VMA until next idle
> > point, or until the object is freed in the meantime. By postponing the
>
Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are
on HDMI TMDS operation for DISPLAY_VER >= 14.
--v2
-Wa to be mentioned in comments not in commit message [Jani]
-Remove blankline [Jani]
Bspec: 49273
Bspec: 69964
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_h
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 15, 2024 3:36 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf
== Series Details ==
Series: Disable DPLS Gating around PPS
URL : https://patchwork.freedesktop.org/series/132489/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warn
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 15, 2024 3:39 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in
>
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 15, 2024 3:44 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> ; Nikula, Jani
> Subject: Re: [PATCH v2 6/6] drm/i915/alpm: Add debugfs for LOBF
>
> On
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, April 15, 2024 5:17 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Murthy, Arun R ;
> Manna, Animesh
> Subject: Re: [PATCH v2 2/6] drm/i915/alpm: Move alp
== Series Details ==
Series: Disable DPLS Gating around PPS
URL : https://patchwork.freedesktop.org/series/132489/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132489v1
Summary
---
**FAILURE**
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, April 15, 2024 5:18 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Murthy, Arun R ;
> Manna, Animesh
> Subject: Re: [PATCH v2 4/6] drm/i915/alpm: Add comp
On 16/04/2024 09:31, Stephen Rothwell wrote:
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced these warnings:
drivers/gpu/drm/drm_fb_dma_helper.c:166: warning: Excess function parameter
'drm_scanout_buffer' description in 'drm_fb_dma_get_scanout_buffer'
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, April 15, 2024 5:19 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Murthy, Arun R ;
> Manna, Animesh
> Subject: Re: [PATCH v2 5/6] drm/i915/alpm: Enable l
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, April 15, 2024 5:23 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Murthy, Arun R ;
> Manna, Animesh
> Subject: Re: [PATCH v2 6/6] drm/i915/alpm: Add debu
On Tue, 16 Apr 2024, Suraj Kandpal wrote:
> Disable HDCP Line Rekeying when HDCP ver > 1.4 and when we are
> on HDMI TMDS operation for DISPLAY_VER >= 14.
>
> --v2
> -Wa to be mentioned in comments not in commit message [Jani]
> -Remove blankline [Jani]
>
> Bspec: 49273
> Bspec: 69964
> Signed-off
On Tue, 2024-04-16 at 08:15 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Monday, April 15, 2024 3:36 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> > ; Nikula, Jani
On Tue, 2024-04-16 at 08:20 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Monday, April 15, 2024 3:39 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: dri-de...@lists.freedesktop.org; Murthy, Arun R
> > ; Nikula, Jani
== Series Details ==
Series: drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on HDMI (rev2)
URL : https://patchwork.freedesktop.org/series/132479/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132479v2
==
Rebase.
Jani Nikula (7):
drm/displayid: move drm_displayid.h to drm_displayd_internal.h
drm/edid: move all internal declarations to drm_crtc_internal.h
drm/edid: group struct drm_edid based declarations together
drm/edid: rename drm_find_edid_extension() to
drm_edid_find_extension()
There are no exported symbols for displayid, and it's all internal
interfaces. Move the header to drivers/gpu/drm/drm_displayd_internal.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_displayid.c | 3 ++-
.../gpu/drm/drm_displayid_internal.h
The declarations for internal EDID functions are a bit scattered. Put
them all in drm_crtc_internal.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_crtc_internal.h | 6 ++
drivers/gpu/drm/drm_displayid.c | 1 +
drivers/gpu/drm/drm_eld.c | 4 +++-
drivers/gpu/drm/drm_inter
Keep the declarations for struct drm_edid based functions together.
Signed-off-by: Jani Nikula
---
include/drm/drm_edid.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 324e900cc287..92fff199aa78 100644
--- a/incl
Follow the drm_edid_ naming convention.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_crtc_internal.h | 2 +-
drivers/gpu/drm/drm_displayid.c | 3 ++-
drivers/gpu/drm/drm_edid.c | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc_in
Prefer the EDID iterators over drm_edid_find_extension() in
drm_edid_has_cta_extension(), even if this leads to more code. The key
is to use the same patterns as much as possible.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 14 --
1 file changed, 12 insertions(+), 2 d
drm_edid_are_equal() is only used within drm_edid.c. Make it static. Do
not encourage more uses of struct edid.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 3 +--
include/drm/drm_edid.h | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename drm_edid_eq(). Functionally deduce the length from the blob
size, not the blob data, making it more robust against any errors.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 41 ++--
Disable bit 29 of SCLKGATE_DIS register around pps sequence
when we turn panel power on.
--v2
-Squash two commit together [Jani]
-Use IS_DISPLAY_VER [Jani]
-Fix multiline comment [Jani]
Bspec: 49304
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_pps.c | 12
dri
> -Original Message-
> From: Nikula, Jani
> Sent: Tuesday, April 16, 2024 2:28 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Kandpal, Suraj
> Subject: Re: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying
== Series Details ==
Series: drm/i915: limit eDP MSO pipe only for display version 20 and below
(rev4)
URL : https://patchwork.freedesktop.org/series/129123/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14583 -> Patchwork_129123v4
== Series Details ==
Series: drm/edid: cleanups, rebase
URL : https://patchwork.freedesktop.org/series/132494/
State : warning
== Summary ==
Error: dim checkpatch failed
3be00db55665 drm/displayid: move drm_displayid.h to drm_displayd_internal.h
-:31: WARNING:FILE_PATH_CHANGES: added, moved or
== Series Details ==
Series: drm/edid: cleanups, rebase
URL : https://patchwork.freedesktop.org/series/132494/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning:
== Series Details ==
Series: drm/edid: cleanups, rebase
URL : https://patchwork.freedesktop.org/series/132494/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132494v1
Summary
---
**FAILURE**
Seri
== Series Details ==
Series: drm/i915/pps: Disable DPLS_GATING around pps sequence
URL : https://patchwork.freedesktop.org/series/132495/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14583 -> Patchwork_132495v1
Summary
---
On 15.4.2024 19.06, Matt Roper wrote:
On Mon, Apr 15, 2024 at 01:44:06PM +0530, Balasubramani Vivekanandan wrote:
Framebuffer format modifiers are used to indicate the existence of
auxillary surface in the plane, containing the CCS data. But on
s/auxillary/auxiliary/ in a few places in this c
Am 16.04.24 um 00:36 schrieb Ashutosh Dixit:
When both hwmon and hwmon drvdata (on which hwmon depends) are device
managed resources, the expectation, on device unbind, is that hwmon will be
released before drvdata. However, in i915 there are two separate code
paths, which both release either dr
On Tue, Apr 16, 2024 at 11:00:12AM +0300, Jani Nikula wrote:
> On Fri, 05 Apr 2024, José Relvas wrote:
> > The best approach here would probably be to expose a similar attribute to
> > amdgpu's
> > "panel_power_savings", with a scale that controls the feature's
> > aggressiveness,
> > then upda
Hi
Am 16.04.24 um 11:19 schrieb Jani Nikula:
Prefer the EDID iterators over drm_edid_find_extension() in
drm_edid_has_cta_extension(), even if this leads to more code. The key
is to use the same patterns as much as possible.
Should this patch go before patch 4? That would limit the impact of t
== Series Details ==
Series: Add support for partial mapping (rev7)
URL : https://patchwork.freedesktop.org/series/131817/
State : warning
== Summary ==
Error: dim checkpatch failed
46a97a93cbcf drm/i915/gem: Increment vma offset when mapping fb objects
840915d2ed48 drm/i915/gem: Do not look f
Hi
Am 16.04.24 um 11:20 schrieb Jani Nikula:
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename drm_edid_eq(). Functionally deduce the length from the blob
size, not the blob data, making it more robust against any errors.
Could be squashed into patch 6.
Best re
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
> Hi
>
> Am 16.04.24 um 11:19 schrieb Jani Nikula:
>> Prefer the EDID iterators over drm_edid_find_extension() in
>> drm_edid_has_cta_extension(), even if this leads to more code. The key
>> is to use the same patterns as much as possible.
>
> Should t
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
> Hi
>
> Am 16.04.24 um 11:20 schrieb Jani Nikula:
>> Repurpose drm_edid_are_equal() to be more helpful for its single user,
>> and rename drm_edid_eq(). Functionally deduce the length from the blob
>> size, not the blob data, making it more robust aga
== Series Details ==
Series: Add support for partial mapping (rev7)
URL : https://patchwork.freedesktop.org/series/131817/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14584 -> Patchwork_131817v7
Summary
---
**FAILU
On Tue, 16 Apr 2024, José Relvas wrote:
> One more question. Some documentation refers to
> "OPST (OLED power saving technology)". It's my understanding that this
> uses the same hardware blocks and APIs as DPST - only the algorithm
> in software is different. Userspace would need a way to distin
Hi
Am 16.04.24 um 14:27 schrieb Jani Nikula:
On Tue, 16 Apr 2024, Thomas Zimmermann wrote:
Hi
Am 16.04.24 um 11:20 schrieb Jani Nikula:
Repurpose drm_edid_are_equal() to be more helpful for its single user,
and rename drm_edid_eq(). Functionally deduce the length from the blob
size, not the
On Tue, Apr 16, 2024 at 12:57:33PM +0530, Suraj Kandpal wrote:
> Add SCLKGATE_DIS register and it's register definition which
> will be used the next patch.
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/driv
On Sat, Apr 13, 2024 at 12:33:42AM +0300, Vinod Govindapillai wrote:
> In XE, the updated fb mapping is already done and updated as
> part of intel_find_initial_plane_obj(). So no need to invoke
> fixup_initial_plane_config() again as it would basically write
> the same data to "PLAN_SURF" again.
>
On Thu, Apr 11, 2024 at 11:39:24AM +0530, Suraj Kandpal wrote:
> As of now whenerver HDR is switched on we use the PWM to change the
> backlight as opposed to AUX based backlight changes in terms of nits.
> This patch writes to the appropriate DPCD registers to enable aux
> based backlight using va
On Tuesday, 16 April 2024 12:50:05 CEST Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/vma: Fix UAF on reopen vs destroy race (rev3)
> URL : https://patchwork.freedesktop.org/series/132360/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_14582_full -> Pat
On Tue, Apr 09, 2024 at 03:26:43PM +0300, Jani Nikula wrote:
> As a baby step towards making struct intel_display the main data
> structure for display, add a backpointer to struct drm_device that can
> be used instead of &i915->drm.
>
> Signed-off-by: Jani Nikula
I needed that a few weeks ago w
On Tue, Apr 09, 2024 at 03:26:44PM +0300, Jani Nikula wrote:
> Convert various pointers to struct intel_display * using _Generic().
>
> Add some macro magic to make adding new conversions easier, and somewhat
> abstract the need to cast each generic association. The cast is required
> because all
On Tue, Apr 09, 2024 at 03:26:45PM +0300, Jani Nikula wrote:
> Add generic __to_intel_display() macro that accepts either struct
> drm_i915_private * or struct intel_display *. This is to be used for
> transitional stuff that eventually needs to be converted to use struct
> intel_display *, and the
On Tue, Apr 09, 2024 at 03:26:46PM +0300, Jani Nikula wrote:
> Add generic __to_intel_display() macro that accepts either struct
> xe_device * or struct intel_display *. This is to be used for
> transitional stuff that eventually needs to be converted to use struct
> intel_display *, and therefore
On Tue, Apr 09, 2024 at 03:26:47PM +0300, Jani Nikula wrote:
> Use the generic __to_intel_display() to allow passing either struct
> drm_i915_private * or struct intel_display * to the feature test macros.
>
> Unfortunately, this requires including i915_drv.h in xe display
> code. This is still be
On Tue, Apr 09, 2024 at 03:26:48PM +0300, Jani Nikula wrote:
> It would be too much noise to convert the intel_de_* functions from
> using struct drm_i915_private to struct intel_display all at once. Add
> generic wrappers using __to_intel_display() to accept both.
>
> Signed-off-by: Jani Nikula
On Tue, Apr 09, 2024 at 03:26:49PM +0300, Jani Nikula wrote:
> Use struct intel_display instead of struct drm_i915_private for
> quirks. Also do drive-by conversions in call sites of intel_has_quirk().
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> .../gpu/drm/i915/display/i
On Tue, Apr 09, 2024 at 03:26:42PM +0300, Jani Nikula wrote:
> v3 of [1], and no longer an RFC.
>
> This is just initial plumbing, and not much in terms of usage (apart
> from patch 7). We could start converting a number of places already, but
> the main blocker atm is that I haven't figured out a
On Tue, Apr 16, 2024 at 10:09:46AM +0200, Janusz Krzysztofik wrote:
> Hi Rodrigo,
>
> On Tuesday, 16 April 2024 03:16:31 CEST Rodrigo Vivi wrote:
> > On Mon, Apr 15, 2024 at 09:53:09PM +0200, Janusz Krzysztofik wrote:
> > > We defer actually closing, unbinding and destroying a VMA until next idle
On Mon, Apr 15, 2024 at 03:36:12PM -0700, Ashutosh Dixit wrote:
> When both hwmon and hwmon drvdata (on which hwmon depends) are device
> managed resources, the expectation, on device unbind, is that hwmon will be
> released before drvdata. However, in i915 there are two separate code
> paths, whic
On Tue, 16 Apr 2024 11:55:20 -0700, Rodrigo Vivi wrote:
>
Hi Rodrigo,
> > @@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private *i915)
> >
> > void i915_hwmon_unregister(struct drm_i915_private *i915)
> > {
> > - fetch_and_zero(&i915->hwmon);
> > + struct i915_hwmon *hwmon =
On 4/10/2024 13:15, Daniele Ceraolo Spurio wrote:
On DG2, submissions to VCS engines tied to a gem context are blocked
until the HuC is loaded. Since some selftests do use a gem context,
wait for the HuC load to complete before running the tests to avoid
contamination.
Closes: https://gitlab.fre
On Tue, Apr 16, 2024 at 12:02:10PM -0700, Dixit, Ashutosh wrote:
> On Tue, 16 Apr 2024 11:55:20 -0700, Rodrigo Vivi wrote:
> >
>
> Hi Rodrigo,
>
> > > @@ -849,5 +849,26 @@ void i915_hwmon_register(struct drm_i915_private
> > > *i915)
> > >
> > > void i915_hwmon_unregister(struct drm_i915_privat
On Thu, Apr 11, 2024 at 12:55:29PM -0400, Golani, Mitulkumar Ajitkumar wrote:
>
>
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Wednesday, April 10, 2024 9:49 PM
> > To: Golani, Mitulkumar Ajitkumar ;
> > tzimmerm...@suse.de; mrip...@kernel.org;
> > maarten.lankho...@linux.int
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 66e4190e92ce0e4a50b2f6be0e5f5b2e47e072f4 Add linux-next specific
files for 20240416
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202404161933.izfqz32k-...@intel.com
https
Fix the calculation of the DSC line buffer depth. This is limited both
by the source's and sink's maximum line buffer depth, but the former one
was not taken into account. On all Intel platform's the source's maximum
buffer depth is 13, so the overall limit is simply the minimum of the
source/sink'
This is v2 of [1], after additional testing on the DELL U3224KBA and
Unigraf UCD-500 CTS devices and based on that adding a 3% overhead to
DPT/DSC BW limit calculation in patch 4 to fix a 6k mode on both of
these devices.
Cc: Ankit Nautiyal
[1] https://lore.kernel.org/all/20240320201152.3487892-
The expected link symbol clock unit when calculating the DSC DPT bpp
limit is kSymbols/sec, aligning with the dotclock's kPixels/sec unit
based on the crtc clock. As opposed to this port_clock is used - which
has a 10 kbits/sec unit - with the resulting symbol clock in 10
kSymbols/sec units (disreg
The DSC DPT interface BW limit check should take into account the link
clock's (aka DDI clock in bspec) channel coding efficiency overhead.
Bspec suggests that the FEC overhead needs to be applied, however HW
people claim this isn't the case, nor is any overhead applicable.
However based on testin
The DPT/DSC bpp limit should be accounted for on MTL platforms as well,
do so.
Bspec: 49259
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/inte
The DSC DPT bpp limit check should only fail if the available DPT BW is
less than the required BW, fix the check accordingly.
Reviewed-by: Ankit Nautiyal
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Instead of checking each compressed bpp value against the maximum
DSC/DPT bpp, simplify things by calculating the maximum bpp upfront and
limiting the range of bpps looped over using this maximum.
While at it add a comment about the origin of the DSC/DPT bpp limit.
Bspec: 49259, 68912
Reviewed-b
Add a function to get the AUX device of the parent of an MST port, used
by a follow-up i915 patch in the patchset.
v2: Move drm_dp_mst_aux_for_parent() forward declaration to this patch
(Ankit)
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Acked-by: Maarten
The DPCD OUI of the logical port on a Dell UHBR monitor - on which the
AUX device is used to enable DSC - is all 0. To detect if the HBLANK
expansion quirk is required for this monitor use the OUI of the port's
parent instead.
Since in the above case the DPCD of both the logical port and the paren
Factor out a function to check if an MST port is logical, used by a
follow-up i915 patch in the patchset.
v2: Move drm_dp_mst_aux_for_parent() forward declaration to the next
patch. (Ankit)
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Acked-by: Maarten Lank
Enabling the 5k@60Hz uncompressed mode on the MediaTek/Dell U3224KBA
monitor results in a blank screen, at least on MTL platforms on UHBR
link rates with some (<30) uncompressed bpp values. Enabling compression
fixes the problem, so do that for now. Windows enables DSC always if the
sink supports i
Factor out a function to check for UHBR channel coding support used by a
follow-up patch in the patchset.
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Ankit Nautiyal
Reviewed-by: Manasi Navare
Acked-by: Maarten Lankhorst
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c
== Series Details ==
Series: drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
URL : https://patchwork.freedesktop.org/series/131386/
State : warning
== Summary ==
Error: dim checkpatch failed
5724c674a1ec drm/i915/dp: Fix DSC line buffer depth programming
14de0d36c5c7 drm/i915/dp_mst: Fi
== Series Details ==
Series: drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
URL : https://patchwork.freedesktop.org/series/131386/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
For the upcoming changes we need a cleaner way to build the list
of uabi engines.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
Hi,
just sending this patch to unburden the coming series from this
single patch inherited from a previously sent series.
Andi
drivers/gpu/drm/i915/gt/
== Series Details ==
Series: drm/i915/dp: Few MTL/DSC and a UHBR monitor fix (rev2)
URL : https://patchwork.freedesktop.org/series/131386/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14591 -> Patchwork_131386v2
Summary
--
== Series Details ==
Series: drm/i915/gt: Refactor uabi engine class/instance list creation
URL : https://patchwork.freedesktop.org/series/132521/
State : warning
== Summary ==
Error: dim checkpatch failed
2f4e662264cc drm/i915/gt: Refactor uabi engine class/instance list creation
-:54: WARNIN
== Series Details ==
Series: drm/i915/gt: Refactor uabi engine class/instance list creation
URL : https://patchwork.freedesktop.org/series/132521/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14591 -> Patchwork_132521v1
Su
On 4/15/2024 09:44, Nirmoy Das wrote:
Currently intel_gt_reset() happens as follows:
reset_prepare() ---> Sends GDRST to GuC, GuC is in GS_MIA_IN_RESET
do_reset()
__intel_gt_reset()
*_engine_reset_prepare() -->RESET_CTL expects running
GuC
> -Original Message-
> From: Sebastian Wick
> Sent: Tuesday, April 16, 2024 7:10 PM
> To: Kandpal, Suraj
> Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar
> ; Shankar, Uma
> ; Nautiyal, Ankit K ;
> Murthy, Arun R ; Nikula, Jani
> ; Kumar, Naveen1
> Subject: Re: [5/6] drm/i
> -Original Message-
> From: Ville Syrjälä
> Sent: Tuesday, April 16, 2024 6:25 PM
> To: Kandpal, Suraj
> Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar
> ; Shankar, Uma
> ; Nautiyal, Ankit K ;
> Bhadane, Dnyaneshwar
> Subject: Re: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS r
When both hwmon and hwmon drvdata (on which hwmon depends) are device
managed resources, the expectation, on device unbind, is that hwmon will be
released before drvdata. However, in i915 there are two separate code
paths, which both release either drvdata or hwmon and either can be
released before
== Series Details ==
Series: drm/i915/pps: Disable DPLS_GATING around pps sequence (rev2)
URL : https://patchwork.freedesktop.org/series/132495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14591 -> Patchwork_132495v2
Summ
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