Hi,
Please file bug at #1. Would be also good to check our existing bug as I can
see we have IVB on our CI
https://intel-gfx-ci.01.org/tree/drm-tip/index.html?hosts=ivb .
So results from suspend issues could be at
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip.html?testfilter=suspend&hosts=ivb
On Mon, 2024-04-29 at 19:08 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Manna, Animesh
> > Sent: Tuesday, April 30, 2024 12:24 AM
> > To: Hogander, Jouni ; intel-
> > g...@lists.freedesktop.org
> > Subject: RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> > ha
Check mst_port field in intel_connector to check connector type
rather than rely on encoder as it may not be attached to connector
at times.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/g
Move assignment of aux after connector type check as port may not
exist if connector is not DPMST.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
This patch series aims to avoid page fault errors caused by aux
early assignment as connector may not be mst and using encoder
to check for connector type.
Signed-off-by: Suraj Kandpal
Suraj Kandpal (2):
drm/i915/hdcp: Move aux assignment after connector type check
drm/i915/hdcp: Check mst_p
> -Original Message-
> From: Borah, Chaitanya Kumar
> Sent: Tuesday, April 30, 2024 12:05 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2
> on HDMI
>
> Hi Suraj,
>
> > -Original Message-
> >
Hi Suraj,
> -Original Message-
> From: Kandpal, Suraj
> Sent: Wednesday, April 24, 2024 10:42 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Kandpal,
> Suraj
> Subject: [PATCH] drm/i915/hdcp: Disable HDCP Line Rekeying for HDCP2.2 on
> HDMI
>
> Disable HDCP Line
On Mon, 2024-04-29 at 18:54 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Monday, April 29, 2024 5:38 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh ; Hogander, Jouni
> >
> > Subject: [PATCH v8 01/11] drm/i915/psr: Rename
On Mon, 29 Apr 2024 11:24:27 -0700, Rodrigo Vivi wrote:
>
> On Mon, Apr 29, 2024 at 09:29:15AM -0700, Ashutosh Dixit wrote:
> > Switching from xe_device_mem_access_get/put to xe_pm_runtime_get/put
> > results in the following WARNING in xe_oa:
> >
> > [11614.356168] xe :00:02.0: Missing outer r
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: b0a2c79c6f3590b74742cbbc76687014d47972d8 Add linux-next specific
files for 20240429
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/20240429.kkvw8mvg-...@intel.com
https
Hi,
I updated the Linux kernel on an old machine from v6.5.9
to current v6.8.8 and found the display failed after resume
from suspend to RAM. Then I tried v6.7.9 and v6.6.29, both
also failed. v6.5.9 works.
- display connected via display port: hangup
- I also tried HDMI with v6.6.29: garbage (c
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 29, 2024 5:38 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v8 06/11] drm/i915/psr: Modify intel_dp_get_su_granularity
> to support panel replay
>
> Currently intel_
> -Original Message-
> From: Manna, Animesh
> Sent: Tuesday, April 30, 2024 12:24 AM
> To: Hogander, Jouni ; intel-
> g...@lists.freedesktop.org
> Subject: RE: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> has_sel_update
>
>
>
> > -Original Message-
> > From: Hogander, Jo
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 29, 2024 5:38 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v8 01/11] drm/i915/psr: Rename has_psr2 as
> has_sel_update
>
> We are going to reuse has_psr2 for panel_
On Mon, Apr 29, 2024 at 09:29:15AM -0700, Ashutosh Dixit wrote:
> Switching from xe_device_mem_access_get/put to xe_pm_runtime_get/put
> results in the following WARNING in xe_oa:
>
> [11614.356168] xe :00:02.0: Missing outer runtime PM protection
> [11614.356187] WARNING: CPU: 1 PID: 13075 at
== Series Details ==
Series: drm/xe/xe_ggtt: No need to use xe_pm_runtime_get_noresume
URL : https://patchwork.freedesktop.org/series/133032/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14674 -> Patchwork_133032v1
Summary
== Series Details ==
Series: drm/xe/xe_ggtt: No need to use xe_pm_runtime_get_noresume
URL : https://patchwork.freedesktop.org/series/133032/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Switching from xe_device_mem_access_get/put to xe_pm_runtime_get/put
results in the following WARNING in xe_oa:
[11614.356168] xe :00:02.0: Missing outer runtime PM protection
[11614.356187] WARNING: CPU: 1 PID: 13075 at drivers/gpu/drm/xe/xe_pm.c:549
xe_pm_runtime_get_noresume+0x60/0x80 [xe]
== Series Details ==
Series: drm/i915/color: first batch of implicit dev_priv removals
URL : https://patchwork.freedesktop.org/series/133024/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14673 -> Patchwork_133024v1
Summary
== Series Details ==
Series: drm/i915/color: first batch of implicit dev_priv removals
URL : https://patchwork.freedesktop.org/series/133024/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
== Series Details ==
Series: drm/i915/color: first batch of implicit dev_priv removals
URL : https://patchwork.freedesktop.org/series/133024/
State : warning
== Summary ==
Error: dim checkpatch failed
7712a3285dd7 drm/i915: pass dev_priv explicitly to PALETTE
-:98: ERROR:COMPLEX_MACRO: Macros
On Mon, Apr 29, 2024 at 05:02:21PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C22 register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c |
On Mon, Apr 29, 2024 at 05:02:20PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C21_C20 register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c
On Mon, Apr 29, 2024 at 05:02:19PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C12 register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c |
On Mon, Apr 29, 2024 at 05:02:18PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C11_C10 register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c
On Mon, Apr 29, 2024 at 05:02:17PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C02 register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c |
On Mon, Apr 29, 2024 at 05:02:16PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C01_C00 register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c
On Mon, Apr 29, 2024 at 05:02:15PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PALETTE register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_color.c| 29
On Mon, 29 Apr 2024, Rodrigo Vivi wrote:
> From a glance on these initial patches, it sounds really organized in
> individual patches and easy to review.
> Perhaps if we take this path we might just split the series in blocks
> and merge these initial 17, and we continue over the next weeks.
Ack.
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C21_C20 register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 3 insertions(+),
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C11_C10 register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 3 insertions(+),
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C22 register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 3 insertions(+), 3 de
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C01_C00 register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 3 insertions(+),
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C12 register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 3 insertions(+), 3 de
This is the first batch from [1], selected based on the macros having
just been moved to intel_color_regs.h, so it's a nice contained set.
BR,
Jani.
[1] https://lore.kernel.org/r/cover.1714136165.git.jani.nik...@intel.com
Jani Nikula (7):
drm/i915: pass dev_priv explicitly to PALETTE
drm/i9
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C02 register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 3 insertions(+), 3 de
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PALETTE register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c| 29 ---
.../gpu/drm/i915/display/intel_color_regs.h | 2 +-
2 files changed, 20 insertions
== Series Details ==
Series: Panel replay selective update support (rev9)
URL : https://patchwork.freedesktop.org/series/128193/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14672 -> Patchwork_128193v9
Summary
---
*
== Series Details ==
Series: Panel replay selective update support (rev9)
URL : https://patchwork.freedesktop.org/series/128193/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
== Series Details ==
Series: Panel replay selective update support (rev9)
URL : https://patchwork.freedesktop.org/series/128193/
State : warning
== Summary ==
Error: dim checkpatch failed
9bb430152399 drm/i915/psr: Rename has_psr2 as has_sel_update
-:31: CHECK:PARENTHESIS_ALIGNMENT: Alignment
Tested-by: Krzysztof Gibala
-Original Message-
From: Andi Shyti
Sent: Friday, April 26, 2024 2:07 AM
To: intel-gfx ; dri-devel
Cc: Andi Shyti ; Andi Shyti
; Gnattu OC ; Chris Wilson
; Joonas Lahtinen
; Roper, Matthew D
; sta...@vger.kernel.org
Subject: [PATCH] drm/i915/gt: Automat
On Thu, 2024-04-25 at 20:42 +0200, Janusz Krzysztofik wrote:
> Hi Thomas,
>
> On Tuesday, 16 April 2024 18:40:12 CEST Rodrigo Vivi wrote:
> > On Tue, Apr 16, 2024 at 10:09:46AM +0200, Janusz Krzysztofik wrote:
> > > Hi Rodrigo,
> > >
> > > On Tuesday, 16 April 2024 03:16:31 CEST Rodrigo Vivi wrot
On Thu, Apr 25, 2024 at 12:56:57PM -0700, Vinay Belgaumkar wrote:
> Pcode can dynamically update RPe frequency. Use the latest value
> in tests that check it.
>
> Signed-off-by: Vinay Belgaumkar
Reviewed-by: Rodrigo Vivi
> ---
> tests/intel/xe_gt_freq.c | 7 +++
> 1 file changed, 7 insert
On Fri, Apr 26, 2024 at 04:09:45PM +0300, Jani Nikula wrote:
> On Fri, 26 Apr 2024, Jani Nikula wrote:
> > Hey all, it's time to stop using the implicit dev_priv local variable in
> > register macros. Yes, this is huge. It's also (almost) completely
> > scripted.
>
> Okay, I was first going to se
On Fri, Apr 26, 2024 at 05:02:54PM +0100, Tvrtko Ursulin wrote:
>
>
> On 26/04/2024 16:47, Lucas De Marchi wrote:
> > On Wed, Apr 24, 2024 at 01:41:59PM GMT, Ryszard Knop wrote:
> > > The drm-intel repo is moving from the classic fd.o git host to GitLab.
> > > Update its location with a URL match
On Fri, Apr 26, 2024 at 02:07:23AM +0200, Andi Shyti wrote:
> We missed setting the CCS mode during resume and engine resets.
> Create a workaround to be added in the engine's workaround list.
> This workaround sets the XEHP_CCS_MODE value at every reset.
>
> The issue can be reproduced by running
There are some workarounds that are not applicable for panel replay. Do not
apply these if panel replay is used.
Bspec: 66624, 50422
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_fbc.c | 5 +++--
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 ++-
drivers/gpu/drm/i915/d
Add panel replay selective update support to debugfs status interface. In
case of sink supporting panel replay we will print out:
Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes
and PSR mode will look like this if printing out enabled panel replay
selective update:
Part of intel_psr2_config_valid is valid for panel replay. rename it as
intel_sel_update_config_valid. Split psr2 specific part and name it as
intel_psr2_config_valid.
v3:
- move early transport check to psr2 specific check
- check intel_psr2_config_valid only for non-Panel Replay case
v2:
-
We are re-using PSR module parameters for panel replay. Update module
parameter descriptions with panel replay information:
enable_psr:
-1 (default) == follow what is in VBT
0 == disable PSR/PR
1 == Allow PSR1 and PR full frame update
2 == allow PSR1/PSR2 and PR Selective Update
enable_psr2_sel_
DP Panel replay uses SRD_STATUS to track it's status despite selective
update mode.
Bspec: 53370, 68920
v3:
- do not use PSR2_STATUS for PSR1
v2:
- use intel_dp_is_edp to differentiate
- modify debugfs status as well
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_ps
Add new boolean to store panel replay selective update support of sink into
intel_psr struct. Detect panel replay selective update support and store
it into this new boolean.
v3: Clear sink_panel_replay_su_support in intel_dp_detect
v2: Merge adding new boolean into this patch
Signed-off-by: Jou
We are about to enable Panel Replay Selective update mode. Vsc revision 0x6
for Panel Replay no matter if it is selective update or full frame update
mode. Take this into account when preparing VSC SDP package.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_dp.c | 16 ++
Add definitions for panel replay selective update
v2: Remove unnecessary Cc from commit message
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
include/drm/display/drm_dp.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display
Currently intel_dp_get_su_granularity doesn't support panel replay.
This fix modifies it to support panel replay as well.
v3: use correct offset for DP_PANEL_PANEL_REPLAY_CAPABILITY
v2: rely on PSR definitions on common bits
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_p
We are about to reuse psr2_enabled for panel replay as well. Rename
it as sel_update_enabled to avoid confusion.
v3: Rebase
v2: Rebase
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
.../drm/i915/display/intel_display_types.h| 2 +-
drivers/gpu/drm/i915/display/intel_psr.c
We are going to reuse has_psr2 for panel_replay as well. Rename it
as has_sel_update to avoid confusion.
v2: Rebase
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +-
drivers/gpu/drm/i915/display/intel_display.c
This patch set is implementing panel replay selective update support
for Intel hardware.
v8:
- use correct offset for DP_PANEL_PANEL_REPLAY_CAPABILITY
v7:
- use always vsc revision 0x6 for Panel Replay
v6:
- fixes split to separate patch set
v5:
- do not use PSR2_STATUS for PSR1
v4:
- do
On Mon, 2024-04-29 at 11:45 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Manna, Animesh
> > Sent: Monday, April 29, 2024 5:04 PM
> > To: Hogander, Jouni ; intel-
> > g...@lists.freedesktop.org
> > Subject: RE: [PATCH v7 06/11] drm/i915/psr: Modify
> > intel_dp_get_su_
> -Original Message-
> From: Manna, Animesh
> Sent: Monday, April 29, 2024 5:04 PM
> To: Hogander, Jouni ; intel-
> g...@lists.freedesktop.org
> Subject: RE: [PATCH v7 06/11] drm/i915/psr: Modify
> intel_dp_get_su_granularity to support panel replay
>
>
>
> > -Original Message-
> -Original Message-
> From: Hogander, Jouni
> Sent: Monday, April 29, 2024 4:46 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [PATCH v7 06/11] drm/i915/psr: Modify
> intel_dp_get_su_granularity to support panel replay
>
> On Mon, 2024-04-29 at 11:02 +
On Mon, 2024-04-29 at 11:02 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Friday, April 19, 2024 5:42 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh ; Hogander, Jouni
> >
> > Subject: [PATCH v7 06/11] drm/i915/psr: Modify
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, April 19, 2024 5:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v7 06/11] drm/i915/psr: Modify intel_dp_get_su_granularity
> to support panel replay
>
> Currently intel_
On Fri, 26 Apr 2024, Ville Syrjälä wrote:
> On Fri, Apr 26, 2024 at 01:51:36PM +0300, Jani Nikula wrote:
>> Clean up i915_reg.h.
>>
>> v2: Drop chicken regs and comments (Ville)
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed the lot to din.
BR,
Jani.
--
Jan
Hi Angus,
...
> @@ -1586,6 +1586,8 @@ xelpmp_gt_workarounds_init(struct intel_gt *gt, struct
> i915_wa_list *wal)
>*/
> wa_write_or(wal, XELPMP_GSC_MOD_CTRL, FORCE_MISS_FTLB);
>
> + wa_write_or(wal, XELPMP_VDBX_MOD_CTRL, FORCE_MISS_FTLB);
Can you please add the reference of
Hi Andrzej,
On Friday, 26 April 2024 18:13:02 CEST Nirmoy Das wrote:
>
> On 4/23/2024 6:23 PM, Janusz Krzysztofik wrote:
> > From: Chris Wilson
> >
> > The breadcrumbs use a GT wakeref for guarding the interrupt, but are
> > disarmed during release of the engine wakeref. This leaves a hole where
66 matches
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