On 6/3/2024 11:18 AM, Mitul Golani wrote:
Add register definitions for Transcoder Fixed Average
Vtotal mode/CMRR function, with the necessary bitfields.
Compute these registers when CMRR is enabled, extending
Adaptive refresh rate capabilities.
--v2:
- Use intel_de_read64_2x32 in intel_vrr_get
On 6/3/2024 11:18 AM, Mitul Golani wrote:
Move VRR related register definitions to a separate file called
intel_vrr_regs.h.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_vrr.c | 1 +
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 113 ++
driver
Hi Janusz,
On Mon, Jun 03, 2024 at 09:54:45PM +0200, Janusz Krzysztofik wrote:
> CI has been sporadically reporting the following issue triggered by
> igt@i915_selftest@live@hangcheck on ADL-P and similar machines:
>
> <6> [414.049203] i915: Running
> intel_hangcheck_live_selftests/igt_reset_evi
Hi Krzysztof,
On Mon, Jun 03, 2024 at 06:20:22PM +0200, Niemiec, Krzysztof wrote:
> The test is trying to push the heartbeat frequency to the limit, which
> might sometimes fail. Such a failure does not provide valuable
> information, because it does not indicate that there is something
> necessar
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes
URL : https://patchwork.freedesktop.org/series/134383/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14870_full -> Patchwork_134383v1_full
S
== Series Details ==
Series: drm/i915: Support FP16 compressed formats on MTL (rev6)
URL : https://patchwork.freedesktop.org/series/124957/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14870_full -> Patchwork_124957v6_full
== Series Details ==
Series: drm/i915/gt: Fix potential UAF by revoke of fence registers
URL : https://patchwork.freedesktop.org/series/134411/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14870 -> Patchwork_134411v1
Summa
== Series Details ==
Series: drm/i915/gt: Fix potential UAF by revoke of fence registers
URL : https://patchwork.freedesktop.org/series/134411/
State : warning
== Summary ==
Error: dim checkpatch failed
cae31b6d758a drm/i915/gt: Fix potential UAF by revoke of fence registers
-:9: WARNING:COMMI
CI has been sporadically reporting the following issue triggered by
igt@i915_selftest@live@hangcheck on ADL-P and similar machines:
<6> [414.049203] i915: Running
intel_hangcheck_live_selftests/igt_reset_evict_fence
...
<6> [414.068804] i915 :00:02.0: [drm] GT0: GUC: submission enabled
<6> [4
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 861a3cb5a2a8480d361fa6708da24747d6fa72fe Add linux-next specific
files for 20240603
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202406031357.4t4jtalq-...@intel.com
https
== Series Details ==
Series: drm/i915/gt: Delete the live_hearbeat_fast selftest
URL : https://patchwork.freedesktop.org/series/134389/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14870 -> Patchwork_134389v1
Summary
-
The test is trying to push the heartbeat frequency to the limit, which
might sometimes fail. Such a failure does not provide valuable
information, because it does not indicate that there is something
necessarily wrong with either the driver or the hardware.
Remove the test to prevent random, unnec
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes
URL : https://patchwork.freedesktop.org/series/134383/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14870 -> Patchwork_134383v1
Summary
---
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes
URL : https://patchwork.freedesktop.org/series/134383/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/a
== Series Details ==
Series: Panel Replay eDP support (rev6)
URL : https://patchwork.freedesktop.org/series/133684/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14870 -> Patchwork_133684v6
Summary
---
**SUCCESS**
== Series Details ==
Series: Panel Replay eDP support (rev6)
URL : https://patchwork.freedesktop.org/series/133684/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: war
As per Bspec:68925: Push enable must be set if not configuring for a
fixed refresh rate (i.e Vmin == Flipline == Vmax is not true).
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_vrr.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/
Currently VRR timing generator is used only when VRR is enabled by
userspace. From XE2LPD, gradually move away from older timing
generator and use VRR timing generator if panel supports VRR but
VRR is not enabled by the userspace.
In such a case, Flipline VMin and VMax all are set to the Vtotal of
While running with fixed refresh rate and VRR timing generator set FAVT
mode (Fixed Vtotal) in DP Adaptive Sync SDP to intimate the panel
about Fixed refresh rate.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-
Add fixed_rr member to struct vrr to represent the case where a
fixed refresh rate with VRR timing generator is required.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
drivers/gpu/drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915
Currently we support Adaptive sync operation mode with dynamic frame
rate, but instead the operation mode with fixed rate is set.
This was initially set correctly in the earlier version of changes but
later got changed, while defining a macro for the same.
Fixes: a5bd5991cb8a ("drm/i915/display: C
Even though the VRR timing generator (TG) is primarily used for
variable refresh rates, it can be used for fixed refresh rates as
well. For a fixed refresh rate the Flip Line and Vmax must be equal
(TRANS_VRR_FLIPLINE = TRANS_VRR_VMAX). Beyond that, there are some
dependencies between the VRR timin
Take into account in Panel Replay compute config that HW will not allow PR
on eDP when HDCP enabled.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/in
This reverts commit f3c2031db7dfdf470a2d9bf3bd1efa6edfa72d8d.
We want to notice possible issues faced with PSR2 Region Early Transport as
early as possible -> let's revert patch disabling Region Early Transport by
default. Also eDP 1.5 Panel Replay requires Early Transport.
Signed-off-by: Jouni H
We have now intel_alpm_aux_wake_supported. Use that instead of local
variable.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/dr
There are couple of bits in PSR2_CTL which needs to be written in case of
eDP Panel Replay
Bspec: 68920
v2: use boolean instead of assuming eDP Panel Replay mean Early Transport
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 +
1 file changed, 13 in
Currently there is no way to disable Panel Replay without disabling
PSR. Add new debug bit to be used with i915_edp_psr_debug debugfs
interface.
v2: ensure that fastset is performed when the bit changes
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
We are about to add more checks for Panel Replay. Due to that it makes
sense to add now Panel Replay compute config helper.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i
Move Early Transport validity check to be performed for Panel Replay as
well and use Early Transport for eDP Panel Replay always.
v2:set crtc_state->enable_psr2_su_region_et directly (not in if block)
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
1 file
eDP1.5 support ALPM with Panel Replay as well. We need to check ALPM
related things for Panel Replay as well.
Bspec: 68920
v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count
check
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 29
We want to use intel_alpm_aux_wake_supported and
intel_alpm_aux_less_wake_supported in intel_psr.c. Convert them as
non-static.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 4 ++--
drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++
2 files changed, 4 insertions(+)
Take into account that 128b/132b Panel Replay is not supported on eDP.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/driver
Currently intel_dp_vsc_sdp_unpack is not taking into account Panel Replay
vsc sdp. Fix this by adding vsc sdp revision 0x6 and length 0x10 into
intel_dp_vsc_sdp_unpack
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion
Display version >= 20 support eDP 1.5. Inform Panel Replay source support
on eDP for display version >= 20.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/disp
Our HW doesn't support panel replay without Early Transport on eDP.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/
Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check
panel support for this and prevent eDP panel replay if it doesn't exits.
Bspec: 68920
v2: use intel_alpm_aux_less_wake_supported
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 +++
1 fil
eDP1.5 allows Panel Replay on eDP as well. Take this into account when
enabling sink PSR/Panel Replay. Write also PANEL_REPLAY_CONFIG2 register
accordingly.
v2: do not configure ALPM for DP2.0 Panel Replay
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 67 +
Currently AUX Less Wake lines are not written into ALPM_CTL. Fix this.
Fixes: 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel
replay")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
This patch set is implementing eDP1.5 Panel Replay for Intel hw. Also
Region Early Transport information is added into debugfs interface
and patch to disable Region Early Transport by default is reverted as
it is needed by eDP Panel Replay.
v5:
- use psr->su_region_et_enabled instead of psr2_su_
Early Transport is possible and in our HW mandatory on eDP Panel
Replay. Add parameter to intel_psr2_config_et_valid to differentiate
validity check for Panel Replay.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 15 ---
1 file changed, 8 insertions(+),
Panel Replay is not enabled if there are no active planes. Do not compare
it on pipe comparison. Otherwise we get pipe mismatch.
Fixes: ac9ef327327b ("drm/i915/psr: Panel replay has to be enabled before link
training")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display
We want to have own variables for fast wake lines and aux less wake
time. It might be needed to choose if we can enable Panel Replay Selective
Update or PSR2.
Also currently aux less wake time is overwritten by calculated fast wake
time.
Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake
On 6/3/2024 11:19 AM, Mitul Golani wrote:
Compute params for Adaptive Sync SDP when Fixed Average Vtotal
mode is enabled.
--v2:
Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit).
--v3:
- Since vrr.enable is set in case of cmrr also, handle
accordingly(Ankit).
- check cmr
== Series Details ==
Series: Ultrajoiner basic functionality series (rev2)
URL : https://patchwork.freedesktop.org/series/133800/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14870 -> Patchwork_133800v2
Summary
---
== Series Details ==
Series: Ultrajoiner basic functionality series (rev2)
URL : https://patchwork.freedesktop.org/series/133800/
State : warning
== Summary ==
Error: dim checkpatch failed
e7e2b28e489e drm/i915: Rename all bigjoiner to joiner
-:200: CHECK:PARENTHESIS_ALIGNMENT: Alignment shoul
In most of the cases we now try to avoid mentioning things like
"bigjoiner" or "ultrajoiner" trying to unify the API and refer
mostly to all this functionality as "joiner".
In majority cases that should be way to go.
However in some cases we still need to distinguish between
bigjoiner primaries and
According to BSpec we now should call "master" pipes, "primary" pipes
and "slave" pipes, should be "secondary" pipes.
Signed-off-by: Stanislav Lisovskiy
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 20 +-
.../drm/i915/display/intel_crtc_state_dump.c | 4 +-
drivers/gpu/drm/i915/displa
Lets unify both bigjoiner and ultrajoiner under simple "joiner" name,
because in future we might have multiple configurations, involving
multiple bigjoiners, ultrajoiner, however it is possible to use
same api for handling both.
Signed-off-by: Stanislav Lisovskiy
---
.../gpu/drm/i915/display/int
This series contains renaming of bigjoiner to joiner to further
unify the api, in order to be prepared for ultrajoiner addition,
to aviod additional complexity in naming.
Also here we rename all masters/slaves to primary/secondary pipes
according to BSpec.
Then however we still add some functions,
== Series Details ==
Series: drm/i915: Support FP16 compressed formats on MTL (rev6)
URL : https://patchwork.freedesktop.org/series/124957/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14870 -> Patchwork_124957v6
Summary
-
== Series Details ==
Series: drm/i915: Support FP16 compressed formats on MTL (rev6)
URL : https://patchwork.freedesktop.org/series/124957/
State : warning
== Summary ==
Error: dim checkpatch failed
a9e82a579bbd drm/i915: Support RGB16161616_64B compressed formats
-:55: WARNING:SUSPECT_CODE_IN
On Mon, 2024-06-03 at 07:30 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Wednesday, May 29, 2024 3:09 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh ; Kahola, Mika
> > ; Hogander, Jouni
> > Subject: [PATCH 0/6] Region Ear
== Series Details ==
Series: Implement CMRR Support (rev11)
URL : https://patchwork.freedesktop.org/series/126443/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14868_full -> Patchwork_126443v11_full
Summary
---
**FA
> -Original Message-
> From: Roper, Matthew D
> Sent: Saturday, December 2, 2023 5:38 AM
> To: Lobo, Melanie
> Cc: intel-gfx@lists.freedesktop.org; Heikkila, Juha-pekka pekka.heikk...@intel.com>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on
> MTL
>
>
Add support for a RGB64(FP16) format where each color component is a
16-bit floating point value. FP16 format which is a binary
floating-point computer number format that occupies 16 bits in computer
memory. Platform shall render compression in display engine to receive
FP16 compressed formats.
Th
> -Original Message-
> From: Hogander, Jouni
> Sent: Wednesday, May 29, 2024 3:09 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Kahola, Mika
> ; Hogander, Jouni
> Subject: [PATCH 0/6] Region Early Transport debugfs support
>
> This is a subset of "Panel Replay eDP" an
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