To reach PC10 when PKG_C_LATENCY is configure we must do the following
things
1) Enter PSR1 only when delayed_vblank < 6 lines and DC5 can be entered
2) Allow PSR2 deep sleep when DC5 can be entered
3) DC5 can be entered when all transocoder have either PSR1, PSR2 or
eDP 1.5 PR ALPM enabled and VBI
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, August 13, 2024 1:22 PM
> To: Garg, Nemesa ; intel-gfx@lists.freedesktop.org;
> Ville Syrjala
> Cc: Garg, Nemesa
> Subject: Re: [PATCH 2/2] drm/i915/display: Call panel_fitting from pipe_config
>
> On Thu, 08 Aug 2024, Nemesa
On 9/6/2024 8:22 PM, Ville Syrjälä wrote:
On Fri, Sep 06, 2024 at 06:27:56PM +0530, Ankit Nautiyal wrote:
In preparation of ultrajoiner, use number of joined pipes in the
intel_mode_valid_max_plane_size helper, instead of joiner flag.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
On 9/6/2024 8:24 PM, Ville Syrjälä wrote:
On Fri, Sep 06, 2024 at 05:46:11PM +0300, Ville Syrjälä wrote:
On Fri, Sep 06, 2024 at 06:27:54PM +0530, Ankit Nautiyal wrote:
At the moment, the debugfs for joiner allows only to force enable/disable
pipe joiner for 2 pipes. Modify it to force join '
Hi Ville,
Thanks for the comments and suggestions. Will remove the extra things
that are not required.
Please my response inline:
On 9/6/2024 8:16 PM, Ville Syrjälä wrote:
On Fri, Sep 06, 2024 at 06:27:54PM +0530, Ankit Nautiyal wrote:
At the moment, the debugfs for joiner allows only to fo
== Series Details ==
Series: drm/i915/psr: Implment WA to help reach PC10 (rev4)
URL : https://patchwork.freedesktop.org/series/138065/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M] drivers/gpu/drm/i9
> -Original Message-
> From: Murthy, Arun R
> Sent: Thursday, August 29, 2024 2:34 PM
> To: Garg, Nemesa ; intel-gfx@lists.freedesktop.org;
> dri-de...@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: RE: [v4 2/5] drm/i915/display: Compute the scaler filter coefficients
>
> > -
== Series Details ==
Series: DP2.1 Panel Replay Fixes (rev2)
URL : https://patchwork.freedesktop.org/series/138198/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15370 -> Patchwork_138198v2
Summary
---
**SUCCESS**
== Series Details ==
Series: drm: Ensure Proper Unload/Reload Order of MEI Modules for i915/Xe Driver
URL : https://patchwork.freedesktop.org/series/138379/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15378 -> Patchwork_138379v1
==
To reach PC10 when PKG_C_LATENCY is configure we must do the following
things
1) Enter PSR1 only when delayed_vblank < 6 lines and DC5 can be entered
2) Allow PSR2 deep sleep when DC5 can be entered
3) DC5 can be entered when all transocoder have either PSR1, PSR2 or
eDP 1.5 PR ALPM enabled and VBI
== Series Details ==
Series: drm: Ensure Proper Unload/Reload Order of MEI Modules for i915/Xe Driver
URL : https://patchwork.freedesktop.org/series/138379/
State : warning
== Summary ==
Error: dim checkpatch failed
01263a09e993 drm: Ensure Proper Unload/Reload Order of MEI Modules for i915/Xe
This update addresses the unload/reload sequence of MEI modules in relation to
the i915/Xe graphics driver. On platforms where the MEI hardware is integrated
with the graphics device (e.g., DG2/BMG), the i915/xe driver is depend on the
MEI
modules. Conversely, on newer platforms like MTL and LNL,
== Series Details ==
Series: Increase fastwake sync pulse count as a quirk (rev3)
URL : https://patchwork.freedesktop.org/series/137524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15338_full -> Patchwork_137524v3_full
Su
On 9/8/24 12:07 AM, Lucas De Marchi wrote:
> On Sat, Sep 07, 2024 at 08:38:30PM GMT, Asahi Lina wrote:
>>
>>
>> On 9/6/24 6:42 PM, Raag Jadav wrote:
>>> Introduce device wedged event, which will notify userspace of wedged
>>> (hanged/unusable) state of the DRM device through a uevent. This is
>>
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