://anongit.freedesktop.org/drm/drm-firmware BXT_HUC
for you to fetch changes up to 69f153bbc2c44eb581c1f8c7cecd4d878e4e727a:
firmware/huc/bxt: Add huC Update for BXT (2018-11-28 10:33:57 -0800)
Anusha Srivatsa (1):
firmware
From: Michal Wajdeczko
This will let the driver decide where GuC can be used
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c| 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git
up to 69f153bbc2c44eb581c1f8c7cecd4d878e4e727a:
firmware/huc/bxt: Add huC Update for BXT (2018-11-28 10:33:57 -0800)
Anusha Srivatsa (1):
firmware/huc/bxt: Add huC Update for BXT
WHENCE| 3 +++
i915
From: Anusha Srivatsa
We have an update for HuC for BXT.
Load the latest version.
v2: Change the subject.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Tuesday, November 20, 2018 12:25 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Chris Wilson ; Jani Nikula
>; Ville Syrjala ;
>Navare, Manasi D ; Srivatsa, Anusha
>
>Subject: [
From: Anusha Srivatsa
Fix indentation error in the commit:
commit 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
Reported-by: Dan Carpenter
Cc: Rodrigo Vivi
Signed-off-by: Anusha Sr
up to 69f153bbc2c44eb581c1f8c7cecd4d878e4e727a:
firmware/huc/bxt: Add huC Update for BXT (2018-11-28 10:33:57 -0800)
Anusha Srivatsa (1):
firmware/huc/bxt: Add huC Update for BXT
WHENCE| 3 +++
i915
From: Anusha Srivatsa
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 7e56c516c815..c681537bcb92 100644
--- a/drivers/gpu/drm
From: Anusha Srivatsa
We have an update for HuC for BXT.
Load the latest version.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu
From: Anusha Srivatsa
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 7e56c516c815..c681537bcb92 100644
--- a/drivers/gpu/drm
From: Anusha Srivatsa
Load Huc for GLK.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu/drm/i915/intel_huc_fw.c
index 1fa10e327a2d
for you to fetch changes up to 908244c9c196116069fc6ba43573192ad08ea3af:
firmware/guc/GLK: Add GuC Support for GLK (2018-11-28 10:40:38 -0800)
Anusha Srivatsa (5):
firmware/huc/bxt: Add huC Update for BXT
firmware/huc
From: Anusha Srivatsa
We have an update for HuC for BXT.
Load the latest version.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu
From: Anusha Srivatsa
We have an update of huC for SKL.
Load the latest verion.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu
From: Anusha Srivatsa
We have an update of HuC for KBL.
Load the latest version.
cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers
From: John Spotswood
load the v11.98 guC on geminilake.
v2: rebased.
v3: Change subject prefix. (Anusha)
Cc: Tomi Sarvela
Cc: Jani Saarinen
Signed-off-by: Anusha Srivatsa
Signed-off-by: John Spotswood
---
drivers/gpu/drm/i915/intel_guc_fw.c | 10 ++
1 file changed, 10 insertions
From: John Spotswood
load the v11.98 guC on geminilake.
v2: rebased.
v3: Change subject prefix. (Anusha)
Cc: Tomi Sarvela
Cc: Jani Saarinen
Signed-off-by: Anusha Srivatsa
Signed-off-by: John Spotswood
---
drivers/gpu/drm/i915/intel_guc_fw.c | 10 ++
1 file changed, 10 insertions
From: Anusha Srivatsa
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 7e56c516c815..fa65edeb0202 100644
--- a/drivers/gpu/drm
From: Anusha Srivatsa
We have an update of HuC for KBL.
Load the latest version.
cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers
From: Anusha Srivatsa
Load Huc for GLK.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu/drm/i915/intel_huc_fw.c
index 1fa10e327a2d
From: Anusha Srivatsa
We have an update of huC for SKL.
Load the latest verion.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu
From: Anusha Srivatsa
We have an update for HuC for BXT.
Load the latest version.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu
to fetch changes up to 908244c9c196116069fc6ba43573192ad08ea3af:
firmware/guc/GLK: Add GuC Support for GLK (2018-11-28 10:40:38 -0800)
Anusha Srivatsa (5):
firmware/huc/BXT: Update the HuC version
firmware/huc/SKL: Update HuC versiom for SKL
firmware/huc/KBL: Update HuC for KBL
firmware
s to fill the PPS SDP header and PPS SDP payload
>according
>to the DSC 1.2 specification.
>
>v7:
>* Use BUILD_BUG_ON() to protect changing struct size (Ville)
>* Remove typecaseting (Ville)
>* Include byteorder.h in drm_dsc.c (Ville)
>* Correct kernel doc spacing (
ds a helper to return an array of color depth
>capabilities.
>
>v2:
>* Simplify the logic (Ville)
>
>Signed-off-by: Manasi Navare
>Cc: Ville Syrjala
Implementation looks good. It is used properly in the atomic check patch too...
Reviewed-by: Anusha Srivatsa
>---
>
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, November 6, 2018 6:40 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Ville
>Syrjala
>; Jani Nikula
>Subject: Re: [v7 1/4] i915/dp/fec: Add fec_
enabling FEC.
v2:
- Change commit message. Configure fec state after
link training (Manasi, Gaurav)
- Remove redundent checks (Manasi)
- Remove the registers that get added automagically (Anusha)
v3: s/intel_dp_set_fec_state()/intel_dp_enable_fec_state() (Gaurav)
v4: rebased.
v5:
- Move the code
)
v6: Resolve warnings. Add crtc_state as an argument to
intel_disable_ddi_buf(). (Manasi)
Cc: dri-de...@lists.freedesktop.org
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_ddi.c
and sink capability. (Ville, manasi)
Rebased on top of: https://patchwork.freedesktop.org/series/51986/
Anusha Srivatsa (4):
i915/dp/fec: Add fec_enable to the crtc state.
drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
i915/dp/fec: Configure the Forward Error Correction bits.
drm/i915/fec
, before setting FEC_READY
bit. (Anusha)
v5: Move to intel_ddi.c
- Make the function static (Anusha)
v6: Dont pass state as a separate argument (Ville)
Cc: dri-de...@lists.freedesktop.org
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
)
- Move intel_dp_supports_fec() closer to
intel_dp_supports_dsc() (Anusha)
v5: Move fec check to intel_dp_supports_dsc(Ville)
v6: Remove warning. rebase.
v7: change crtc state to include DP sink and fec capability
of source.(Manasi)
Suggested-by: Ville Syrjala
Cc: dri-de...@lists.freedesktop.org
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, November 6, 2018 2:42 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Singh,
>Gaurav K ; Jani Nikula ;
>Ville Syrjala
>Subject: Re: [v6 3/4] i915/dp/fe
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Tuesday, November 6, 2018 6:43 AM
>To: Navare, Manasi D
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Jani
>Nikula
>; Srivatsa, Anusha ;
>Singh
>-Original Message-
>From: Navare, Manasi D
>Sent: Friday, November 2, 2018 2:31 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
>Cc: Navare, Manasi D ; Jani Nikula
>; Ville Syrjala ;
>Srivatsa, Anusha ; Harry Wentland
>
>Subject: [P
)
v6: Resolve warnings. Add crtc_state as an argument to
intel_disable_ddi_buf(). (Manasi)
Cc: dri-de...@lists.freedesktop.org
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 29
, before setting FEC_READY
bit. (Anusha)
v5: Move to intel_ddi.c
- Make the function static (Anusha)
Cc: dri-de...@lists.freedesktop.org
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 15
enabling FEC.
v2:
- Change commit message. Configure fec state after
link training (Manasi, Gaurav)
- Remove redundent checks (Manasi)
- Remove the registers that get added automagically (Anusha)
v3: s/intel_dp_set_fec_state()/intel_dp_enable_fec_state() (Gaurav)
v4: rebased.
v5:
- Move the code
/intel_dp_can_fec/intel_dp_supports_fec;
Add intel_dp_source supports_fec() (Ville)
v5: Reduce unwanted checks. Pass intel_encoder to fec func
instead of intel_dp. Move code around to suitable place.
v6: Remove warning. rebase.
Rebased on top of: https://patchwork.freedesktop.org/series/51986/
Anusha
)
- Move intel_dp_supports_fec() closer to
intel_dp_supports_dsc() (Anusha)
Suggested-by: Ville Syrjala
Cc: dri-de...@lists.freedesktop.org
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_dp.c | 28
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Friday, November 2, 2018 4:16 AM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
>;
>Jani Nikula ; Navare, Manasi D
>
>Subject: Re: [v4
, before setting FEC_READY
bit. (Anusha)
v5: Move to intel_ddi.c
- Make the function static (Anusha)
Cc: dri-de...@lists.freedesktop.org
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 15
...@lists.freedesktop.org
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_dp.c | 26 +-
drivers/gpu/drm/i915/intel_drv.h | 3 +++
2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
)
Cc: dri-de...@lists.freedesktop.org
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers
-by: Jani Nikula
Cc: dri-de...@lists.freedesktop.org
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_dp.c | 12
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 13 insertions
changes (Gaurav)
- Use drm_dp_dpcd_readb instead of drm_dp_dpcd_read. (Jani)
v4:
- Avoid aux reads everytime, instead read cached
values of dpcd register (jani)
- Move helper to drm_dp_helper.h like other dsc
helpers.(Anusha)
v5: rebased. Change the helper parameter suitably.
Cc: dri-de
enabling FEC.
v2:
- Change commit message. Configure fec state after
link training (Manasi, Gaurav)
- Remove redundent checks (Manasi)
- Remove the registers that get added automagically (Anusha)
v3: s/intel_dp_set_fec_state()/intel_dp_enable_fec_state() (Gaurav)
v4: rebased.
v5:
- Move the code
/
Anusha Srivatsa (7):
i915/dp/fec: Cache the FEC_CAPABLE DPCD register
drm/dp/fec: DRM helper for Forward Error Correction
i915/dp/fec: Check for FEC Support
i915/dp/fec: Add can_fec to the crtc state.
drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
i915/dp/fec: Configure the Forward
-by: Jani Nikula
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_dp.c | 12
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915
changes (Gaurav)
- Use drm_dp_dpcd_readb instead of drm_dp_dpcd_read. (Jani)
v4:
- Avoid aux reads everytime, instead read cached
values of dpcd register (jani)
- Move helper to drm_dp_helper.h like other dsc
helpers.(Anusha)
v5: rebased. Change the helper parameter suitably.
Cc: Ville Syrjala
Cc
changes (Gaurav)
- Use drm_dp_dpcd_readb instead of drm_dp_dpcd_read. (Jani)
v4:
- Avoid aux reads everytime, instead read cached
values of dpcd register (jani)
- Move helper to drm_dp_helper.h like other dsc
helpers.(Anusha)
v5: rebased. Change the helper parameter suitably.
Cc: Ville Syrjala
Cc
-by: Jani Nikula
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_dp.c | 13 +
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915
>-Original Message-
>From: Navare, Manasi D
>Sent: Thursday, November 1, 2018 3:31 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Jani Nikula ;
>Ville Syrjala
>Subject: Re: [v4 1/7] i915/dp/fec: Cache the FEC_CAPABLE DPCD register
>
>On Tue,
>-Original Message-
>From: Srivatsa, Anusha
>Sent: Tuesday, October 30, 2018 5:45 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Srivatsa, Anusha ; Singh, Gaurav K
>; Jani Nikula ; Ville
>Syrjala ; Navare, Manasi D
>
>Subject: [v4 5/7] drm/i915/fec: Set FEC
S_CTL Registers")
Suggested-by: Manasi Navare
Cc: Jani Nikula
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_reg.h | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i
Cc: Jani Nikula
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_reg.h | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aef1a30ff9f6..c0e6e14fe9fa
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset
from the base - which is the FLexi IO Adaptor. Lets follow the
offset calculation while accessing these registers.
v2:
- Follow spec for numbering - s/0/1(Lucas)
- s/FIA_1/FIA1_BASE (Anusha)
v3:
- Remove register offset defines
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Wednesday, October 31, 2018 2:01 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
>;
>Jani Nikula ; Navare, Manasi D
>; Pandiyan, Dhinakaran
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Wednesday, October 31, 2018 2:08 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
>;
>Jani Nikula ; Navare, Manasi D
>
>Subject: Re: [v4
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset
from the base - which is the FLexi IO Adaptor. Lets follow the
offset calculation while accessing these registers.
v2:
- Follow spec for numbering - s/0/1(Lucas)
- s/FIA_1/FIA1_BASE (Anusha)
v3:
- Remove register offset defines
Fixes: 3e68928b7d4c ("drm/i915/icl: Enable DC9 as lowest possible state during
screen-off")
Cc: Imre Deak
Cc: Rodrigo Vivi
Cc: Animesh Manna
Cc: James Ausmus
Cc: Daniele Ceraolo Spurio
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
1 file changed, 1
>-Original Message-
>From: Sripada, Radhakrishna
>Sent: Tuesday, October 30, 2018 1:45 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Oscar Mateo ; Mika Kuoppala
>; Srivatsa, Anusha
>; Sripada, Radhakrishna
>
>Subject: [PATCH v3 3/4] drm/i915/icl: WaAllowU
>-Original Message-
>From: Sripada, Radhakrishna
>Sent: Tuesday, October 30, 2018 1:45 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Oscar Mateo ; Srivatsa, Anusha
>; Mika Kuoppala ;
>Sripada, Radhakrishna
>Subject: [PATCH v3 4/4] drm/i915/icl: WaAllowUMDToM
>-Original Message-
>From: Lucas De Marchi [mailto:lucas.de.mar...@gmail.com]
>Sent: Wednesday, October 31, 2018 10:23 AM
>To: Srivatsa, Anusha
>Cc: Jani Nikula ;
>intel-gfx@lists.freedesktop.org; De
>Marchi, Lucas
>Subject: Re: [Intel-gfx] [PATCH] drm/i915/f
>-Original Message-
>From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>Sent: Wednesday, October 31, 2018 2:29 AM
>To: Lucas De Marchi
>Cc: Srivatsa, Anusha ; intel-
>g...@lists.freedesktop.org; De Marchi, Lucas
>Subject: Re: [Intel-gfx] [PATCH] drm/i915/fia:
changes (Gaurav)
- Use drm_dp_dpcd_readb instead of drm_dp_dpcd_read. (Jani)
v4:
- Avoid aux reads everytime, instead read cached
values of dpcd register (jani)
- Move helper to drm_dp_helper.h like other dsc
helpers.(Anusha)
v5: rebased. Change the helper parameter suitably.
Cc: Ville Syrjala
Cc
and with intel_dp_supports_fec()
(Ville)
- intel_dp_can_fec()/intel_dp_supports_fec()(manasi)
Suggested-by: Ville Syrjala
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_dp.c | 25 -
drivers/gpu/drm/i915/intel_drv.h | 3
. (manasi)
Cc: Gaurav K Singh
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Manasi Navare
Cc: Dhinakaran Pandiyan
Signed-off-by: Anusha Srivatsa
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_dp.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers
: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_dp.c | 9 +
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5a638503e36a
, before setting FEC_READY
bit. (Anusha)
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 1 +
drivers/gpu/drm/i915/intel_dp.c | 18 ++
drivers/gpu/drm/i915/intel_drv.h | 3 +++
3 files
/intel_dp_can_fec/intel_de_supports_fec;
Add intel_dp_source supports_fec() (Ville)
This is rebased on top of Manasi's End-to-end DSC
Implementation: https://patchwork.freedesktop.org/series/47514/
Anusha Srivatsa (7):
i915/dp/fec: Cache the FEC_CAPABLE DPCD register
drm/dp/fec: DRM helper for Forward Error
enabling FEC.
v2:
- Change commit message. Configure fec state after
link training (Manasi, Gaurav)
- Remove redundent checks (Manasi)
- Remove the registers that get added automagically (Anusha)
v3: s/intel_dp_set_fec_state()/intel_dp_enable_fec_state() (Gaurav)
v4: rebased.
v5:
- Move the code
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 32
drivers/gpu/drm/i915/intel_drv.h | 2 ++
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset
from the base - which is the FLexi IO Adaptor. Lets follow the
offset calculation while accessing these registers.
v2:
- Follow spec for numbering - s/0/1(Lucas)
- s/FIA_1/FIA1_BASE (Anusha)
Cc: Lucas De Marchi
Signed-off
et after DC9 for Gen11+, as the
PPS regs are Always On
- Rebase against upstream changes
v5: (Anusha Srivatsa)
- rebased against the latest upstream changes.
v6: (Anusha Srivatsa)
- rebased.Use INTEL_GEN consistently.
- Simplify the code (Rodrigo)
v7: rebased. Change order according to platform
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset
from the base - which is the FLexi IO Adaptor. Lets follow the
offset calculation while accessing these registers.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_reg.h | 15 +++
1 file
changes (Gaurav)
- Use drm_dp_dpcd_readb instead of drm_dp_dpcd_read. (Jani)
v4:
- Avoid aux reads everytime, instead read cached
values of dpcd register (jani)
- Move helper to drm_dp_helper.h like other dsc
helpers.(Anusha)
v5: rebased. Change the helper parameter suitably.
Cc: Ville Syrjala
Cc
, before setting FEC_READY
bit. (Anusha)
Cc: Gaurav K Singh
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 1 +
drivers/gpu/drm/i915/intel_dp.c | 14 ++
drivers/gpu/drm/i915/intel_drv.h | 3 +++
3 files
enabling FEC.
v2:
- Change commit message. Configure fec state after
link training (Manasi, Gaurav)
- Remove redundent checks (Manasi)
- Remove the registers that get added automagically (Anusha)
v3: s/intel_dp_set_fec_state()/intel_dp_enable_fec_state() (Gaurav)
v4: rebased.
v5:
- Move the code
Cc: Ville Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_ddi.c | 32
drivers/gpu/drm/i915/intel_drv.h | 2 ++
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915
-to-end DSC
Implementation: https://patchwork.freedesktop.org/series/47514/
Anusha Srivatsa (7):
i915/dp/fec: Cache the FEC_CAPABLE DPCD register
drm/dp/fec: DRM helper for Forward Error Correction
i915/dp/fec: Check for FEC Support
i915/dp/fec: Add can_fec to the crtc state.
drm/i915/fec
-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_dp.c | 22 ++
drivers/gpu/drm/i915/intel_drv.h | 3 +++
2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index cfcef9e4b5d9..4776ce6f2174 100644
--- a/drivers/gpu/drm
. (manasi)
Cc: Gaurav K Singh
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Manasi Navare
Cc: Dhinakaran Pandiyan
Signed-off-by: Anusha Srivatsa
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_dp.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers
Syrjala
Cc: Manasi Navare
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_dp.c | 10 ++
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5a638503e36a..16d1db7c9398
et after DC9 for Gen11+, as the
PPS regs are Always On
- Rebase against upstream changes
v5: (Anusha Srivatsa)
- rebased against the latest upstream changes.
v6: (Anusha Srivatsa)
- rebased.Use INTEL_GEN consistently.
- Simplify the code (Rodrigo)
v7: rebased. Change order according to platform
From: Navare, Manasi D
Sent: Friday, October 05, 2018 4:23 PM
To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Cc: Navare, Manasi D; Jani Nikula; Ville Syrjala; Srivatsa, Anusha
Subject: [PATCH v5 28/28] drm/i915/dsc: Force DSC enable
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, October 23, 2018 11:43 AM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH v5 17/28] drm/i915/dsc: Compute Rate Control
>paramet
Rodrigo, this patch is tested by Jyoti. Can you review it?
Anusha
>-Original Message-
>From: Srivatsa, Anusha
>Sent: Tuesday, October 23, 2018 11:32 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Manna, Animesh ; Deak, Imre
>; Vivi, Rodrigo ; Ausmus, James
>; Sriva
et after DC9 for Gen11+, as the
PPS regs are Always On
- Rebase against upstream changes
v5: (Anusha Srivatsa)
- rebased against the latest upstream changes.
v6: (Anusha Srivatsa)
- rebased.Use INTEL_GEN consistently.
- Simplify the code (Rodrigo)
v7: rebased. Change order according to platform
From: Navare, Manasi D
Sent: Friday, October 05, 2018 4:22 PM
To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Cc: Navare, Manasi D; Jani Nikula; Ville Syrjala; Srivatsa, Anusha; Singh,
Gaurav K
Subject: [PATCH v5 13/28] drm/i915/dp
ice_height;
+
+ /* slice_bpg_offset is 16 bit value with 11 fractional bits */
+ vdsc_cfg->slice_bpg_offset = DIV_ROUND_UP(((vdsc_cfg->rc_model_size -
+ vdsc_cfg->initial_offset +
+
From: Navare, Manasi D
Sent: Friday, October 05, 2018 4:22 PM
To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Cc: Singh, Gaurav K; Jani Nikula; Ville Syrjala; Srivatsa, Anusha; Navare,
Manasi D
Subject: [PATCH v5 16/28] drm/i915/dsc
1.1 and DSC 1.2
Cc: dri-de...@lists.freedesktop.org
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Gaurav K Singh
Signed-off-by: Manasi Navare
Reviewed-by: Anusha Srivatsa
---
include/drm/drm_dsc.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm/drm_dsc.h b/include/drm
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Monday, October 22, 2018 11:26 AM
>To: Srivatsa, Anusha
>Cc: Navare, Manasi D ; intel-
>g...@lists.freedesktop.org; Singh, Gaurav K ; Jani
>Nikula
>Subject: Re: [v2 5/6
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Friday, October 19, 2018 4:12 PM
>To: Navare, Manasi D
>Cc: Srivatsa, Anusha ; intel-
>g...@lists.freedesktop.org; Singh, Gaurav K ; Jani
>Nikula
>Subject: Re: [v2 5/6
ort) (8 << (4 * (tc_port)))
+#define DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) (12 << (4 * (tc_port))
Wont ML0, 1_0, 3, 3_2 suffice?
Anusha
+#define DFLEXDPMLE1_DPMLETC_ML_3_0(tc_port) (15 << (4 * (tc_port)))
/* BXT PHY Ref registers */
#define
>-Original Message-
>From: Navare, Manasi D
>Sent: Friday, October 19, 2018 1:29 PM
>To: Ville Syrjälä
>Cc: Srivatsa, Anusha ; intel-
>g...@lists.freedesktop.org; Singh, Gaurav K ; Jani
>Nikula
>Subject: Re: [v2 5/6] i915/dp/fec: Configure the Forward Error Co
>-Original Message-
>From: Navare, Manasi D
>Sent: Thursday, October 18, 2018 4:16 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Singh, Gaurav K
>;
>Jani Nikula ; Ville Syrjala
>
>Subject: Re: [v2 6/6] drm/i915/fec: Disable FEC state.
>
&
>-Original Message-
>From: Sripada, Radhakrishna
>Sent: Thursday, October 4, 2018 11:30 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Sripada, Radhakrishna ; Chris Wilson
>; Thierry, Michel ; Ausmus,
>James ; Srivatsa, Anusha
>
>Subject: [PATC
TCH v2 2/6] drm/i915/icl: Implement Display
>WA_1405510057
>
>Display WA_1405510057 asks to not enable YUV 420 HDMI 10bpc when
>horizontal blank size mod 8 reminder is 2.
>
>Cc: James Ausmus
>Cc: Paulo Zanoni
>Cc: Rodrigo Vivi
>Cc: Ville Syrjälä
>Signed-off-
>-Original Message-
>From: Mcgee, Jeff
>Sent: Friday, October 12, 2018 2:33 PM
>To: Vivi, Rodrigo
>Cc: intel-gfx@lists.freedesktop.org; Srivatsa, Anusha
>; Spotswood, John A
>; joonas.lahti...@linux.intel.com
>Subject: Re: [RFC] GuC firmware versioning change
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