if (scratch_bo == NULL) {
fprintf(stderr, "Couldn't flink buffer\n");
abort();
The series looks good to me, but keep in mind that we never actually made this
work after Sandybridge, and even there, nobody ever ran it but me :-)
Reviewed-by: Ben Widawsk
On 17-12-17 22:45:13, Gabriel Krisman Bertazi wrote:
Hi Ben and list folks,
I've been investigating some CI failures with the kms_ccs testcase in
the GLK hardware. The original bug is linked below, but there are other
more basic tests failing when trying CCS on pipe C.
https://bugs.freedeskto
GLK for
pipe C (see bug 104096).
A relevant discussion is archived at:
https://lists.freedesktop.org/archives/intel-gfx/2017-December/150646.html
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104096
Signed-off-by: Gabriel Krisman Bertazi
Cc: Ben Widawsky
Reviewed-by: Ben Widawsky
-by: Ben Widawsky
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On 17-11-01 18:09:47, Joonas Lahtinen wrote:
+ Kimmo and Paul
On Wed, 2017-11-01 at 07:43 -0700, Ben Widawsky wrote:
On 17-11-01 14:07:28, Joonas Lahtinen wrote:
> On Mon, 2017-10-30 at 10:48 -0700, Rodrigo Vivi wrote:
> > On Mon, Oct 30, 2017 at 01:00:51PM +, David Weineh
e ability to disable RC6 is valuable not just for debugging
purposes. Folks with very latency sensitive workloads are often willing to
forego power savings. The real problem I see is that we don't test without rc6
in our setup, which indeed makes i
On 17-09-27 15:34:19, Gabriel Krisman Bertazi wrote:
Two scenarios tested:
- unaligned stride
- Stride too small
Signed-off-by: Gabriel Krisman Bertazi
Jason, could you provide your opinion on this? I've always felt the kernel
interface shouldn't be validating stride at all.
---
tests/kms
On 17-09-27 15:34:18, Gabriel Krisman Bertazi wrote:
Signed-off-by: Gabriel Krisman Bertazi
Did someone recommend this test? While we have some hardware limitations on
current generations that make it difficult to use multiple BOs, it's certainly
not impossible, and future HW might make this l
On 17-09-27 15:34:17, Gabriel Krisman Bertazi wrote:
Signed-off-by: Gabriel Krisman Bertazi
---
tests/kms_ccs.c | 37 +++--
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 73025a1e019f..35dfcca6be14 100644
---
-basic: CRASH (0.004s)
Signed-off-by: Gabriel Krisman Bertazi
1-3 so far are
Reviewed-by: Ben Widawsky
---
tests/kms_ccs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 775c6999699f..73025a1e019f 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
t the end of the series
as it is. If it has a more serious user I would need to implement a
proper solution.
Regards,
Tvrtko
P-state driver was looking to use this as a way to make determinations about how
much to limit CPU frequency. Srinivas was privy to the original discussion
--
Ben Wid
even though there are still
plenty of stale comments in the spec suggesting that we do.
We do need to make sure every hardware unit that deals with the
compressed data uses the same hash mode.
Cc: Ben Widawsky
Cc: Jason Ekstrand
Cc: Daniel Stone
Signed-off-by: Ville Syrjälä
[snip]
Review
On 17-09-11 16:25:58, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Other kernel users might want to look at total GPU busyness
in order to implement things like package power distribution
algorithms more efficiently.
Signed-off-by: Tvrtko Ursulin
Cc: Ben Widawsky
Cc: Ben Widawsky
Acked-by
On 17-09-09 02:06:35, Zhi Wang wrote:
Factor out setup_private_pat() for introducing the following patches.
Reviewed-by: Chris Wilson
Cc: Rodrigo Vivi
Cc: Chris Wilson
Cc: Joonas Lahtinen
Signed-off-by: Zhi Wang
Reviewed-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 20
they can only be reached by
expanding the tool and forgetting to handle new parameters, with an
error message printed.
CC: Ben Widawsky
Signed-off-by: Petri Latvala
---
tools/intel_l3_parity.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/tools
On 17-08-31 16:52:15, Gabriel Krisman Bertazi wrote:
With this patch the new testcase igt@kms_ccs@pipe-X-invalid-ccs-offset
succeeds.
Signed-off-by: Gabriel Krisman Bertazi
---
drivers/gpu/drm/i915/intel_display.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/inte
*
*/
__u64 formats;
--
hex(0x1f << 98)
'0x7c'
Reviewed-by: Ben Widawsky
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On 17-08-24 22:10:50, Ville Syrjälä wrote:
From: Ville Syrjälä
The CCS won't have the same stride as the main surface anyway so trying
to guard against the fence stride not matching the CCS stride is
not sensible. Just skip the fence vs. fb alignment check for the aux
plane.
Cc: Ben Wid
that we don't need to enforce any massive 2 or 4
MiB alignment for all compressed resources even though there are still
plenty of stale comments in the spec suggesting that we do.
We do need to make sure every hardware unit that deals with the
compressed data uses the same hash mode.
Cc
This was specifically requested by Emil.
On 17-08-24 22:10:53, Ville Syrjälä wrote:
From: Ville Syrjälä
The unreachable() is very much unreachable and the compiler knows
that, so there's no point in having it.
Cc: Ben Widawsky
Cc: Jason Ekstrand
Cc: Daniel Stone
Signed-off-by:
't fully know how it
works yet. Trying to fully describe it is premature.
Signed-off-by: Jason Ekstrand
Cc: Ben Widawsky
Cc: Ville Syrjälä
---
include/uapi/drm/drm_fourcc.h | 35 ++-
1 file changed, 22 insertions(+), 13 deletions(-)
diff --git a/include/uapi/d
CCS that's documented in the
PRM. By keeping everything CCS cache-line aligned, our chances of
generating correct data for an arbitrary-size surface are much higher.
Signed-off-by: Jason Ekstrand
Cc: Ville Syrjälä
Cc: Ben Widawsky
Cc: Daniel Stone
Cc: Daniel Vetter
Reviewed-by: Ben Widaws
On 17-08-03 12:00:56, Daniel Stone wrote:
Hi,
On 1 August 2017 at 17:58, Ben Widawsky wrote:
@@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private
*dev_priv,
plane_formats = skl_plane_formats;
num_plane_formats = ARRAY_SIZE(skl_plane_formats
On 17-08-03 10:08:51, Daniel Vetter wrote:
On Wed, Aug 2, 2017 at 5:43 PM, Ben Widawsky wrote:
On 17-08-02 12:14:15, Daniel Vetter wrote:
On Tue, Aug 01, 2017 at 09:14:50AM -0700, Ben Widawsky wrote:
On 17-07-31 10:29:55, Daniel Vetter wrote:
> On Sat, Jul 29, 2017 at 09:25:50AM -0700,
On 17-08-02 12:14:15, Daniel Vetter wrote:
On Tue, Aug 01, 2017 at 09:14:50AM -0700, Ben Widawsky wrote:
On 17-07-31 10:29:55, Daniel Vetter wrote:
> On Sat, Jul 29, 2017 at 09:25:50AM -0700, Ben Widawsky wrote:
> > On 17-07-29 13:53:10, Daniel Stone wrote:
> > > Hi Ben,
>
On 17-08-01 15:43:50, Kenneth Graunke wrote:
On Tuesday, August 1, 2017 9:58:17 AM PDT Ben Widawsky wrote:
v2:
- Support sprite plane.
- Support pipe C/D limitation on GEN9.
v3:
- Rename structure (Ville)
- Handle GLK (Ville)
v4:
- Fix PIPE_C check, introduced in v2 (Daniel
ndent on userptr, but I don't believe we create many
usrptr BOs as the implementation and API reduce the number of BOs in general.
I don't see any reason not to do any of this though. Series is
Acked-by: Ben Widawsky
As an introduction, this allows i915 to create fewer sg table
v2:
- Support sprite plane.
- Support pipe C/D limitation on GEN9.
v3:
- Rename structure (Ville)
- Handle GLK (Ville)
v4:
- Fix PIPE_C check, introduced in v2 (Daniel)
- Whitespace fix (Daniel)
Cc: Daniel Stone
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
---
drivers/gpu
)
- rename local variable intel_format_modifiers to modifiers (Ville)
- actually use sprite modifiers
- split out modifier/formats by platform (Ville)
v10:
- Undo vendor check from v9
Cc: Ville Syrjälä
Cc: Kristian H. Kristensen
Reviewed-by: Emil Velikov (v8)
Signed-off-by: Ben
(Ville)
Make BUILD_BUG_ON for blob header size
Cc: Rob Clark
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau (v2)
Reviewed-by: Emil Velikov (v3)
---
drivers/gpu/drm/drm_mode_config.c | 7
drivers/gpu/drm/drm_plane.c
rotation is not supported in combination
with
decompression either.
This patch may contain work from at least the following people:
* Vandana Kannan
* Daniel Vetter
* Ben Widawsky
v2: Deal with display workaro
ent adjustments (Liviu)
v5: Some new platforms added due to rebase
v6: Add some missed plane inits (or maybe they're new - who knows at
this point) (Daniel)
v7: Add sun8i (Daniel)
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau
Acked-by: Philippe Cornu
that does sound a bit wasteful space wise.
v2: Drop the 'dev' argument from the hook
v3: Include the description of the CCS surface layout
v4: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason)
Cc: Daniel Vetter
Cc: Ben Widawsky
Cc: Jason Ekstrand
Reviewed-by: Ben Widaw
On 17-07-31 10:29:55, Daniel Vetter wrote:
On Sat, Jul 29, 2017 at 09:25:50AM -0700, Ben Widawsky wrote:
On 17-07-29 13:53:10, Daniel Stone wrote:
> Hi Ben,
>
> On 26 July 2017 at 19:08, Ben Widawsky wrote:
> > + } else if (INTEL_GEN
On 17-07-29 13:53:10, Daniel Stone wrote:
Hi Ben,
On 26 July 2017 at 19:08, Ben Widawsky wrote:
+ } else if (INTEL_GEN(dev_priv) >= 9) {
intel_primary_formats = skl_primary_formats;
num_formats = ARRAY_SIZE(skl_primary_formats);
- modifi
)
- rename local variable intel_format_modifiers to modifiers (Ville)
- actually use sprite modifiers
- split out modifier/formats by platform (Ville)
Cc: Ville Syrjälä
Cc: Kristian H. Kristensen
Reviewed-by: Emil Velikov (v8)
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915
(Ville)
Make BUILD_BUG_ON for blob header size
Cc: Rob Clark
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau (v2)
Reviewed-by: Emil Velikov (v3)
---
drivers/gpu/drm/drm_mode_config.c | 7
drivers/gpu/drm/drm_plane.c
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.
v3:
Rename structure (Ville)
Handle GLK (Ville)
This requires rebase on the correct Ville patches
Cc: Daniel Stone
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 30
rotation is not supported in combination
with
decompression either.
This patch may contain work from at least the following people:
* Vandana Kannan
* Daniel Vetter
* Ben Widawsky
v2: Deal with display workaro
ent adjustments (Liviu)
v5: Some new platforms added due to rebase
v6: Add some missed plane inits (or maybe they're new - who knows at
this point) (Daniel)
v7: Add sun8i (Daniel)
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau
Acked-by: Philippe Cornu
that does sound a bit wasteful space wise.
v2: Drop the 'dev' argument from the hook
v3: Include the description of the CCS surface layout
v4: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason)
Cc: Daniel Vetter
Cc: Ben Widawsky
Cc: Jason Ekstrand
Reviewed-by: Ben Widaw
TDP though,
it wouldn't need to actually be included, so we could perhaps leave room for
per-engine.
--
Ben Widawsky, Intel Open Source Technology Center
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vent, &data, NULL);
+ perf_event_overflow(event, &data, regs);
period = max_t(u64, 1, event->hw.sample_period);
hrtimer_forward_now(hrtimer, ns_to_ktime(period));
--
2.9.4
--
Ben Widawsky, Intel Open Source Technology Center
___
Inte
othing */
+ } else {
+ engine = user_engine_map[engine];
+ val = i915->engine[engine]->pmu_sample[sample];
+ }
} else switch (event->attr.config) {
case I915_PMU_ACTUAL_FREQUENCY:
val = i915-&g
IDENCY 40
+#define I915_PMU_RC6p_RESIDENCY41
+#define I915_PMU_RC6pp_RESIDENCY 42
+
/* Each region is a minimum of 16k, and there are at most 255 of them.
*/
#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
diff --git a/kernel/events/core.c b/kernel/events/core.c
index e46eba8cd1b7..7b8c6dce1078 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7386,6 +7386,7 @@ int perf_event_overflow(struct perf_event *event,
{
return __perf_event_overflow(event, 1, data, regs);
}
+EXPORT_SYMBOL_GPL(perf_event_overflow);
/*
* Generic software event infrastructure
--
2.9.4
--
Ben Widawsky, Intel Open Source Technology Center
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)
- rename local variable intel_format_modifiers to modifiers (Ville)
- actually use sprite modifiers
- split out modifier/formats by platform (Ville)
Cc: Ville Syrjälä
Cc: Kristian H. Kristensen
Reviewed-by: Emil Velikov (v8)
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.
v3:
Rename structure (Ville)
Handle GLK (Ville)
This requires rebase on the correct Ville patches
Cc: Daniel Stone
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 30
(Ville)
Make BUILD_BUG_ON for blob header size
Cc: Rob Clark
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau (v2)
Reviewed-by: Emil Velikov (v3)
---
drivers/gpu/drm/drm_mode_config.c | 7
drivers/gpu/drm/drm_plane.c
interface will allow clients to create buffers for
scanout with a good set of modifiers, and later import those buffers (through
EGL already, and Vulkan WSI later) into a graphics runtime. EGL/WSI will provide
similar interfaces for rendering - modifiers which can be used for rendering.
Ben Widawsky (4
ent adjustments (Liviu)
v5: Some new platforms added due to rebase
v6: Add some missed plane inits (or maybe they're new - who knows at
this point) (Daniel)
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau
---
drivers/gpu/drm/arc/arcpgu_crtc.c
On 17-06-29 23:02:08, Ville Syrjälä wrote:
On Fri, Jun 23, 2017 at 09:45:44AM -0700, Ben Widawsky wrote:
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.
This requires rebase on the correct Ville patches
Cc: Daniel Stone
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
On 17-07-07 09:28:08, Jason Ekstrand wrote:
On Thu, Jul 6, 2017 at 4:27 PM, Ben Widawsky wrote:
We don't yet have optimal MOCS settings, but we have enough to know how
to at least determine when we might have non-optimal settings within our
driver.
Signed-off-by: Ben Widawsky
---
src/
On 17-07-14 22:10:15, Ville Syrjälä wrote:
On Fri, Jul 14, 2017 at 11:41:49AM -0700, Ben Widawsky wrote:
On 17-06-29 22:49:44, Ville Syrjälä wrote:
[snip]
>
>... but here it's ALIGN(formats_offset+formats_size). I think we should
>be aligning the same thing in both case
Marc, please file a bug on freedesktop.org.
We expect the modesetting driver to work well and if it's not, it should have a
bug associated with it.
Sorry for your frustration.
On 17-07-17 12:22:00, Marc MERLIN wrote:
Ok, there must be a problem, sent 5 messages to the list with clear details
o
hanging this, but tell me what you want.
BUILD_BUG_ON sounds good to me regardless.
[snip]
--
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On 17-07-07 09:23:26, Jason Ekstrand wrote:
On Fri, Jul 7, 2017 at 3:34 AM, Chris Wilson
wrote:
Quoting Ben Widawsky (2017-07-07 00:27:01)
> drivers/gpu/drm/i915/i915_drv.c | 3 +++
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
>
On 17-07-07 11:34:48, Chris Wilson wrote:
Quoting Ben Widawsky (2017-07-07 00:27:01)
drivers/gpu/drm/i915/i915_drv.c | 3 +++
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
include/uapi/drm/i915_drm.h | 8
4 files changed, 22
On 17-07-06 14:06:24, Vivi, Rodrigo wrote:
No change on render context size is required for Gen10.
So this patch doesn't change the default behaviour,
but only avoid the missing_case message.
Cc: Ben Widawsky
Signed-off-by: Rodrigo Vivi
Reviewed-by: Ben Widawsky
[snip]
--
Ben Wid
From: Ben Widawsky
Starting with GEN9, Memory Object Control State (MOCS) becomes an index
into a table as opposed to the direct programming within the command.
The table has 62 usable entries (ie 6 bits can represent all settings),
and each buffer type may use one of these 62 entries to
mmit c9b0481bce24af032386701de0266eb5bc24e988
Author: Ben Widawsky
Date: Fri Apr 8 10:21:16 2016 -0700
i965: Use PTE mocs
Signed-off-by: Ben Widawsky
diff --git a/src/mesa/drivers/dri/i965/brw_mocs.c
b/src/mesa/drivers/dri/i965/brw_mocs.c
index 5df154eb86..b7bfdab671 100644
--- a/s
We don't yet have optimal MOCS settings, but we have enough to know how
to at least determine when we might have non-optimal settings within our
driver.
Signed-off-by: Ben Widawsky
---
src/intel/vulkan/anv_device.c | 12
src/intel/vulkan/anv_private.h
Signed-off-by: Ben Widawsky
---
src/intel/drm/i915_drm.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/intel/drm/i915_drm.h b/src/intel/drm/i915_drm.h
index c26bf7c125..69e38ce89f 100644
--- a/src/intel/drm/i915_drm.h
+++ b/src/intel/drm/i915_drm.h
@@ -431,6 +431,14 @@ typedef
funcs (Emil)
- Use unreachable (Emil)
v7:
- Only allow Intel modifiers and LINEAR (Ben)
v8
- Fix spite assert introduced in v6 (Daniel)
Cc: Ville Syrjälä
Cc: Kristian H. Kristensen
Cc: Emil Velikov
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 136
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.
This requires rebase on the correct Ville patches
Cc: Daniel Stone
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 34 +--
drivers/gpu/drm/i915
viu)
* Fix data types (Ben)
* Make the blob part of uapi (Daniel)
v3:
Remove unused ret field.
Change i, and j to unsigned int (Emil)
v4:
Use plane->modifier_count instead of recounting (Daniel)
Cc: Rob Clark
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Ston
of things came
up and it took a while to spin this rev. Nothing was missing intentionally.
[1] The bitmask is used to show the connection between which modifiers are
supported by which formats.
Ben Widawsky (4):
drm: Plumb modifiers through plane init
drm: Create a format/modifier blob
drm
ent adjustments (Liviu)
v5: Some new platforms added due to rebase
v6: Add some missed plane inits (or maybe they're new - who knows at
this point) (Daniel)
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone (v2)
Reviewed-by: Liviu Dudau
---
drivers/gpu/drm/arc/arcpgu_crtc.c
On 17-06-22 10:42:45, Srivatsa, Anusha wrote:
Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.
v2: Change commit message, correct alignment
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature
Cc: Anuj Phogat
Cc: Rodrigo Vivi
S
On 17-05-17 01:20:50, Emil Velikov wrote:
Hi Ben,
A couple of small questions/suggestions that I hope you find useful.
Please don't block any of this work based on my comments.
On 16 May 2017 at 22:31, Ben Widawsky wrote:
+static bool intel_primary_plane_format_mod_supported(s
On 17-05-17 01:06:16, Emil Velikov wrote:
Hi Ben,
On 16 May 2017 at 22:31, Ben Widawsky wrote:
Updated blob layout (Rob, Daniel, Kristian, xerpi)
v2:
* Removed __packed, and alignment (.+)
* Fix indent in drm_format_modifier fields (Liviu)
* Remove duplicated modifier > 64 check (Li
On 17-05-17 11:17:57, Liviu Dudau wrote:
On Tue, May 16, 2017 at 02:31:24PM -0700, Ben Widawsky wrote:
This is the plumbing for supporting fb modifiers on planes. Modifiers
have already been introduced to some extent, but this series will extend
this to allow querying modifiers per plane. Based
On 17-05-17 13:31:44, Daniel Vetter wrote:
On Tue, May 16, 2017 at 02:19:12PM -0700, Ben Widawsky wrote:
On 17-05-03 17:08:27, Daniel Vetter wrote:
> On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote:
> > +struct drm_format_modifier_blob {
> > +#define FORMAT
. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 131 +--
drivers/gpu/drm/i915/intel_sprite.c | 76 +++-
2 files changed, 201 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b
-by: Daniel Stone (v2)
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/arc/arcpgu_crtc.c | 1 +
drivers/gpu/drm/arm/hdlcd_crtc.c| 1 +
drivers/gpu/drm/arm/malidp_planes.c | 2 +-
drivers/gpu/drm/armada/armada_crtc.c| 1 +
drivers/gpu/drm/arm
viu)
* Fix data types (Ben)
* Make the blob part of uapi (Daniel)
Cc: Rob Clark
Cc: Daniel Stone
Cc: Kristian H. Kristensen
Cc: Liviu Dudau
Signed-off-by: Ben Widawsky
Reviewed-by: Daniel Stone
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu/drm/drm_plane.c |
On 17-05-03 17:08:27, Daniel Vetter wrote:
On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote:
Updated blob layout (Rob, Daniel, Kristian, xerpi)
Cc: Rob Clark
Cc: Daniel Stone
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/drm_mode_config.c | 7
On 17-05-03 14:15:15, Liviu Dudau wrote:
On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote:
Updated blob layout (Rob, Daniel, Kristian, xerpi)
Cc: Rob Clark
Cc: Daniel Stone
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/drm_mode_config.c | 7
On 17-05-10 18:24:52, Liviu Dudau wrote:
On Wed, May 10, 2017 at 09:34:40AM -0700, Ben Widawsky wrote:
On 17-05-03 18:30:07, Liviu Dudau wrote:
> On Wed, May 03, 2017 at 06:45:05PM +0200, Daniel Vetter wrote:
> > On Wed, May 03, 2017 at 03:52:23PM +0100, Liviu Dudau wrote:
> > &
s not the only IP capable of producing AFBC data, so there might be
another driver
in the making that will be open source.
Best regards,
Liviu
But besides that, it works
perfectly fine for arm render compression format too.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.c
On 17-05-03 14:45:26, Daniel Stone wrote:
Hi Liviu,
On 3 May 2017 at 11:34, Liviu Dudau wrote:
On Tue, May 02, 2017 at 10:14:26PM -0700, Ben Widawsky wrote:
v2: A minor addition from Daniel
You are *really* pushing your luck by not Cc-ing *any* of the maintainers of
the drivers you touch
. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 131 +--
drivers/gpu/drm/i915/intel_sprite.c | 76 +++-
2 files changed, 201 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b
Updated blob layout (Rob, Daniel, Kristian, xerpi)
Cc: Rob Clark
Cc: Daniel Stone
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu/drm/drm_plane.c | 119 ++
include/drm
v2: A minor addition from Daniel
Cc: Daniel Stone
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/arc/arcpgu_crtc.c | 1 +
drivers/gpu/drm/arm/hdlcd_crtc.c| 1 +
drivers/gpu/drm/arm/malidp_planes.c | 2 +-
drivers/gpu/drm/armada/armada_crtc.c
On 17-04-06 14:53:50, Ceraolo Spurio, Daniele wrote:
On 06/04/17 12:15, Rodrigo Vivi wrote:
From: Ben Widawsky
The docs are not yet correct, so I cannot provide a reference to it. In the
current docs, the size is actually smaller than SKL. This seems unlikely given
that in another part of
. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 132 +--
drivers/gpu/drm/i915/intel_sprite.c | 76 +++-
2 files changed, 202 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b
make sprite and cursor have separate functions
---
Ville, I think this addresses most of your comments. I'm guessing you're going
to ask for separate gen sprite plane functions, but I think this looks pretty
decent as is.
---
drivers/gpu/drm/i915/intel_display.c | 26 --
drivers
On 17-03-29 23:17:13, Ville Syrjälä wrote:
On Fri, Mar 24, 2017 at 02:29:50PM -0700, Ben Widawsky wrote:
This was based on a patch originally by Kristian. It has been modified
pretty heavily to use the new callbacks from the previous patch.
v2:
- Add LINEAR and Yf modifiers to list (Ville
They're the same, so use the one which makes more sense.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
"Kristian H. Kristensen"
References: https://patchwork.kernel.org/patch/9482393/
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/arc/arcpgu_crtc.c | 1 +
drivers/gpu/drm/arm/hdlcd_crtc.c| 1 +
drivers/gpu/drm/arm/malidp_planes.c | 2 +-
dri
)
v3:
- Handle cursor formats (Ville)
- Put handling for LINEAR in the mod_support functions (Ville)
Cc: Ville Syrjälä
Cc: Kristian H. Kristensen
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 112 +--
drivers/gpu/drm/i915/intel_sprite.c
t the restriction.
Let's start to round up when computing the color plane dimesions
so that we'll not end up with too low an estimate for the memory
requirements and whatnot.
Cc: Ben Widawsky
Cc: Jason Ekstrand
Signed-off-by: Ville Syrjälä
Both 1 and 2 are:
Reviewed-by: Ben Widawsky
On 17-03-21 16:23:05, Tahvanainen, Jari wrote:
See below [Jari]...
-Original Message-
From: Ben Widawsky [mailto:b...@bwidawsk.net]
Sent: Tuesday, March 21, 2017 5:38 PM
To: Tahvanainen, Jari
Cc: Chris Wilson ; intel-gfx@lists.freedesktop.org
Subject: Re: [01/15] drm/i915: Copy user
: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
Sent: Thursday, March 16, 2017 3:20 PM
To: intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky
Subject: [01/15] drm/i915: Copy user requested buffers into the error state
Introduce a new execobject.flag (EXEC_OBJECT_CAPTURE) that userspace may
use to
On 17-03-01 12:51:17, Ville Syrjälä wrote:
On Tue, Feb 28, 2017 at 03:20:38PM -0800, Ben Widawsky wrote:
On 17-02-28 12:18:39, Jason Ekstrand wrote:
>I've said it before but reading through Ben's patches again make me want to
>be peskier about it. I would really like the U
ces,
and eg. 90/270 degree rotation is not supported in combination with
decompression either.
This patch may contain work from at least the following people:
* Vandana Kannan
* Daniel Vetter
* Ben Widawsky
v2: Deal with display workarounds 0390, 0531, 1125 (Paulo)
Cc: Paulo Zanoni
Cc: Van
ces,
and eg. 90/270 degree rotation is not supported in combination with
decompression either.
This patch may contain work from at least the following people:
* Vandana Kannan
* Daniel Vetter
* Ben Widawsky
v2: Deal with display workarounds 0390, 0531, 1125 (Paulo)
Cc: Paulo Zanoni
Cc: Van
discretion, the contents of the error state. although
compressed, are allocated with GFP_ATOMIC (i.e. limited) and kept for all
eternity (until the error state is destroyed).
Based on an earlier patch by Ben Widawsky
Signed-off-by: Chris Wilson
Cc: Ben Widawsky
Cc: Matt Turner
Haven't test
>
> v2: Drop the 'dev' argument from the hook
> v3: Include the description of the CCS surface layout
>
> Cc: Vandana Kannan
> Cc: Daniel Vetter
> Cc: Ben Widawsky
> Cc: Jason Ekstrand
> Reviewed-by: Ben Widawsky
> Signed-off-by: Ville Syrjälä
> ---
> dri
suspect on
this table let's provide a mechanism to disable these
cache leves on this private table (PPAT).
Cc: Ben Widawsky
Cc: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
I think this is a cool idea, it could equally be achieved by modifying the PTE
encoding function. In my
ces: https://patchwork.kernel.org/patch/9482393/
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/arc/arcpgu_crtc.c | 1 +
drivers/gpu/drm/arm/hdlcd_crtc.c| 1 +
drivers/gpu/drm/arm/malidp_planes.c | 2 +-
drivers/gpu/drm/armada/armada_crtc.c
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