Re: [Intel-gfx] [PATCH 1/5] drm/i915: Separate cherryview from valleyview

Thanks Ville. I'll send one more update with some of the changes. I'll leave the others for a different patch. Details below. Wayne On 12/9/15, 9:10 AM, "Ville Syrjälä" wrote: >On Tue, Dec 08, 2015 at 11:46:53AM -0800, Wayne Boyer wrote: >> The cherryview

Re: [Intel-gfx] [PATCH] drm/i915: Separate cherryview from valleyview

On 12/4/15, 9:24 AM, "Ville Syrjälä" wrote: >On Fri, Dec 04, 2015 at 05:14:19PM +, Vivi, Rodrigo wrote: >> On Fri, 2015-12-04 at 19:04 +0200, Ville Syrjälä wrote: >> > On Fri, Dec 04, 2015 at 05:51:56PM +0100, Daniel Vetter wrote: >> > > On Fri, Dec 04, 2015

Re: [Intel-gfx] [PATCH] drm/i915: Pin the ifbdev for the info->system_base GGTT mmapping

On 8/26/15, 1:23 AM, Deepak wrote: > > >On 08/25/2015 10:18 PM, Chris Wilson wrote: >> A long time ago (before 3.14) we relied on a permanent pinning of the >> ifbdev to lock the fb in place inside the GGTT. However, the >> introduction of stealing the BIOS framebuffer

Re: [Intel-gfx] [PATCH] drm/i915/chv: Use 16 and 32 for low and high drain latency precision.

Tested-by: Wayne Boyer wayne.bo...@intel.com Before this patch I was getting pipe underrun errors on pipe A and pipe C when running various workloads. Shortly after the errors, the screens would go black and could not be recovered without rebooting. With this patch I don't get the underrun