->
> > init_generic_mmio_info()
> >
> > Is adding a single PCH_GPIO_BASE that doesn't depend on dev_priv being
> > populated for use on gvt an option?
>
> IIRC gvt already has some local register defines (possibly due to this
> same reason?). Could add a few
On Thu, 2018-07-12 at 16:06 -0700, Rodrigo Vivi wrote:
> On Thu, Jul 12, 2018 at 02:02:51PM -0700, Lucas De Marchi wrote:
> > After disabling resource streamer on ICL (due to it actually not
> > existing there), I got feedback that there have been some experimental
> > patches for mesa to use it, b
On Tue, 2018-01-09 at 16:09 -0800, Oscar Mateo wrote:
>
> On 01/09/2018 03:23 PM, Paulo Zanoni wrote:
> > This is the current PCI ID list in our documentation.
> >
> > Let's leave the _gt#_ part out for now since our current documentation
> > is not 100% clear and we don't need this info now anyw
On Fri, 2017-12-22 at 21:58 +0200, Ville Syrjälä wrote:
> On Mon, Dec 04, 2017 at 03:22:10PM -0800, Lucas De Marchi wrote:
> > Display WA #1183 was recently added to workaround
> > "Failures when enabling DPLL0 with eDP link rate 2.16
> > or 4.32 GHz and CD clock frequency 308.57 or 617.14 MHz
> >
On Tue, 2017-12-19 at 13:59 -0800, Rodrigo Vivi wrote:
> On Fri, Dec 08, 2017 at 10:06:46PM +, Lucas De Marchi wrote:
> > This copies include/drm/i915_pciids.h from kernel as of drm-tip:
> > drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that
> > was missing there[1].
>
>
On Tue, 2017-12-19 at 15:28 -0800, Rodrigo Vivi wrote:
> On Tue, Dec 19, 2017 at 10:07:30PM +, Chris Wilson wrote:
> > Quoting Rodrigo Vivi (2017-12-19 21:59:43)
> > > On Fri, Dec 08, 2017 at 10:06:46PM +, Lucas De Marchi wrote:
> > > > This copies include/drm/i915_pciids.h from kernel as o
On Wed, 2017-11-29 at 15:44 -0800, Rodrigo Vivi wrote:
> On Tue, Nov 28, 2017 at 09:08:19PM +, Lucas De Marchi wrote:
> > Cc: Ville Syrjälä
> > Signed-off-by: Lucas De Marchi
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 2 +-
> > drivers/gpu/drm/i915/intel_hdmi.c| 2 +-
> > drivers
