t;yet. IS_DISPLAY_() is a bit verbose.
Drive-by comment: At least for recent hardware, we can use
display-specific release names, e.g. IS_XE2LPD() for LNL's display,
since theoretically that display IP could be reused in a different
platform.
--
Gustavo Sousa
>
>BR,
>Jani.
>
>Jani
Quoting Bhadane, Dnyaneshwar (2024-05-13 08:21:31-03:00)
>
>
>> -Original Message-
>> From: Intel-xe On Behalf Of
>> Gustavo Sousa
>> Sent: Friday, May 10, 2024 7:36 PM
>> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
>&g
Quoting Jani Nikula (2024-05-15 10:59:11-03:00)
>On Wed, 15 May 2024, Gustavo Sousa wrote:
>> Quoting Gustavo Sousa (2024-05-15 10:23:54-03:00)
>>>Quoting Mika Kahola (2024-05-15 03:45:23-03:00)
>>>>As a preparation to remove .clock member from pll state
>>&g
Quoting Gustavo Sousa (2024-05-15 10:23:54-03:00)
>Quoting Mika Kahola (2024-05-15 03:45:23-03:00)
>>As a preparation to remove .clock member from pll state
>>structure, let's move the port clock calculation on better
>>location
Ah... Also, I noticed that we
const struct intel_c20pll_state mtl_c20_hdmi_600
>= {
> };
>
> static const struct intel_c20pll_state mtl_c20_hdmi_800 = {
>-.clock = 800,
> .tx = { 0xbe98, /* tx cfg0 */
> 0x8800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -1907,7 +1832,6
0] & C20_PHY_USE_MPLLB;
>+}
>+
>+static int intel_c20pll_calc_port_clock(struct intel_encoder *encoder,
While at it, also remove the unused "encoder" parameter?
Also, note that there are legitimate checkpatch issues reported for
this patch, with those addressed:
Load Battlemage's DMC. We re-use XELPDP_DMC_MAX_FW_SIZE since BMG's
display is a derivative of Xe_LPD+ and has the same MMIO offset limits.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915
):
i915: Add DG2 HuC 7.10.15
Dnyaneshwar Bhadane (1):
i915: Update Xe2LPD DMC to v2.20
Gustavo Sousa (1):
i915: Add BMG DMC v2.06
WHENCE | 7 +--
i915/bmg_dmc.bin | Bin 0 -> 45964 bytes
i915/dg2_huc_gsc.bin | Bin 622592 -> 630784 bytes
i915/xe2lpd_d
The following changes since commit 93f329774542b9b7d57abb18ea8b6542f2d8feac:
Merge branch 'robot/pr-0-1709214990' into 'main' (2024-02-29 14:10:53 +)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/firmware.git tags/intel-2024-04-24
for you to fetch changes
-off-by: Jani Nikula
>>
>> ---
>>
>> Tip: Applying the patch and using 'git show --color-words' is probably
>> the easiest way to review.
>
>wow! this is indeed a nice feature for this case. I had never tried it before.
>Thanks for showing that.
>
>But th
ading and disable runtime PM.
>
>v2: Add support for i915.dmc_firmware_path="/dev/null" (Gustavo)
>
>Cc: Gustavo Sousa
>Cc: Lucas De Marchi
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_dmc.c | 31 +-
Quoting Jani Nikula (2024-04-18 17:09:04-03:00)
>On Thu, 18 Apr 2024, Gustavo Sousa wrote:
>> Quoting Jani Nikula (2024-04-18 11:39:53-03:00)
>>>The distinction between the dmc_firmware_path module param being NULL
>>>and the empty string "" is
Quoting Jani Nikula (2024-04-18 17:03:22-03:00)
>On Thu, 18 Apr 2024, Gustavo Sousa wrote:
>> Quoting Jani Nikula (2024-04-18 11:39:51-03:00)
>>>Return failures from parse_dmc_fw() instead of relying on
>>>intel_dmc_has_payload(). Handle and error report them slightl
Quoting Jani Nikula (2024-04-18 16:56:06-03:00)
>On Thu, 18 Apr 2024, Gustavo Sousa wrote:
>> Quoting Jani Nikula (2024-04-18 11:39:50-03:00)
>>>Clarify request_firmware() error handling. Don't proceed to trying to
>>>parse non-existent firmware or check for pa
; param value issue resolved
>
>Link:
>https://patchwork.freedesktop.org/patch/msgid/20240321161856.3517856-1-jani.nik...@intel.com
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i9
0400,
> "HuC firmware path to use instead of the default one");
>
> i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
>-"DMC firmware path to use instead of the default one");
>+"DMC firmware path to use instead of the default one. "
>+"Use non-existent file to disable DMC and runtime PM.");
Okay. But is it too bad to have a magic string for it? The up side is
that there wouldn't be error messages in the log if we had such option.
--
Gustavo Sousa
>
> i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
> "GSC firmware path to use instead of the default one");
>--
>2.39.2
>
Quoting Jani Nikula (2024-04-18 11:39:52-03:00)
>The big if ladder clutters intel_dmc_init(). Split it out to a separate
>function.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_dmc.c | 96 +---
&g
This function and also the parsing helpers (parse_dmc_fw_*) already have
the pattern of providing error messages for issues found. We could maybe
have parse_dmc_fw() simply returning -1 for errors here.
For this specific condition (!intel_dmc_has_payload(i915)), we could
complain that there the main DMC progr
uct work_struct *work)
>"Failed to load DMC firmware %s."
Should we tweak the message to differentiate from the previous one? At
this point, we know the blob file exists, but there is a problem with
its content.
I think the patch looks good and to me all of the
uring any critical sections/etc.
>
>Signed-off-by: Ville Syrjälä
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/skl_watermark.c | 9 +
> 1 file changed, 9 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
>b/drivers/g
Quoting Ville Syrjala (2024-03-27 14:45:39-03:00)
>From: Ville Syrjälä
>
>Extact the stuff that writes the dbuf/mbus ration stuff
>into its own function. Will help with correctly sequencing
>the operations done during mbus programming.
>
>Signed-off-by: Ville Syrjälä
Revie
Quoting Ville Syrjala (2024-03-27 14:45:38-03:00)
>From: Ville Syrjälä
>
>Extact the stuff that writes the joining bits in MBUS_CTL
>into its own function. Will help with correctly sequencing
>the operations done during mbus programming.
>
>Signed-off-by: Ville Syrjälä
Quoting Ville Syrjala (2024-03-27 14:45:37-03:00)
>From: Ville Syrjälä
>
>intel_mbus_dbox_update() will become static soon. Relocate it
>into a place that avoids having to add a forward declaration
>for it.
>
>Signed-off-by: Ville Syrjälä
Reviewed-by: Gustavo Sousa
>--
l_dbuf_state?
In any case,
Reviewed-by: Gustavo Sousa
>
>Signed-off-by: Ville Syrjälä
>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_cdclk.h | 4 ++--
> drivers/gpu/drm/i915/display/skl_watermark.c | 6 --
later(state)) {
>+/* cdclk/mdclk will be changed later by
>intel_set_cdclk_post_plane_update() */
>+mdclk_cdclk_ratio = old_dbuf_state->mdclk_cdclk_ratio;
>+} else {
>+/* cdclk/mdclk already changed by
>intel_set_cdclk_pre_pl
it. Include that information in the debug message.
>
>Signed-off-by: Ville Syrjälä
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 19 ++-
> 1 file changed, 6 insertions(+), 13 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/displ
old_cdclk_state->actual. Because
voltage_level might have changed, parts of the cdclk change sequence end
up being exercised even when cdclk_config == old_cdclk_state->actual.
Well, even if those side effects might be harmless, I wonder if it would
be better if we used INVALID
at logic detached from the
cdclk sequence in the future?
Another one mentioned in an earlier discussion[1] would be the case
where voltage level changes without changes to CDCLK.
[1] https://lore.kernel.org/intel-gfx/zc0dygncppx_p...@intel.com/
>
>v2: Don't break the "must disable pipes
s a cd2x update, right?
Did you mean intel_set_cdclk_pre_plane_update() above? That would make
sense, because it seems we would be doing the update there even when
decreasing the cdclk because of the condition pipe == INVALID_PIPE.
--
Gustavo Sousa
>The code only works correctly for the c
Quoting Jani Nikula (2024-03-20 13:01:23-03:00)
>Prefer the intel_de_wait*() functions over the uncore interface.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 7 ++-
> drivers/gpu/drm/i915/display/in
gt; intel_de_wait_custom
>
>In particular, it seemed odd to have a double-underscored function be
>called in a number of places.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>
>---
>
>Use 'git show -w --color-words' for easy review.
>--
joining state in case we were in a modeset
where mbus joining changed, so I added that odd-looking condition in
update_mbus_pre_enable() (not moved into
intel_dbuf_mdclk_min_tracker_update()), thinking that the update should
be handled by the cdclk sequence.
--
Gustavo Sousa
>
>I would also
mtip_1519/bat-dg2-8/igt@kms_pipe_crc_basic@hang-read-...@pipe-a-dp-1.html
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1519/bat-dg2-14/igt@kms_pipe_crc_basic@hang-read-...@pipe-a-hdmi-a-2.html
--
Gustavo Sousa
>
>
>New tests
>-
>
> New tests have been introduced betw
scripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CPP [M] drivers/gpu/drm/i915/i915_pci.i
Patch looks sane :-)
Based on that,
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/i915_pci.c | 12
> 1 file changed, 4 insertions(+), 8 d
Quoting Gustavo Sousa (2024-03-12 13:36:36-03:00)
>Xe2LPD always selects the CDCLK PLL as source for the MDCLK. Because of
>that, the ratio between MDCLK and CDCLK is not be constant anymore. As
>such, make sure to have the current ratio available in intel_dbuf_state
>so that it can be
le intel_cdclk_state is worth
it.)
Bspec: 68864, 68868, 69090, 69482
Reviewed-by: Stanislav Lisovskiy
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 31 ++
drivers/gpu/drm/i915/display/intel_cdclk.h| 3 ++
drivers/gpu/drm/i915/display/s
From: Balasubramani Vivekanandan
Enable display support for Lunar Lake.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Lucas De Marchi
Reviewed-by: Lucas De Marchi
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/xe/xe_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git
Marchi
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index 835781624482..3fa851b5c7a6 100644
--- a/drivers/gpu
state should be handled by the
DBUF/MBUS logic, just like it is already done, but the logic will need
to know the ratio to properly update the registers.
v2:
- Make first sentence of commit message more intelligible. (Matt)
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu
ratio. Upcoming changes will use that
function for updates in the ratio due to CDCLK changes.
Bspec: 50057, 69445, 49213, 68868
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/skl_watermark.c | 30 +---
1 file changed, 19 insertions(+), 11
d-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index ad0f03e51e4a..354a9dba6440 100644
---
_pll() out of xe2lpd_mdclk_source_sel()
to make latter only about the register's field.
Bspec: 69090
Cc: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 15 ++-
drivers/gpu/drm/i915/i915_reg.h| 4 +++-
2 files changed, 17 insert
The CDCLK table is tied to Xe2LPD display and not to the platform. Let's
rename lnl_cdclk_table to xe2lpd_cdclk_table in order to reflect that.
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++--
1 file changed, 2 insertions(+), 2
for details.
--
Gustavo Sousa
Balasubramani Vivekanandan (2):
drm/i915/xe2lpd: Load DMC
drm/xe/lnl: Enable display support
Gustavo Sousa (6):
drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
drm/i915/cdclk: Add and use mdclk_source_is_cdclk_pll()
drm/i915/cdclk: Only compute squash
Quoting Lisovskiy, Stanislav (2024-03-11 18:01:04-03:00)
>On Mon, Mar 04, 2024 at 03:30:25PM -0300, Gustavo Sousa wrote:
>> Commit 394b4b7df9f7 ("drm/i915/lnl: Add CDCLK table") and commit
>> 3d3696c0fed1 ("drm/i915/lnl: Start using CDCLK through PLL")
gt;v5: Minor cosmetic changes to the commit message.
>
>BSpec: 68849
>Signed-off-by: Shekhar Chauhan
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/disp
Quoting Gustavo Sousa (2024-03-05 11:40:48-03:00)
>Quoting Matt Roper (2024-03-04 18:58:34-03:00)
>>On Mon, Mar 04, 2024 at 03:30:21PM -0300, Gustavo Sousa wrote:
>>> There will be future changes that rely on the source of the MDCLK. Let's
>>> have xe2lpd_mdclk_s
wait timeout.
>v2: Segregated the wait timeout for platforms before & after LNL.
>v3: Fixed 2 cosmetic changes.
>v4: Revert to v2 design with commit message enhancements.
>
>BSpec: 68849
>Signed-off-by: Shekhar Chauhan
With the tweaks to the commit message above,
Reviewed-by
Quoting Matt Roper (2024-03-04 20:25:31-03:00)
>On Mon, Mar 04, 2024 at 03:30:24PM -0300, Gustavo Sousa wrote:
>> CDCLK programming Xe2LPD always selects the CDCLK PLL as source for the
>
>I think something got a bit muddled while rewriting this sentence.
>Maybe the first two w
Quoting Matt Roper (2024-03-04 19:04:19-03:00)
>On Mon, Mar 04, 2024 at 03:30:22PM -0300, Gustavo Sousa wrote:
>> It is no use computing the squash waveform if we are not going to use
>> it. Move the call to cdclk_squash_waveform() inside the block guarded by
>> HAS_
Quoting Matt Roper (2024-03-04 18:58:34-03:00)
>On Mon, Mar 04, 2024 at 03:30:21PM -0300, Gustavo Sousa wrote:
>> There will be future changes that rely on the source of the MDCLK. Let's
>> have xe2lpd_mdclk_source_sel() as the function responsible for reporting
>> that info
Quoting Lucas De Marchi (2024-03-04 16:50:49-03:00)
>On Mon, Mar 04, 2024 at 03:30:26PM -0300, Gustavo Sousa wrote:
>>From: Balasubramani Vivekanandan
>>
>>Load DMC for Xe2LPD. The value 0x8000 is the maximum payload size for
>>any Xe2LPD DMC firmware.
>&g
Quoting Govindapillai, Vinod (2024-02-22 14:18:53-03:00)
>Hi.
>
>
>
>On Thu, 2024-02-22 at 13:04 -0300, Gustavo Sousa wrote:
>> Hi, guys.
>>
>> (This is a re-send, because I *think* my MUA badly formed the address to
>> the mailing list.)
>>
>>
From: Balasubramani Vivekanandan
Load DMC for Xe2LPD. The value 0x8000 is the maximum payload size for
any Xe2LPD DMC firmware.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Dnyaneshwar Bhadane
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 9
From: Balasubramani Vivekanandan
Enable display support for Lunar Lake.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Lucas De Marchi
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/xe/xe_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b
le intel_cdclk_state is worth
it.)
Bspec: 68864, 68868, 69090, 69482
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 31 ++
drivers/gpu/drm/i915/display/intel_cdclk.h| 3 ++
drivers/gpu/drm/i915/display/skl_watermark.c | 40 +++
drivers/
in the MBus joining state should be handled by the
DBUF/MBUS logic, just like it is already done, but the logic will need
to know the ratio to properly update the registers.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 26
drivers/gpu/drm/i915
ratio. Upcoming changes will use that
function for updates in the ratio due to CDCLK changes.
Bspec: 50057, 69445, 49213, 68868
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/skl_watermark.c | 30 +---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git
It is no use computing the squash waveform if we are not going to use
it. Move the call to cdclk_squash_waveform() inside the block guarded by
HAS_CDCLK_SQUASH(dev_priv).
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +++--
1 file changed, 3 insertions(+), 2
There will be future changes that rely on the source of the MDCLK. Let's
have xe2lpd_mdclk_source_sel() as the function responsible for reporting
that information.
Bspec: 69090
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 17 -
drivers/gpu/drm
The CDCLK table is tied to Xe2LPD display and not to the platform. Let's
rename lnl_cdclk_table to xe2lpd_cdclk_table in order to reflect that.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Sousa
Balasubramani Vivekanandan (2):
drm/i915/xe2lpd: Load DMC
drm/xe/lnl: Enable display support
Gustavo Sousa (6):
drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
drm/i915/cdclk: Add and use xe2lpd_mdclk_source_sel()
drm/i915/cdclk: Only compute squash waveform when
o those commits, but I'm
not finished yet. If you are okay with that, I can finish what I've
already started and send a fresh new series (considering that this
series has no modifications to what we already have).
--
Gustavo Sousa
>
>On Thu, 2024-02-22 at 08:02 -0600, Lucas De Marchi wro
request to either
>linux-firmware or drm-firmware with the DMC firmware. So if we had LNL
>in CI, it would just fail. We need it at least in drm-firmware to be
>able to test. We need it in linux-firmware to be able to merge.
FIY: Xe2LPD DMC has been merged into linux-firmware:
https://gitlab.com/kernel-firmware/linux-firmware/-/merge_requests/160
--
Gustavo Sousa
to 94d9a511a605cc0794bbe2d13328143e86df26e9:
i915: Add Xe2LPD DMC v2.18 (2024-02-22 16:54:31 -0300)
Gustavo Sousa (1):
i915: Add Xe2LPD DMC v2.18
WHENCE | 3 +++
i915/xe2lpd_dmc.bin | Bin 0 -> 61208 bytes
2 fi
aldy working on this. Please
>let me know
Yeah. I have a couple of local fixes to apply to those commits, but I'm
not finished yet. If you are okay with that, I can finish what I've
already started and send a fresh new series (considering that this
series has no modifications to what we already hav
to 98502ba83a6db0e4dc99aa1fa292e48b1dc8d0ce:
i915: Update MTL DMC v2.21 (2024-02-22 10:51:16 -0300)
Gustavo Sousa (1):
i915: Update MTL DMC v2.21
WHENCE | 2 +-
i915/mtl_dmc.bin | Bin 52476 -> 52476 bytes
2 files changed
Improve documentation by giving an overview of the components involved
in the generation of the CDCLK.
v2: Fix htmldoc error because of missing blank line at the start of
bulleted list.
Reviewed-by: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c
NOT TO BE REVIEWED/MERGED
Hardcode path to DMC firmware for CI purposes only.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display
to b407637671a914a401bb818d7691ba45b6b04d10:
[CI] i915: Add MTL DMC v2.21 (2024-02-21 12:59:11 -0300)
Gustavo Sousa (1):
[CI] i915: Add MTL DMC v2.21
i915/mtl_dmc_ver2_21.bin | Bin 0 -> 52476 bytes
1 file changed
Quoting Ville Syrjälä (2024-02-19 17:12:17-03:00)
>On Fri, Feb 16, 2024 at 01:45:25PM -0300, Gustavo Sousa wrote:
>> Improve documentation by giving an overview of the components involved
>> in the generation of the CDCLK.
>>
>> Signed-off-by: Gustavo Sousa
&g
("drm/i915/cdclk: Document CDCLK update methods")
>Cc: Ville Syrjälä
>Cc: Gustavo Sousa
>Reported-by: Stephen Rothwell
>Signed-off-by: Rodrigo Vivi
>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 6 ++
> 1 file changed, 6 insertions(+)
>
>diff --git
Improve documentation by giving an overview of the components involved
in the generation of the CDCLK.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 25 ++
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
e.
>+ * - Squash waveform update. Pipes can be active.
>+ * - Crawl and squash can also be done back to back. Pipes can be active.
>+ *
Reviewed-by: Gustavo Sousa
I think it would also be nice to have some explanation of the components
involved in the generation of the CDCLK. I woul
o be changed then we likely need to add an extra step into the
>cdclk programming sequence to make sure things stay within
>legal limits throughout the process.
>
>Signed-off-by: Ville Syrjälä
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 18
Quoting Ville Syrjala (2024-02-06 22:33:32-03:00)
>From: Ville Syrjälä
>
>Have cdclk_squash_waveform() return a u16 since that's
>how many bits we have in the waveform. We alreday use
>u16 everywhere else.
>
>Signed-off-by: Ville Syrjälä
Reviewed-by: Gustavo Sousa
>--
rm_i915_private
>*dev_priv, enum pipe pipe
> }
>
> static u32 bxt_cdclk_cd2x_div_sel(struct drm_i915_private *dev_priv,
>- int cdclk, int vco)
>+ int cdclk, int vco, u16 waveform)
> {
> /* cd
Quoting Ville Syrjälä (2024-02-14 17:15:51-03:00)
>On Wed, Feb 14, 2024 at 05:08:48PM -0300, Gustavo Sousa wrote:
>> Quoting Gustavo Sousa (2024-02-03 10:32:18-03:00)
>> >Quoting Ville Syrjälä (2024-02-02 17:06:02-03:00)
>> >>On Fri, Feb 02, 2024 at 09:58:3
. (Ville)
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 13 ++---
drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +-
.../gpu/drm/i915/display/intel_display_power_well.c | 2 +-
3 files changed, 8 insertions(+), 9 deletio
Quoting Gustavo Sousa (2024-02-03 10:32:18-03:00)
>Quoting Ville Syrjälä (2024-02-02 17:06:02-03:00)
>>On Fri, Feb 02, 2024 at 09:58:37PM +0200, Ville Syrjälä wrote:
>>> On Fri, Feb 02, 2024 at 10:12:08AM -0300, Gustavo Sousa wrote:
>>> > Looks
Hi, Ville.
Sorry for taking long to get back to this.
Quoting Ville Syrjälä (2024-02-05 12:34:57-03:00)
>On Sat, Feb 03, 2024 at 10:25:18AM -0300, Gustavo Sousa wrote:
>> Quoting Ville Syrjälä (2024-02-02 16:58:37-03:00)
>> >On Fri, Feb 02, 2024 at 10:12:08AM -0300, G
Extend the list of ADL-N PCI IDs to contain two new entries.
Bspec: 68397
Signed-off-by: Gustavo Sousa
---
include/drm/i915_pciids.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 07779a11758e..28a96aa1e08f
Quoting Ville Syrjälä (2024-02-02 16:58:37-03:00)
>On Fri, Feb 02, 2024 at 10:12:08AM -0300, Gustavo Sousa wrote:
>> Looks like the name and description of intel_cdclk_needs_modeset()
>> became inacurate as of commit 59f9e9cab3a1 ("drm/i915: Skip modeset for
>> cdclk c
Quoting Ville Syrjälä (2024-02-02 17:06:02-03:00)
>On Fri, Feb 02, 2024 at 09:58:37PM +0200, Ville Syrjälä wrote:
>> On Fri, Feb 02, 2024 at 10:12:08AM -0300, Gustavo Sousa wrote:
>> > Looks like the name and description of intel_cdclk_needs_modeset()
>> > be
("drm/i915/adl_p: CDCLK crawl support for ADL").
As such, update that function's name and documentation to something more
appropriate, since the real checks for requiring modeset are done
elsewhere.
Signed-off-by: Gustavo Sousa
---
One thing worth noting here is that, with this chang
Quoting Ville Syrjälä (2024-01-26 07:26:52-03:00)
>On Tue, Jan 23, 2024 at 10:42:46AM -0300, Gustavo Sousa wrote:
>> Quoting Ville Syrjala (2024-01-23 06:00:51-03:00)
>> >From: Ville Syrjälä
>> >
>> >Move all DPFC_CHICKEN programming into intel_fbc_program_wo
Quoting Coelho, Luciano (2024-01-26 06:24:29-03:00)
>On Wed, 2024-01-24 at 10:22 -0300, Gustavo Sousa wrote:
>> Hi, Luca!
>
>Hi Gustavo!
>
>
>> Quoting Luca Coelho (2024-01-24 05:52:29-03:00)
>> > The pipes that can be used for eDP MSO are limited to pipe A (
's
>confusion. If it comes to v2, can you please do it and mention that
>this trick relies on shift-count-overflow compiler check?
Wouldn't it be better to have explicit check that l and h are not out of bounds
based on BITS_PER_TYPE() than relying on a compiler flag that could be turned
off (maybe for some questionable reason, but even so)?
--
Gustavo Sousa
bove with IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0),
IP_VER(20, 0)), and
b. And make the "else if" below be about display versions below 14.
With those additions,
Reviewed-by: Gustavo Sousa
--
Gustavo Sousa
> return BIT(PIPE_A) | BIT(PIPE_B);
>-else
>+
dlp,mtl */
>-if (DISPLAY_VER(fbc->i915) >= 11 && !IS_DG2(fbc->i915))
>-intel_de_rmw(fbc->i915, ILK_DPFC_CHICKEN(fbc->id), 0,
>- DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
>+if (DISPLAY_VER(i915) >= 11 &
slowed down the investigation, requiring
>to get access to target device and adding those traces manually.
>
>v2: - Make the debug more generic and move it to intel_dram_detect
> (Gustavo Sousa)
>
>Signed-off-by: Stanislav Lisovskiy
>---
> drivers/gpu/drm/i915/display/intel_
Quoting Gustavo Sousa (2024-01-08 14:27:46-03:00)
>Quoting Gustavo Sousa (2024-01-08 10:35:56-03:00)
>>Quoting Patchwork (2024-01-05 21:14:37-03:00)
>>>== Series Details ==
>>>
>>>Series: Update bxt_sanitize_cdclk() for Xe2_LPD (rev3)
>>>URL : ht
Quoting Gustavo Sousa (2024-01-08 10:35:56-03:00)
>Quoting Patchwork (2024-01-05 21:14:37-03:00)
>>== Series Details ==
>>
>>Series: Update bxt_sanitize_cdclk() for Xe2_LPD (rev3)
>>URL : https://patchwork.freedesktop.org/series/128175/
>>State : failure
&
tps://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v3/shard-glk7/igt@kms_vblank@query-busy-h...@pipe-c-hdmi-a-2.html
The dmesg output do not provide conclusive data for the INCOMPLETE status and I
believe the issue is unrelated, since the real functional change is on the
driver initialization path.
Quoting Matt Roper (2024-01-04 20:52:32-03:00)
>On Thu, Jan 04, 2024 at 03:48:34PM -0800, Matt Roper wrote:
>> On Thu, Jan 04, 2024 at 12:21:50AM -0300, Gustavo Sousa wrote:
>> > That's the function responsible for deriving that register's value; use
>> > it.
>&g
of commit message to be more self-contained.
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 24 +++---
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i9
-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 26 +++---
1 file changed, 3 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index fbe9aba41c35..26200ee3e23f 100644
Extract logic for deriving the value for CDCLK_CTL into bxt_cdclk_ctl().
This makes the code better readable and will be used later in
bxt_sanitize_cdclk().
v2:
- Improve body of commit message to be more self-contained.
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu
er
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index c5fecde7afa8..0012e3171f3f 100644
--- a/drivers/gp
for CDCLK_CTL, hopefully making
it harder for the same kind of problem to happen again.
v2:
- Improve bodies of commit messages to be more self-contained.
Gustavo Sousa (4):
drm/i915/xe2lpd: Update bxt_sanitize_cdclk()
drm/i915/cdclk: Extract bxt_cdclk_ctl()
drm/i915/cdclk: Reorder
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