is booting seamlessly into Ubuntu UI and played around with a few
display settings as well.(Single display, clone and extended modes).
Also tried hot-unplug and plug for the HDMI and is working as expected.
Basic video playback was also verified on both eDP and HDMI.
Tested-by: Karthik B S
://gitlab.freedesktop.org/drm/intel/-/issues/9357
Fixes: 959fb1a68652 ("drm/i915/mst: Populate connector->ddc")
Signed-off-by: Ville Syrjälä
Tested-by: Karthik B S
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/dr
On 6/28/2022 4:34 PM, Arun R Murthy wrote:
In oder to trigger the async flip, a dummy flip is required after sync
flip so as to update the watermarks for async in KMD which happens as
part of this dummy flip. Thereafter async memory update will act as a
trigger register.
Capturing the CRC is
On 7/5/2022 3:08 PM, Murthy, Arun R wrote:
On 6/28/2022 4:34 PM, Arun R Murthy wrote:
In oder to trigger the async flip, a dummy flip is required after sync
flip so as to update the watermarks for async in KMD which happens as
part of this dummy flip. Thereafter async memory update will act as
to
allow the KMD to perform the watermark related updates before writing to
the surface base address.
Signed-off-by: Arun R Murthy
Reviewed-by: Karthik B S
---
tests/kms_async_flips.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tests/kms_async_flips.c b/tests
in kms_async_flips@test-cursor.
Cc: Mika Kahola
Cc: Jouni Hogander
Signed-off-by: José Roberto de Souza
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu
("drm/i915: Implement async flip for ivb/hsw")
Fixes: cda195f13abd ("drm/i915: Implement async flips for bdw")
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/i915_reg.h | 23 ++-
drivers/gpu/drm/
but no
real harm in checking anyway.
Cc: Karthik B S
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display/intel_ddi.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 64 ++---
drivers/gpu/drm/i915/display/i9xx_plane.h | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 33 +--
3 files changed, 83 insertions(+), 16 deletions(-)
diff
On 1/11/2021 10:07 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Inform us if we're buggy and are about to exceed the size of the
bitfields in the plane TILEOFF/OFFSET registers.
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display
generates sync
flips DSPADDR_VLV generates async flips. And as usual the
interrupt bits are different from the other platforms.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display/i9xx_plane.c
On 1/11/2021 10:07 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Add support for async flips on ivb/hsw. Again no need for any
workarounds and just have to deal with the interrupt bits being
shuffled around a bit.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Looks
: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display/i9xx_plane.c| 24
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
drivers/gpu/drm/i915/i915_irq.c | 6
to i9xx_plane_ctl_crtc().
According to the spec we do need to bump the surface alignment
to 256KiB for this. Async flips require an X-tiled buffer so
we don't have to worry about linear.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
+ universal planes.
Instead of doing that lets reuse the .async_flip() hook for this
purpose since it needs to write the exact same set of registers.
In order to do this we'll just have the caller pass in the state
of the async flip bit explicitly.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off
On 1/11/2021 10:07 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Set up the async flip PLANE_CTL bit directly in the
.async_flip() hook. Neither .update_plane() nor .disable_plane()
ever need to set this so having it done by skl_plane_ctl_crtc()
is rather pointless.
Cc: Karthik B S
Cc
On 1/11/2021 10:07 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Prepare for more platforms with async flip support by turning
the flip_done interrupt enable/disable into plane vfuncs.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed
ync flip support in the atomic uapi yet.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Looks good to me.
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 4 +++-
2 files changed, 4 inserti
On 1/11/2021 10:07 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Drop the pointless extra parens.
Cc: Karthik B S
Cc: Vandita Kulkarni
Signed-off-by: Ville Syrjälä
Reviewed-by: Karthik B S
---
drivers/gpu/drm/i915/i915_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
-karthik@intel.com
As HDCP over MST set up is not present on CI,
tested this series locally with v4 of the IGT series.
https://patchwork.freedesktop.org/series/82987/
Tested-by: Karthik B S
Anshuman Gupta (18):
drm/i915/hdcp: Update CP property in update_pipe
drm/i915/hdcp: Get conn
on CI,
I've tested this series on local set up with the above IGT series.
Tested-by: Karthik B S
[PATCH v5 11/17] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len
has an Ack from Tomas to merge it via drm-intel.
[PATCH v5 12/17] drm/hdcp: Max MST content streams
has an Ack from drm-misc
On 9/28/2020 5:48 PM, Ville Syrjälä wrote:
On Mon, Sep 21, 2020 at 04:32:02PM +0530, Karthik B S wrote:
Without async flip support in the kernel, fullscreen apps where game
resolution is equal to the screen resolution, must perform an extra blit
per frame prior to flipping.
Asynchronous page
legacy cursor updates. (Ville)
v11: -Rename skl_program_async_surface_address(). (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 6 -
.../drm/i915/display/intel_display_types.h| 3
-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index c0e0c8992982
)
v10: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915
once every few flips.
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -No need of irq disable if we are not doing vblank evade. (Ville)
v8: -Rebased.
v9: -Move the return in intel_pipe_update_end before tracepoint. (Ville)
v10: Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
tes. (Ville)
-Use 'switch' instead of 'if' for modifier check. (Ville)
-Move documentation changes to a single patch. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 121 +++
1 f
Add the details of the implementation of asynchronous flips for i915.
v7: -Rebased.
v8: -Rebased.
v9: -Rebased.
v10: Move all documentation changes to this patch. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
Documentation/gpu/i915.rst
)
-Use intel_crtc instead of drm_crtc. (Ville)
-Do not mix the flip done and vblank hooks. (Ville)
v10: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +++
drivers/gpu/drm/i915
)
-Remove the early return in skl_plane_ctl. (Paulo)
v7: -Move async address update enable to skl_plane_ctl_crtc() (Ville)
v8: -Rebased.
v9: -Rebased.
v10: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display
platforms with double buffered
async address update enable bit.
v9: -Changes as per feedback received on previous version.
v10: -Changes as per feedback received on previous version.
Karthik B S (8):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async
On 9/18/2020 5:33 PM, Ville Syrjälä wrote:
On Wed, Sep 16, 2020 at 08:38:24PM +0530, Karthik B S wrote:
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the series (Paulo)
v4: -Rebased
On 9/18/2020 5:28 PM, Ville Syrjälä wrote:
On Wed, Sep 16, 2020 at 08:38:23PM +0530, Karthik B S wrote:
Add the details of the implementation of asynchronous flips for i915.
v7: -Rebased.
v8: -Rebased.
v9: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
On 9/18/2020 5:24 PM, Ville Syrjälä wrote:
On Wed, Sep 16, 2020 at 08:38:22PM +0530, Karthik B S wrote:
In Gen 9 and Gen 10 platforms, async address update enable bit is
double buffered. Due to this, during the transition from async flip
to sync flip we have to wait until this bit is updated
On 9/18/2020 5:23 PM, Ville Syrjälä wrote:
On Fri, Sep 18, 2020 at 12:30:45PM +0530, Karthik B S wrote:
This hook is added to avoid writing other plane registers in case of
async flips, so that we do not write the double buffered registers
during async surface address update.
v7: -Plane ctl
On 9/18/2020 5:21 PM, Ville Syrjälä wrote:
On Fri, Sep 18, 2020 at 02:32:34PM +0530, Karthik B S wrote:
If flip is requested on any other plane, reject it.
Make sure there is no change in fbc, offset and framebuffer modifiers
when async flip is requested.
If any of these are modified
lle)
-Remove irrelevant FB size check. (Ville)
-Add missing stride check. (Ville)
-Use drm_rect_equals() instead of individual checks. (Ville)
-Call intel_atomic_check_async before state dump. (Ville)
v10: -Fix the checkpatch errors seen on CI.
Signed-off-by: Karthik B S
Signed-
legacy cursor updates. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 6 -
.../drm/i915/display/intel_display_types.h| 3 +++
drivers/gpu/drm/i915/display/intel_sprite.c | 24 +++
3 files changed
On 9/16/2020 6:30 PM, Karthik B S wrote:
On 9/15/2020 8:11 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:30AM +0530, Karthik B S wrote:
This hook is added to avoid writing other plane registers in case of
async flips, so that we do not write the double buffered registers
during
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the series (Paulo)
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -Rebased.
v8: -Rebased.
v9: -Rebased.
Signed-off-by: Karthik B S
Add the details of the implementation of asynchronous flips for i915.
v7: -Rebased.
v8: -Rebased.
v9: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
Documentation/gpu/i915.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/i915.rst b
)
-Remove the early return in skl_plane_ctl. (Paulo)
v7: -Move async address update enable to skl_plane_ctl_crtc() (Ville)
v8: -Rebased.
v9: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 3
)
-Use intel_crtc instead of drm_crtc. (Ville)
-Do not mix the flip done and vblank hooks. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +++
drivers/gpu/drm/i915/i915_irq.c
once every few flips.
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -No need of irq disable if we are not doing vblank evade. (Ville)
v8: -Rebased.
v9: -Move the return in intel_pipe_update_end before tracepoint. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Reviewed
)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 0f0bcbb00c7f
platforms with double buffered
async address update enable bit.
v9: -Changes as per feedback received on previous version.
Test-with: <20200916135044.6903-1-karthik@intel.com>
Karthik B S (8):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async
lle)
-Remove irrelevant FB size check. (Ville)
-Add missing stride check. (Ville)
-Use drm_rect_equals() instead of individual checks. (Ville)
-Call intel_atomic_check_async before state dump. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i
and call it from intel_update_plane. (Ville)
v8: -Rebased.
v9: -Use if-else instead of return in intel_update_plane(). (Ville)
-Rename 'program_async_surface_address' to 'async_flip'. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
.../gpu/drm/i915/display
On 9/15/2020 8:11 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:30AM +0530, Karthik B S wrote:
This hook is added to avoid writing other plane registers in case of
async flips, so that we do not write the double buffered registers
during async surface address update.
v7: -Plane ctl
On 9/15/2020 7:49 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:31AM +0530, Karthik B S wrote:
In Gen 9 and Gen 10 platforms, async address update enable bit is
double buffered. Due to this, during the transition from async flip
to sync flip we have to wait until this bit is updated
On 9/15/2020 7:40 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:30AM +0530, Karthik B S wrote:
This hook is added to avoid writing other plane registers in case of
async flips, so that we do not write the double buffered registers
during async surface address update.
v7: -Plane ctl
On 9/15/2020 7:37 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:29AM +0530, Karthik B S wrote:
Since the flip done event will be sent in the flip_done_handler,
no need to add the event to the list and delay it for later.
v2: -Moved the async check above vblank_get
On 9/15/2020 7:33 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:28AM +0530, Karthik B S wrote:
If flip is requested on any other plane, reject it.
Make sure there is no change in fbc, offset and framebuffer modifiers
when async flip is requested.
If any of these are modified
On 9/15/2020 7:18 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:27AM +0530, Karthik B S wrote:
Set the Async Address Update Enable bit in plane ctl
when async flip is requested.
v2: -Move the Async flip enablement to individual patch (Paulo)
v3: -Rebased.
v4: -Add separate plane
On 9/15/2020 7:17 PM, Ville Syrjälä wrote:
On Mon, Sep 14, 2020 at 11:26:26AM +0530, Karthik B S wrote:
Add enable/disable flip done functions and the flip done handler
function which handles the flip done interrupt.
Enable the flip done interrupt in IER.
Enable flip done function is called
and call it from intel_update_plane. (Ville)
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 7 ++
.../drm/i915/display/intel_display_types.h| 3 +++
drivers/gpu/drm/i915/display/intel_sprite.c | 24
Add the details of the implementation of asynchronous flips for i915.
v7: -Rebased.
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
Documentation/gpu/i915.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu
In Gen 9 and Gen 10 platforms, async address update enable bit is
double buffered. Due to this, during the transition from async flip
to sync flip we have to wait until this bit is updated before continuing
with the normal commit for sync flip.
Signed-off-by: Karthik B S
Signed-off-by: Vandita
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the series (Paulo)
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -Rebased.
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off
once every few flips.
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -No need of irq disable if we are not doing vblank evade. (Ville)
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++
1 file changed, 6
-Do not allow async flip with linear buffer
on older hw as it has issues with this. (Ville)
-Remove break after intel_atomic_check_async. (Ville)
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c |
'g4x_get_flip_counter'
static.(Reported-by: kernel test robot )
-Fix the typo in commit message.
v6: -Revert back to old time stamping code.
-Remove the break while calling skl_enable_flip_done. (Paulo)
v7: -Rebased.
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita
platforms with double buffered
async address update enable bit.
Test-with: <20200908061001.20302-1-karthik@intel.com>
Karthik B S (8):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async flips in I915
drm/i915: Add checks specific to async
)
-Remove the early return in skl_plane_ctl. (Paulo)
v7: -Move async address update enable to skl_plane_ctl_crtc() (Ville)
v8: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
drivers/gpu/drm/i915/i915_reg.h
and call it from intel_update_plane. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 7 ++
.../drm/i915/display/intel_display_types.h| 3 +++
drivers/gpu/drm/i915/display/intel_sprite.c | 24
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the serires (Paulo)
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
Add the details of the implementation of asynchronous flips for i915.
v7: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
Documentation/gpu/i915.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index
-Do not allow async flip with linear buffer
on older hw as it has issues with this. (Ville)
-Remove break after intel_atomic_check_async. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 143 +++
1 file chan
)
-Remove the early return in skl_plane_ctl. (Paulo)
v7: -Move async address update enable to skl_plane_ctl_crtc() (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files
once every few flips.
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
v7: -No need of irq disable if we are not doing vblank evade. (Ville)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++
1 file changed, 6 insertions(+)
diff
'g4x_get_flip_counter'
static.(Reported-by: kernel test robot )
-Fix the typo in commit message.
v6: -Revert back to old time stamping code.
-Remove the break while calling skl_enable_flip_done. (Paulo)
v7: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers
-with: <20200904102215.4440-1-karthik@intel.com>
Karthik B S (7):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async flips in I915
drm/i915: Add checks specific to async flips
drm/i915: Do not call drm_crtc_arm_vblank_event in async flips
drm/i915: Add dedicated
On 9/1/2020 5:10 PM, Ville Syrjälä wrote:
On Fri, Aug 07, 2020 at 03:05:45PM +0530, Karthik B S wrote:
Add enable/disable flip done functions and the flip done handler
function which handles the flip done interrupt.
Enable the flip done interrupt in IER.
Enable flip done function is called
On 9/1/2020 4:57 PM, Ville Syrjälä wrote:
On Fri, Aug 07, 2020 at 03:05:49PM +0530, Karthik B S wrote:
This hook is added to avoid writing other plane registers in case of
async flips, so that we do not write the double buffered registers
during async surface address update.
Signed-off
On 9/1/2020 4:53 PM, Ville Syrjälä wrote:
On Fri, Aug 07, 2020 at 03:05:48PM +0530, Karthik B S wrote:
Since the flip done event will be sent in the flip_done_handler,
no need to add the event to the list and delay it for later.
v2: -Moved the async check above vblank_get
On 9/1/2020 4:51 PM, Ville Syrjälä wrote:
On Fri, Aug 07, 2020 at 03:05:47PM +0530, Karthik B S wrote:
If flip is requested on any other plane, reject it.
Make sure there is no change in fbc, offset and framebuffer modifiers
when async flip is requested.
If any of these are modified, reject
On 9/1/2020 4:45 PM, Ville Syrjälä wrote:
On Fri, Aug 07, 2020 at 03:05:46PM +0530, Karthik B S wrote:
Set the Async Address Update Enable bit in plane ctl
when async flip is requested.
v2: -Move the Async flip enablement to individual patch (Paulo)
v3: -Rebased.
v4: -Add separate plane
On 9/1/2020 4:42 PM, Ville Syrjälä wrote:
On Fri, Aug 07, 2020 at 03:05:45PM +0530, Karthik B S wrote:
Add enable/disable flip done functions and the flip done handler
function which handles the flip done interrupt.
Enable the flip done interrupt in IER.
Enable flip done function is called
This hook is added to avoid writing other plane registers in case of
async flips, so that we do not write the double buffered registers
during async surface address update.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_sprite.c | 25
are not allowed.
v5: -Fixed the Checkpatch and sparse warnings.
v6: -Reverted back to the old timestamping code as per the feedback received.
-Added documentation.
Test-with: <20200806132935.23293-1-karthik@intel.com>
Karthik B S (7):
drm/i915: Add enable/disable flip done an
once every few flips.
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_sprite.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
b
)
-Remove the early return in skl_plane_ctl. (Paulo)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
'g4x_get_flip_counter'
static.(Reported-by: kernel test robot )
-Fix the typo in commit message.
v6: -Revert back to old time stamping code.
-Remove the break while calling skl_enable_flip_done. (Paulo)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915
eck for n_planes in intel_atomic_check_async
-Added documentation for async flips. (Paulo)
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 113 +++
1 file changed, 113 insertions(+)
diff --git a/drivers/gpu/drm/i
Add the details of the implementation of asynchronous flips for i915.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
Documentation/gpu/i915.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 33cc6ddf8f64
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the serires (Paulo)
v4: -Rebased.
v5: -Rebased.
v6: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers
On 7/28/2020 3:04 AM, Daniel Vetter wrote:
On Mon, Jul 27, 2020 at 2:27 PM Michel Dänzer wrote:
On 2020-07-25 1:26 a.m., Paulo Zanoni wrote:
Em seg, 2020-07-20 às 17:01 +0530, Karthik B S escreveu:
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
On 7/27/2020 5:57 PM, Michel Dänzer wrote:
On 2020-07-25 1:26 a.m., Paulo Zanoni wrote:
Em seg, 2020-07-20 às 17:01 +0530, Karthik B S escreveu:
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1fa67700d8f4..95953b393941 100644
--- a/drivers/gpu/drm/i915
On 7/25/2020 4:56 AM, Paulo Zanoni wrote:
Em seg, 2020-07-20 às 17:01 +0530, Karthik B S escreveu:
Add enable/disable flip done functions and the flip done handler
function which handles the flip done interrupt.
Enable the flip done interrupt in IER.
Enable flip done function is called
On 8/4/2020 11:19 AM, Kulkarni, Vandita wrote:
-Original Message-
From: Michel Dänzer
Sent: Wednesday, July 29, 2020 1:04 PM
To: Kulkarni, Vandita ; Zanoni, Paulo R
; Vetter, Daniel ; B S,
Karthik ; intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org; Shankar, Uma
;
On 7/25/2020 4:56 AM, Paulo Zanoni wrote:
Em seg, 2020-07-20 às 17:01 +0530, Karthik B S escreveu:
Set the Async Address Update Enable bit in plane ctl
when async flip is requested.
v2: -Move the Async flip enablement to individual patch (Paulo)
v3: -Rebased.
v4: -Add separate plane hook
Hi,
This looks like an unrelated failure and false positive.
rev4 of the same series was green.
rev5 only has cosmetic changes to fix checkpatch and sparse warning.
Also, there shouldn't be any changes from this series with regards to
the failing cases.
Thanks and Regards,
Karthik.B.S
On
are not allowed.
v5: -Fixed the Checkpatch and sparse warnings.
Karthik B S (5):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async flips in I915
drm/i915: Add checks specific to async flips
drm/i915: Do not call drm_crtc_arm_vblank_event in async
once every few flips.
v4: -Rebased.
v5: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_sprite.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
b/drivers/gpu/drm
'g4x_get_flip_counter'
static.(Reported-by: kernel test robot )
-Fix the typo in commit message.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +++
drivers/gpu/drm/i915/i915_irq.c | 83
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the serires (Paulo)
v4: -Rebased.
v5: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915
Set the Async Address Update Enable bit in plane ctl
when async flip is requested.
v2: -Move the Async flip enablement to individual patch (Paulo)
v3: -Rebased.
v4: -Add separate plane hook for async flip case (Ville)
v5: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
crtc_state->enable_fbc check. (Ville)
-Set the I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP flag for async
flip case as scanline counter is not reliable here.
v5: -Fix typo and other check patch errors seen in CI
in 'intel_atomic_check_async' function.
Signed-off-by: Karthik B S
Sig
Enable asynchronous flips in i915 for gen9+ platforms.
v2: -Async flip enablement should be a stand alone patch (Paulo)
v3: -Move the patch to the end of the serires (Paulo)
v4: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display
once every few flips.
v4: -Rebased.
Signed-off-by: Karthik B S
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_sprite.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
b/drivers/gpu/drm/i915/display
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