[Intel-gfx] [PATCH] tests: save GPU engine information more properly

2023-10-12 Thread Lee Shawn C
GPU reset when waiting for a new FB during modeset") Cc: Tvrtko Ursulin Cc: Imre Deak Cc: Vidya Srinivas Signed-off-by: Lee Shawn C --- lib/i915/gem_engine_topology.c | 12 ++-- lib/i915/gem_engine_topology.h | 2 +- tests/intel/gem_exec_capture.c | 2 +- tests/intel/gem_reset_sta

Re: [Intel-gfx] drm/i915/mtl: Remove the 'force_probe' requirement for Meteor Lake

2023-10-11 Thread Lee, Shawn C
7..fe748906c06f 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -836,7 +836,6 @@ static const struct intel_device_info mtl_info = { > .has_pxp = 1, > .memory_regions = REGION_SMEM | REGION_STOLEN_LMEM, > .platform_engi

Re: [Intel-gfx] [PATCH 3/3] drm/i915/uncore: optimize CONFIG_DRM_I915_DEBUG_MMIO=n more

2023-07-24 Thread Lee, Shawn C
clude all the code >>>> for unclaimed reg debugging even when CONFIG_DRM_I915_DEBUG_MMIO=n. Fix it. >>>> >>>> Cc: Lee Shawn C >>>> Signed-off-by: Jani Nikula >>>> --- >>>>drivers/gpu/drm/i915/intel_uncore.c | 3 ++- >>

[Intel-gfx] [PATCH] drm/i915: Refine mmio debug flow to avoid bad unlock balance detected.

2023-07-04 Thread Lee Shawn C
-off-by: Lee Shawn C Cc: Uma Shankar Cc: Matt Roper Cc: Andi Shyti --- drivers/gpu/drm/i915/intel_uncore.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 796ebfe6c550..9d665978cc43

[Intel-gfx] [v4] drm/i915/mtl: Add new vswing table for C20 phy to support DP 1.4

2023-06-08 Thread Lee Shawn C
Add vswing table to support DP 1.4 for C20 phy. v2: rename mtl_c10_trans v3: add default_entry for mtl_c20_trans_dp14 v4: rename mtl_cx0_trans_dp14 Bspec: 74104 Signed-off-by: Lee Shawn C Cc: Mika Kahola Cc: Clint Taylor Cc: Radhakrishna Sripada Cc: Uma Shankar Reviewed-by: Mika Kahola

[Intel-gfx] [v3] drm/i915/mtl: Add new vswing table for C20 phy to support DP 1.4

2023-06-08 Thread Lee Shawn C
Add vswing table to support DP 1.4 for C20 phy. v2: rename mtl_c10_trans v3: add default_entry into mtl_c20_trans_dp14 Bspec: 74104 Signed-off-by: Lee Shawn C Cc: Mika Kahola Cc: Clint Taylor Cc: Radhakrishna Sripada Cc: Uma Shankar Reviewed-by: Mika Kahola Reviewed-by: Radhakrishna

[Intel-gfx] [v2] drm/i915/mtl: Add new vswing table for C20 phy to support DP 1.4

2023-06-07 Thread Lee Shawn C
Add vswing table to support DP 1.4 for C20 phy. v2: rename mtl_c10_trans Bspec: 74104 Signed-off-by: Lee Shawn C Cc: Mika Kahola Cc: Clint Taylor Cc: Radhakrishna Sripada Cc: Uma Shankar Reviewed-by: Mika Kahola Reviewed-by: Radhakrishna Sripada --- .../drm/i915/display

[Intel-gfx] [PATCH] drm/i915/mtl: Add new vswing table for C20 phy to support DP 1.4

2023-06-06 Thread Lee Shawn C
Add vswing table to support DP 1.4 for C20 phy. Bspec: 74104 Signed-off-by: Lee Shawn C Cc: Mika Kahola Cc: Clint Taylor Cc: Radhakrishna Sripada Cc: Uma Shankar --- .../drm/i915/display/intel_ddi_buf_trans.c| 21 +++ 1 file changed, 21 insertions(+) diff --git

[Intel-gfx] [PATCH] drm/i915/mtl: update DP 2.0 vswing table for C20 phy

2023-06-06 Thread Lee Shawn C
Update preset 15 setting to align the latest bspec value. Bspec: 74104 Signed-off-by: Lee Shawn C Cc: Mika Kahola Cc: Clint Taylor Cc: Radhakrishna Sripada Cc: Uma Shankar --- drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [Intel-gfx] [PATCH] drm/i915/psr: Add continuous full frame bit together with single

2022-11-29 Thread Lee, Shawn C
/freeze issue by adding continuous full frame with single >full frame update and switch to partial frame update only when selective >update area is properly calculated and configured. > >This is also workaround for HSD 14014971508 > >Cc: Ville Syrjälä >Cc: José Roberto de Souza

Re: [Intel-gfx] [v4] drm/i915/pps: improve eDP power on flow

2022-11-16 Thread Lee, Shawn C
On Wednesday, November 16, 2022 11:45 PM, Jani Nikula wrote: >On Mon, 14 Nov 2022, Lee Shawn C wrote: >> After i915 dirver initialized, a panel power off cycle delay always >> append before turn eDP on. If eDP display did not power on before. >> With this change, pow

[Intel-gfx] [v4] drm/i915/pps: improve eDP power on flow

2022-11-13 Thread Lee Shawn C
commit messages v3: refine panel_power_off_time default value and modify commit messages v4: add eDP power off cycle delay at the path to unload i915 module Cc: Shankar Uma Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_pps.c | 2

Re: [Intel-gfx] [v3] drm/i915/pps: improve eDP power on flow

2022-11-03 Thread Lee, Shawn C
On Thursday, November 3, 2022 7:00 PM, Jani Nikula wrote: >On Thu, 03 Nov 2022, Lee Shawn C wrote: >> After i915 dirver initialized, a panel power off cycle delay always >> append before turn eDP on. If eDP display did not power on before. >> With this change, power off

[Intel-gfx] [v3] drm/i915/pps: improve eDP power on flow

2022-11-02 Thread Lee Shawn C
commit messages v3: refine panel_power_off_time default value and modify commit messages Cc: Shankar Uma Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_pps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu

Re: [Intel-gfx] [v2] drm/i915/pps: improve eDP power on flow

2022-11-02 Thread Lee, Shawn C
On Wednesday, November 2, 2022 6:19 PM, Jani Nikula wrote: >On Tue, 01 Nov 2022, "Lee, Shawn C" wrote: >> On Tue, Nov. 1, 2022, 1:43 p.m, Jani Nikula >> wrote: >>>On Tue, 01 Nov 2022, "Lee, Shawn C" wrote: >>>> On Tuesday, November 1,

Re: [Intel-gfx] [v2] drm/i915/pps: improve eDP power on flow

2022-11-01 Thread Lee, Shawn C
On Tue, Nov. 1, 2022, 1:43 p.m, Jani Nikula wrote: >On Tue, 01 Nov 2022, "Lee, Shawn C" wrote: >> On Tuesday, November 1, 2022 5:53 PM, Jani Nikula >> wrote: >>>On Mon, 24 Oct 2022, Lee Shawn C wrote: >>>> A panel power off cycle delay always

Re: [Intel-gfx] [v2] drm/i915/pps: improve eDP power on flow

2022-11-01 Thread Lee, Shawn C
On Tue, Nov. 1, 2022, 1:43 p.m, Jani Nikula wrote: >On Tue, 01 Nov 2022, "Lee, Shawn C" wrote: >> On Tuesday, November 1, 2022 5:53 PM, Jani Nikula >> wrote: >>>On Mon, 24 Oct 2022, Lee Shawn C wrote: >>>> A panel power off cycle delay always

Re: [Intel-gfx] [v2] drm/i915/pps: improve eDP power on flow

2022-11-01 Thread Lee, Shawn C
On Tuesday, November 1, 2022 5:53 PM, Jani Nikula wrote: >On Mon, 24 Oct 2022, Lee Shawn C wrote: >> A panel power off cycle delay always append before turn eDP on. >> Driver should check last_power_on and last_backlight_off before insert >> this delay. If these values a

[Intel-gfx] [v2] drm/i915/pps: improve eDP power on flow

2022-10-24 Thread Lee Shawn C
on sequence. v2: fix commit messages Cc: Shankar Uma Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_pps.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm

Re: [Intel-gfx] [PATCH] drm/i915/pps: improve eDP power on flow.

2022-10-24 Thread Lee, Shawn C
On Monday, October 24, 2022 9:17 PM, Ville Syrjälä wrote: >On Mon, Oct 24, 2022 at 02:40:04PM +0800, Lee Shawn C wrote: >> Driver always apply panel power off cycle delay before eDP enable. >> If eDP display was enabled at pre-os stage, driver would always >> trigger mode

[Intel-gfx] [PATCH] drm/i915/pps: improve eDP power on flow.

2022-10-24 Thread Lee Shawn C
and last_backlight_off before insert panel power cycle delay. If these values are the same, it means eDP was off until now and driver should bypass this delay to save some times to speed up eDP power on sequence. Cc: Shankar Uma Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Lee Shawn C --- drivers

[Intel-gfx] [PATCH] drm: Add 64:27 and 256:135 picture aspect ratio support

2022-10-01 Thread Lee Shawn C
Syrjälä Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_connector.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c index e3142c8142b3..45078d11c7d3 100644 --- a/drivers/gpu/drm/drm_connector.c +++ b/drivers/gpu/drm

Re: [Intel-gfx] [PATCH] drm/i915/display: clear plane color control register when turn plane off

2022-08-31 Thread Lee, Shawn C
On Wed, August 31, 2022 8:33 PM, Ville Syrjälä wrote: >On Mon, Aug 01, 2022 at 11:16:16PM +0800, Lee Shawn C wrote: >> Customer report abnormal display output while switch eDP off sometimes. >> In current display disable flow, plane will be off at first. Then turn >> eDP of

Re: [Intel-gfx] [PATCH] drm/i915/display: refine eDP power off sequence

2022-08-31 Thread Lee, Shawn C
On Wed, Aug 31, 2022 at 06:49, Ville Syrjälä wrote: >On Wed, Aug 31, 2022 at 06:37:24PM +0800, Lee Shawn C wrote: >> The current eDP disable sequence like this. >> >> disable plane > disable backlight (include T9, the delay from >> backlight disable to end

[Intel-gfx] [PATCH] drm/i915/display: refine eDP power off sequence

2022-08-31 Thread Lee Shawn C
pact user experience. So we modify the eDP disable flow to turn backlight off earlier to avoid abnormal display. disable backlight > disable plane > disalbe transcoder/pipe > disable eDP power Cc: Shankar Uma Cc: Jani Nikula Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/i

[Intel-gfx] [PATCH] drm/i915/display: avoid abnormal pixel output when turn eDP display off

2022-08-02 Thread Lee Shawn C
-by: Lee Shawn C --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 4d6a27757065..7e7d265131b2 100644

[Intel-gfx] [PATCH] drm/i915/display: clear plane color control register when turn plane off

2022-08-01 Thread Lee Shawn C
solve this symptom. Signed-off-by: Lee Shawn C Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl setting when turn full plane off (rev3)

2022-07-28 Thread Lee, Shawn C
Hi Lakshmi, Below issues are not related to the patch. Re-run these test cases with this patch and get pass result on my local machine. Best regards, Shawn From: Patchwork Sent: Wednesday, July 27, 2022 4:54 PM To: Lee, Shawn C Cc: intel-gfx@lists.freedesktop.org Subject: ✗ Fi.CI.BAT

[Intel-gfx] [v2] drm/i915/display: clear plane color ctl setting when turn full plane off

2022-07-22 Thread Lee Shawn C
solve this symptom. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Shankar Uma Cc: Stanislav Lisovskiy Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH] drm/i915: clear plane color ctl setting when turn full plane off

2022-07-22 Thread Lee, Shawn C
On Fri, July 22, 2022, 4:26 a.m, Uma Shankar wrote: >> -Original Message- >> From: Lee, Shawn C >> Sent: Wednesday, July 13, 2022 2:57 PM >> To: intel-gfx@lists.freedesktop.org >> Cc: Lee, Shawn C ; Jani Nikula >> ; Ville Syrjälä >> ; Shank

[Intel-gfx] [v4, 1/2] drm/i915/edid: convert DP, HDMI and LVDS to drm_edid

2022-07-19 Thread Lee, Shawn C
On Fri, Jul 01, 2022 at 12:57:38PM +0300, Ville Syrjälä wrote: >On Fri, Jul 01, 2022 at 11:55:38AM +0300, Jani Nikula wrote: >> Convert all the connectors that use cached connector edid and >> detect_edid to drm_edid. >> >> Since drm_get_edid() calls drm_connector_update_edid_property() while >>

[Intel-gfx] [PATCH] drm/i915: clear plane color ctl setting when turn full plane off

2022-07-13 Thread Lee Shawn C
solve this symptom. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Shankar Uma Cc: Stanislav Lisovskiy Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [v3] drm/edid: check basic audio support on CEA extension block

2022-03-24 Thread Lee Shawn C
Signed-off-by: Lee Shawn C Fixes: e28ad544f462 ("drm/edid: parse CEA blocks embedded in DisplayID") Reviewed-by: Jani Nikula --- drivers/gpu/drm/drm_edid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_ed

[Intel-gfx] [v3] drm/edid: check basic audio support on CEA extension block

2022-03-23 Thread Lee Shawn C
Signed-off-by: Lee Shawn C Fixes: e28ad544f462 ("drm/edid: parse CEA blocks embedded in DisplayID") Reviewed-by: Jani Nikula --- drivers/gpu/drm/drm_edid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_ed

Re: [Intel-gfx] [PATCH] drm/edid: filter DisplayID v2.0 CTA block in audio detection

2022-03-23 Thread Lee, Shawn C
On Wednesday, March 23, 2022 6:40 PM, Jani wrote : >On Wed, 23 Mar 2022, "Lee, Shawn C" wrote: >> On Wednesday, March 23, 2022 6:04 PM, Nikula, Jani >> wrote : >>>On Mon, 21 Mar 2022, Cooper Chiou wrote: >>>> In DisplayID v2.0 CTS data block 0x81

Re: [Intel-gfx] [PATCH] drm/edid: filter DisplayID v2.0 CTA block in audio detection

2022-03-23 Thread Lee, Shawn C
On Wednesday, March 23, 2022 6:04 PM, Nikula, Jani wrote : >On Mon, 21 Mar 2022, Cooper Chiou wrote: >> In DisplayID v2.0 CTS data block 0x81 case, there is no any audio >> information definition, but drm_detect_monitor_audio didn't filter it >> so that it caused eDP dummy audio card be

[Intel-gfx] [v2] drm/edid: check basic audio support on CEA extension block

2022-03-22 Thread Lee Shawn C
From: Cooper Chiou Tag code stored in bit7:5 for CTA block byte[3] is not the same as CEA extension block definition. Only check CEA block has basic audio support. Cc: Jani Nikula Cc: Shawn C Lee Cc: intel-gfx Signed-off-by: Cooper Chiou Signed-off-by: Lee Shawn C --- drivers/gpu/drm

[Intel-gfx] [v8 5/5] drm/edid: check for HF-SCDB block

2022-03-17 Thread Lee Shawn C
Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 40c192587f0a..64d13ba0f701 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm

[Intel-gfx] [v8 4/5] drm/edid: parse HF-EEODB CEA extension block

2022-03-17 Thread Lee Shawn C
While adding CEA modes, try to get available EEODB block number. Then based on it to parse numbers of ext blocks, retrieve CEA information and add more CEA modes. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm

[Intel-gfx] [v8 3/5] drm/edid: read HF-EEODB ext block

2022-03-17 Thread Lee Shawn C
unt(). Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_connector.c | 8 +++- drivers/gpu/drm/drm_edid.c | 71 +++-- include/drm/drm_edid.h | 2 +- 3 files changed, 74 insert

[Intel-gfx] [v8 2/5] drm/edid: parse multiple CEA extension block

2022-03-17 Thread Lee Shawn C
rom drm_find_cea_extension(). If drvier got the same cea pointer then exit this routine. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: Drew Davenport Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 34 +- 1 file changed,

[Intel-gfx] [v8 1/5] drm/edid: seek for available CEA block from specific EDID block index

2022-03-17 Thread Lee Shawn C
drm_find_cea_extension() always look for a top level CEA block. Pass ext_index from caller then this function to search next available CEA ext block from a specific EDID block pointer. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers

[Intel-gfx] [v8 0/5] enhanced edid driver compatibility

2022-03-17 Thread Lee Shawn C
drm_find_cea_extension(). If drvier got the same cea pointer then exit this routine. Lee Shawn C (5): drm/edid: seek for available CEA block from specific EDID block index drm/edid: parse multiple CEA extension block drm/edid: read HF-EEODB ext block drm/edid: parse HF-EEODB CEA extension block drm

Re: [Intel-gfx] [v7 1/5] drm/edid: seek for available CEA and DisplayID block from specific EDID block index

2022-03-15 Thread Lee, Shawn C
On Tuesday, March 15, 2022 8:33 PM, Nikula, Jani wrote: >On Mon, 14 Mar 2022, Drew Davenport wrote: >> On Mon, Mar 14, 2022 at 10:40:47AM +0200, Jani Nikula wrote: >>> On Sun, 13 Mar 2022, Lee Shawn C wrote: >>> > drm_find_cea_extension() always look for a to

Re: [Intel-gfx] [v7 3/5] drm/edid: read HF-EEODB ext block

2022-03-15 Thread Lee, Shawn C
On Tuesday, March 15, 2022 7:03 PM, Nikula, Jani wrote: >On Sun, 13 Mar 2022, Lee Shawn C wrote: >> According to HDMI 2.1 spec. >> >> "The HDMI Forum EDID Extension Override Data Block (HF-EEODB) is >> utilized by Sink Devices to provide an alternate method t

[Intel-gfx] [v7 5/5] drm/edid: check for HF-SCDB block

2022-03-13 Thread Lee Shawn C
Davenport Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 5de85ba20bdf..351a729bddb6 100644 --- a/drivers/gpu/drm/drm_edid.c

[Intel-gfx] [v7 2/5] drm/edid: parse multiple CEA extension block

2022-03-13 Thread Lee Shawn C
rew Davenport Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 32 +++- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 78c415aa6889..9fa84881fbba 100644 --- a/drivers/

[Intel-gfx] [v7 4/5] drm/edid: parse HF-EEODB CEA extension block

2022-03-13 Thread Lee Shawn C
While adding CEA modes, try to get available EEODB block number. Then based on it to parse numbers of ext blocks, retrieve CEA information and add more CEA modes. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: Drew Davenport Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers

[Intel-gfx] [v7 3/5] drm/edid: read HF-EEODB ext block

2022-03-13 Thread Lee Shawn C
unt(). Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: Drew Davenport Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_connector.c | 8 +++- drivers/gpu/drm/drm_edid.c | 71 +++-- include/drm/drm_edid.h | 1 + 3 files c

[Intel-gfx] [v7 1/5] drm/edid: seek for available CEA and DisplayID block from specific EDID block index

2022-03-13 Thread Lee Shawn C
different parameters to store CEA and DisplayID block index. configure DisplayID extansion block index before search available DisplayID block. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: Drew Davenport Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm

[Intel-gfx] [v7 0/5] enhanced edid driver compatibility

2022-03-13 Thread Lee Shawn C
data information was found in DispalyID block. v7: using different parameters to store CEA and DisplayID block index. configure DisplayID extansion block index before search available DisplayID block. Lee Shawn C (5): drm/edid: seek for available CEA and DisplayID block from specific

Re: [Intel-gfx] [v6 1/5] drm/edid: seek for available CEA block from specific EDID block index

2022-03-12 Thread Lee, Shawn C
On Saturday, March 12, 2022 7:41 AM, Drew Davenport wrote: >On Fri, Mar 11, 2022 at 09:22:14AM +0800, Lee Shawn C wrote: >> drm_find_cea_extension() always look for a top level CEA block. Pass >> ext_index from caller then this function to search next available CEA >> ext

[Intel-gfx] [v6 2/5] drm/edid: parse multiple CEA extension block

2022-03-10 Thread Lee Shawn C
tel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 32 +++- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index e267d31d5c87..7717bf86c07d 100644 --- a/drivers/gpu/drm/drm_edid.c ++

[Intel-gfx] [v6 5/5] drm/edid: check for HF-SCDB block

2022-03-10 Thread Lee Shawn C
Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index eac6ce336507..159e01be6f68 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm

[Intel-gfx] [v6 4/5] drm/edid: parse HF-EEODB CEA extension block

2022-03-10 Thread Lee Shawn C
While adding CEA modes, try to get available EEODB block number. Then based on it to parse numbers of ext blocks, retrieve CEA information and add more CEA modes. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm

[Intel-gfx] [v6 3/5] drm/edid: read HF-EEODB ext block

2022-03-10 Thread Lee Shawn C
unt(). Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_connector.c | 8 +++- drivers/gpu/drm/drm_edid.c | 71 +++-- include/drm/drm_edid.h | 2 +- 3 files changed, 74 insert

[Intel-gfx] [v6 1/5] drm/edid: seek for available CEA block from specific EDID block index

2022-03-10 Thread Lee Shawn C
Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 43 +++--- 1 file changed, 21 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 561f53831e29

[Intel-gfx] [v6 0/5] enhanced edid driver compatibility

2022-03-10 Thread Lee Shawn C
data information was found in DispalyID block. Lee Shawn C (5): drm/edid: seek for available CEA block from specific EDID block index drm/edid: parse multiple CEA extension block drm/edid: read HF-EEODB ext block drm/edid: parse HF-EEODB CEA extension block drm/edid: check for HF

[Intel-gfx] [v5 5/5] drm/edid: check for HF-SCDB block

2022-03-10 Thread Lee Shawn C
Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 1da1239c21cb..f1d5180ee5a9 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm

[Intel-gfx] [v5 4/5] drm/edid: parse HF-EEODB CEA extension block

2022-03-10 Thread Lee Shawn C
While adding CEA modes, try to get available EEODB block number. Then based on it to parse numbers of ext blocks, retrieve CEA information and add more CEA modes. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm

[Intel-gfx] [v5 3/5] drm/edid: read HF-EEODB ext block

2022-03-10 Thread Lee Shawn C
unt(). Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_connector.c | 8 +++- drivers/gpu/drm/drm_edid.c | 71 +++-- include/drm/drm_edid.h | 2 +- 3 files changed, 74 insert

[Intel-gfx] [v5 2/5] drm/edid: parse multiple CEA extension block

2022-03-10 Thread Lee Shawn C
tel-gfx Signed-off-by: Lee Shawn C --- drivers/gpu/drm/drm_edid.c | 32 +++- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 1251226d9284..7b672166fab4 100644 --- a/drivers/gpu/drm/drm_edid.c ++

[Intel-gfx] [v5 1/5] drm/edid: seek for available CEA block from specific EDID block index

2022-03-10 Thread Lee Shawn C
drm_find_cea_extension() always look for a top level CEA block. Pass ext_index from caller then this function to search next available CEA ext block from a specific EDID block pointer. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C --- drivers

[Intel-gfx] [v5 0/5] enhanced edid driver compatibility

2022-03-10 Thread Lee Shawn C
Support to parse multiple CEA extension blocks and HF-EEODB to extend drm edid driver's capability. v4: add one more patch to support HF-SCDB v5: HF-SCDB and HF-VSDBS carry the same SCDS data. Reuse drm_parse_hdmi_forum_vsdb() to parse this packet. Lee Shawn C (5): drm/edid: seek

[Intel-gfx] [v2] drm/i915: update new TMDS clock setting defined by VBT

2022-03-03 Thread Lee Shawn C
VBT 249 update to support more TMDS clock rate 3.00G, 3.40G and 5.94G. Refer to this new definition to configure max TMDS clock rate for HDMI driver. BSpec: 20124 v2: new subject Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: add more TMDS clock rate supported by HDMI driver

2022-02-28 Thread Lee Shawn C
VBT 249 update to support more TMDS clock rate 3.00G, 3.40G and 5.94G. Refer to this new definition to configure max TMDS clock rate for HDMI driver. BSpec: 20124 Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_bios.c

[Intel-gfx] [v2] drm/i915: Fix cursor coordinates on bigjoiner slave

2022-02-23 Thread Lee Shawn C
for us. v2: fix compile error Signed-off-by: Ville Syrjälä Signed-off-by: Lee Shawn C Tested-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_cursor.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH] drm/i915: Fix cursor coordinates on bigjoiner slave

2022-02-17 Thread Lee Shawn C
for us. Signed-off-by: Ville Syrjälä Tested-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_cursor.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index 67633f9f0e4a..de5c8617f585 100644

Re: [Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping

2021-11-22 Thread Lee, Shawn C
te this translation >as we cannot use existing icl ddc pin map due to >DDI C is not available on adl-p platform. > >Bspec:20124 > >Cc: Jani Nikula >Cc: Ville Syrjälä >Cc: Imre Deak >Cc: Matt Roper >Cc: Lucas De Marchi >Cc: Cooper Chiou >Cc:

[Intel-gfx] [PATCH] drm/i915/adl_p: Add adl-p ddc pin mapping

2021-11-16 Thread Lee Shawn C
124 Cc: Jani Nikula Cc: Ville Syrjälä Cc: Imre Deak Cc: Matt Roper Cc: Lucas De Marchi Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_bios.c | 12 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 +- 2 files changed

Re: [Intel-gfx] [v4] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display

2021-10-04 Thread Lee, Shawn C
le or not. Avoid to access unexisting adapter. >Driver should check DSI status and pin's availability in >intel_gmbus_is_valid_pin(). > >Cc: Jani Nikula >Cc: Vandita Kulkarni >Cc: Cooper Chiou >Cc: William Tseng >Signed-off-by: Lee Shawn C >--- > drivers/gpu/

[Intel-gfx] [v4] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display

2021-09-22 Thread Lee Shawn C
Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_gmbus.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index ceb1bf8a8c3c

Re: [Intel-gfx] [PATCH] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display

2021-09-17 Thread Lee, Shawn C
On Fri, 17 Sep 2021, Jani Nikula wrote: >On Fri, 17 Sep 2021, Lee Shawn C wrote: >> Gmbus driver would setup all Intel i2c GMBuses. But DDC bus may >> configured as gpio and reserved for MIPI driver to control panel power >> on/off sequence. >> >> Using i2c t

[Intel-gfx] [PATCH] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display

2021-09-16 Thread Lee Shawn C
: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_gmbus.c | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display

2021-09-16 Thread Lee Shawn C
Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_gmbus.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index

Re: [Intel-gfx] [PATCH] drm/i915/dsi: unregister gmbus if LFP display was MIPI panel

2021-09-16 Thread Lee, Shawn C
On Thu, 16 Sep 2021, Jani Nikula wrote: >On Thu, 16 Sep 2021, Lee Shawn C wrote: >> Gmbus driver would setup all Intel i2c GMBuses. But DDC bus may >> configured as gpio and reserved for MIPI driver to control panel power >> on/off sequence. >> >> Using i2c t

[Intel-gfx] [PATCH] drm/i915/dsi: unregister gmbus if LFP display was MIPI panel

2021-09-16 Thread Lee Shawn C
and SDA (might be host sent out i2c slave address). MIPI panel would be impacted due to unexpected signal then caused abnormal display or shut down issue. Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/icl_dsi.c

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for DSI driver improvement (rev3)

2021-09-08 Thread Lee, Shawn C
These errors did not relate to this patch series. Thanks! Best regards, Shawn From: Patchwork Sent: Friday, September 3, 2021 3:21 AM To: Lee, Shawn C Cc: intel-gfx@lists.freedesktop.org Subject: ✗ Fi.CI.IGT: failure for DSI driver improvement (rev3) Patch Details Series: DSI driver

Re: [Intel-gfx] [v4 0/5] DSI driver improvement

2021-09-08 Thread Lee, Shawn C
On Wed, 08 Sep 2021, Jani Nikula wrote: >On Wed, 08 Sep 2021, Lee Shawn C wrote: >> v2: Get data length of brightness value more easily while driver try to >> read/write MIPI_DCS_DISPLAY_BRIGHTNESS command. >> v3: fix checkpatch warning. > >The series is v4, wh

[Intel-gfx] [v4 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command

2021-09-08 Thread Lee Shawn C
Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Jani Nikula --- .../i915/display/intel_dsi_dcs_backlight.c| 23 +-- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [v4 4/5] drm/i915/dsi: Retrieve max brightness level from VBT

2021-09-08 Thread Lee Shawn C
-off-by: Lee Shawn C Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_bios.c | 3 +++ drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 10 -- drivers/gpu/drm/i915/i915_drv.h| 1 + 3 files changed, 12 insertions(+), 2 deletions

[Intel-gfx] [v4 3/5] drm/i915: Get proper min cdclk if vDSC enabled

2021-09-08 Thread Lee Shawn C
confirm min cdclk value. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni Acked-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_cdclk.c | 10 ++ 1 file changed, 10 insertions

[Intel-gfx] [v4 2/5] drm/i915/dsi: refine send MIPI DCS command sequence

2021-09-08 Thread Lee Shawn C
uence. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [v4 1/5] drm/i915/dsi: wait for header and payload credit available

2021-09-08 Thread Lee Shawn C
Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 40 -- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b

[Intel-gfx] [v4 0/5] DSI driver improvement

2021-09-08 Thread Lee Shawn C
v2: Get data length of brightness value more easily while driver try to read/write MIPI_DCS_DISPLAY_BRIGHTNESS command. v3: fix checkpatch warning. Signed-off-by: Lee Shawn C Lee Shawn C (5): drm/i915/dsi: wait for header and payload credit available drm/i915/dsi: refine send MIPI DCS

[Intel-gfx] [v3 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command

2021-09-02 Thread Lee Shawn C
Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Jani Nikula --- .../i915/display/intel_dsi_dcs_backlight.c| 23 +-- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [v3 4/5] drm/i915/dsi: Retrieve max brightness level from VBT

2021-09-02 Thread Lee Shawn C
-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_bios.c | 3 +++ drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 10 -- drivers/gpu/drm/i915/i915_drv.h| 1 + 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers

[Intel-gfx] [v3 3/5] drm/i915: Get proper min cdclk if vDSC enabled

2021-09-02 Thread Lee Shawn C
confirm min cdclk value. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/intel_cdclk.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu

[Intel-gfx] [v3 2/5] drm/i915/dsi: refine send MIPI DCS command sequence

2021-09-02 Thread Lee Shawn C
uence. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [v3 1/5] drm/i915/dsi: wait for header and payload credit available

2021-09-02 Thread Lee Shawn C
Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 40 -- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b

[Intel-gfx] [v3 0/5] DSI driver improvement

2021-09-02 Thread Lee Shawn C
v2: Get data length of brightness value more easily while driver try to read/write MIPI_DCS_DISPLAY_BRIGHTNESS command. v3: fix checkpatch warning. Signed-off-by: Lee Shawn C Lee Shawn C (5): drm/i915/dsi: wait for header and payload credit available drm/i915/dsi: refine send MIPI DCS

[Intel-gfx] [v2 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command

2021-09-02 Thread Lee Shawn C
Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- .../i915/display/intel_dsi_dcs_backlight.c| 23 +-- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [v2 4/5] drm/i915/dsi: Retrieve max brightness level from VBT

2021-09-02 Thread Lee Shawn C
to this setting then configure max brightness level in DCS backlight driver properly. v2: modify variable name brightness_precision_bits instead of max_brightness_level. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C

[Intel-gfx] [v2 2/5] drm/i915/dsi: refine send MIPI DCS command sequence

2021-09-02 Thread Lee Shawn C
uence. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [v2 3/5] drm/i915: Get proper min cdclk if vDSC enabled

2021-09-02 Thread Lee Shawn C
confirm min cdclk value. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/intel_cdclk.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu

[Intel-gfx] [v2 0/5] DSI driver improvement

2021-09-02 Thread Lee Shawn C
v2: Get data length of brightness value more easily while driver try to read/write MIPI_DCS_DISPLAY_BRIGHTNESS command. Signed-off-by: Lee Shawn C Lee Shawn C (5): drm/i915/dsi: wait for header and payload credit available drm/i915/dsi: refine send MIPI DCS command sequence drm/i915

[Intel-gfx] [v2 1/5] drm/i915/dsi: wait for header and payload credit available

2021-09-02 Thread Lee Shawn C
Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 40 -- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b

[Intel-gfx] [PATCH 5/5] drm/i915/dsi: Read/write proper brightness value via MIPI DCS command

2021-09-01 Thread Lee Shawn C
Chiou Cc: William Tseng Signed-off-by: Lee Shawn C --- .../drm/i915/display/intel_dsi_dcs_backlight.c| 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH 4/5] drm/i915/dsi: Retrieve max brightness level from VBT

2021-09-01 Thread Lee Shawn C
to this setting then configure max brightness level in DCS backlight driver properly. v2: modify variable name brightness_precision_bits instead of max_brightness_level. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C

[Intel-gfx] [PATCH 3/5] drm/i915: Get proper min cdclk if vDSC enabled

2021-09-01 Thread Lee Shawn C
confirm min cdclk value. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Cooper Chiou Cc: William Tseng Signed-off-by: Lee Shawn C Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/intel_cdclk.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu

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