etely unreasonable to hold on
powergating for the same reason.
v2: Leave RPCS programming in intel_lrc.c (Lionel)
v3: Update for s/union intel_sseu/struct intel_sseu/ (Lionel)
More to_intel_context() (Tvrtko)
s/dev_priv/i915/ (Tvrtko)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm
EPERM when dynamic sseu is disabled (Tvrtko)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
c: Dmitry Rogozhkin
CC: Tvrtko Ursulin
CC: Zhipeng Gong
CC: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 13
SSEU) configuration to userspace
Lionel Landwerlin (5):
drm/i915/perf: simplify configure all context function
drm/i915/perf: reuse intel_lrc ctx regs macro
drm/i915/perf: lock powergating configuration to default when active
drm/i915: create context image vma in kernel context
drm/i915: ad
Abstract the context image access a bit.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_perf.c | 34 +++-
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
sseu from union to struct (Tvrtko)
Move context default sseu in existing loop (Chris)
v6: s/intel_sseu_from_device_sseu/intel_device_default_sseu/ (Tvrtko)
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 14 ++
drivers/gpu
want to
opt out of the "always-enabled" setting.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gp
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_per
: Lionel Landwerlin
Cc: Joonas Lahtinen
Reviewed-by: Lionel Landwerlin
---
tests/gem_ctx_isolation.c | 51 ---
1 file changed, 42 insertions(+), 9 deletions(-)
diff --git a/tests/gem_ctx_isolation.c b/tests/gem_ctx_isolation.c
index 4968e3678..fe7d3490c
FYI, we're setting this in Mesa :
https://cgit.freedesktop.org/mesa/mesa/tree/src/intel/vulkan/genX_state.c#n130
https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/brw_state_upload.c#n67
I don't think we realized this was a privileged register.
Anuj: Maybe we can drop it?
-
Li
On 24/05/18 11:39, Tvrtko Ursulin wrote:
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -981,7 +981,8 @@ int i915_gem_context_setparam_ioctl(struct
drm_device *dev, void *data,
break;
}
- if (!capable(C
On 25/05/18 11:28, Lionel Landwerlin wrote:
On 25/05/18 09:26, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In the string tracepoint representation we ended up with the engine
sandwiched between context hardware id and context fence id.
Move the two pieces of context data together for
both fields remaing under the
existing name and ordering.
v2:
* Do not consolidate the printk format, just reorder. (Lionel)
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
Maybe there was misunderstanding on my previous comment.
What I wanted to let you know is that the parser in igt
nce. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: svetlana.kukan...@intel.com
Reviewed-by: Chris Wilson
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_trace.h | 107 ++
1 file changed, 65 insertions(+), 42 deletions(-)
d
On 24/05/18 17:07, Tvrtko Ursulin wrote:
On 24/05/2018 16:53, Lionel Landwerlin wrote:
On 24/05/18 16:04, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Instead of using the engine->id, use uabi_class:instance pairs in
trace-
points including engine info.
This will be more readable, m
On 24/05/18 16:35, Tvrtko Ursulin wrote:
On 24/05/2018 15:54, Lionel Landwerlin wrote:
There are concerns about denial of service around the per context sseu
configuration capability. In a previous commit introducing the
capability we allowed it only for capable users. This changes adds a
new
On 24/05/18 16:04, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Instead of using the engine->id, use uabi_class:instance pairs in trace-
points including engine info.
This will be more readable, more future proof and more stable for
userspace consumption.
Signed-off-by: Tvrtko Ursulin
Cc: Chri
=hw_id:fence_context_id.
Arg! Will need to update the tracepoint parser in igt :(
Binary records are left as is, that is both fields remaing under the
existing name and ordering.
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_trace.h | 30
freedesktop.org/show_bug.cgi?id=100899
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
c: Dmitry Rogozhkin
CC: Tvrtko Ursulin
CC: Zhipeng Gong
CC: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 13 ++
drivers/gpu/drm/i915/i915_gem.c | 2 +
drivers/gpu/dr
etely unreasonable to hold on
powergating for the same reason.
v2: Leave RPCS programming in intel_lrc.c (Lionel)
v3: Update for s/union intel_sseu/struct intel_sseu/ (Lionel)
More to_intel_context() (Tvrtko)
s/dev_priv/i915/ (Tvrtko)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm
want to
opt out of the "always-enabled" setting.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gp
sysfs entry (Tvrtko)
Lock interruptible the device in sysfs (Tvrtko)
Fix dropped error code in getting dynamic sseu value (Tvrtko)
s/dev_priv/i915/ (Tvrtko)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 6
drivers/gpu/drm/i915/i915_gem_context.c | 47
Abstract the context image access a bit.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_perf.c | 34 +++-
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_per
sseu from union to struct (Tvrtko)
Move context default sseu in existing loop (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_gem_context.c | 2 ++
drivers/gpu/drm/i915/i915_gem_context.h | 17 +
drivers/gpu/drm/i915/i915_reque
implementation return EPERM when not allowed.
Cheers,
Chris Wilson (3):
drm/i915: Program RPCS for Broadwell
drm/i915: Record the sseu configuration per-context & engine
drm/i915: Expose RPCS (SSEU) configuration to userspace
Lionel Landwerlin (4):
drm/i915/perf: simplify configure
On 24/05/18 11:43, Tvrtko Ursulin wrote:
+
+ /*
+ * Mask of slices to enable for the context. Valid values are
a subset
+ * of the bitmask value returned for I915_PARAM_SLICE_MASK.
+ */
+ __u8 slice_mask;
+
+ /*
+ * Mask of subslices to enable for the context. Val
On 24/05/18 11:39, Tvrtko Ursulin wrote:
On 23/05/2018 18:33, Lionel Landwerlin wrote:
On 23/05/18 16:30, Tvrtko Ursulin wrote:
On 22/05/2018 19:00, Lionel Landwerlin wrote:
There are concerns about denial of service around the per context sseu
configuration capability. In a previous commit
On 23/05/18 16:30, Tvrtko Ursulin wrote:
+{
+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
+ int ret = i915_gem_contexts_get_allow_sseu(dev_priv);
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", ret);
Propagate ENODEV all the way by making
i915_gem_contexts_get_allow_sse
On 23/05/18 16:30, Tvrtko Ursulin wrote:
On 22/05/2018 19:00, Lionel Landwerlin wrote:
There are concerns about denial of service around the per context sseu
configuration capability. In a previous commit introducing the
capability we allowed it only for capable users. This changes adds a
new
On 23/05/18 16:13, Tvrtko Ursulin wrote:
On 22/05/2018 19:00, Lionel Landwerlin wrote:
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration for
its own use case. To do so, we expose a context parameter to allow
adjustment of the RPCS register stored within
On 23/05/18 15:57, Tvrtko Ursulin wrote:
On 22/05/2018 18:59, Lionel Landwerlin wrote:
Abstract the context image access a bit.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 34 +++-
1 file changed, 16 insertions(+), 18 deletions
On 23/05/18 15:54, Tvrtko Ursulin wrote:
On 22/05/2018 18:59, Lionel Landwerlin wrote:
From: Chris Wilson
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine
per context & engine (Chris)
v3: introduce the i915_gem_context_sseu to store powergating
programming, sseu_dev_info has grown quite a bit (Lionel)
v4: rename i915_gem_sseu into intel_sseu (Chris)
use to_intel_context() (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwe
etely unreasonable to hold on
powergating for the same reason.
v2: Leave RPCS programming in intel_lrc.c (Lionel)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 16
drivers/gpu/drm/i915/i915_perf.c | 24 +++-
drivers/gpu/drm/i915/intel_lrc.c
Abstract the context image access a bit.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 34 +++-
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
want to
opt out of the "always-enabled" setting.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gp
users.
Cheers,
Chris Wilson (3):
drm/i915: Program RPCS for Broadwell
drm/i915: Record the sseu configuration per-context & engine
drm/i915: Expose RPCS (SSEU) configuration to userspace
Lionel Landwerlin (4):
drm/i915/perf: simplify configure all context function
drm/i915/perf: reuse
: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 5 +++
drivers/gpu/drm/i915/i915_gem_context.c | 52 -
drivers/gpu/drm/i915/i915_sysfs.c | 30 ++
3 files changed, 86 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
ev_priv.gt.active_rings (Tvrtko)
Disable RPCS configuration setting for non capable users (Lionel/Tvrtko)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
c: Dmitry Rogozhkin
CC: Tvrtko Ursulin
CC: Zhipeng Gong
CC: Joonas Laht
On 22/05/18 17:11, Lionel Landwerlin wrote:
On 21/05/18 17:00, Tvrtko Ursulin wrote:
+
+ /* Queue this switch after all other activity */
+ list_for_each_entry(timeline, &dev_priv->gt.timelines, link) {
This can iterate over gt.active_rings for a shorter walk. See current
s
On 21/05/18 17:00, Tvrtko Ursulin wrote:
+
+ /* Queue this switch after all other activity */
+ list_for_each_entry(timeline, &dev_priv->gt.timelines, link) {
This can iterate over gt.active_rings for a shorter walk. See current
state of engine_has_idle_kernel_context.
For some reason
sizeof(_s) > sizeof(long)
Reported-by: kbuild-...@01.org
Fixes: 84b510e22da7 ("drm/i915/query: Protect tainted function pointer lookup")
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/dr
sizeof(_s) > sizeof(long)
Reported-by: kbuild-...@01.org
Fixes: 84b510e22da7 ("drm/i915/query: Protect tainted function pointer lookup")
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_query.c | 5 -
1
: a446ae2c6e65 ("drm/i915: add query uAPI")
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Okay.
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_query.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git
On 21/05/18 17:00, Tvrtko Ursulin wrote:
On 21/05/2018 14:22, Lionel Landwerlin wrote:
On 15/05/18 10:05, Tvrtko Ursulin wrote:
On 14/05/2018 16:56, Lionel Landwerlin wrote:
From: Chris Wilson
We want to allow userspace to reconfigure the subslice
configuration for
its own use case. To
On 15/05/18 10:05, Tvrtko Ursulin wrote:
On 14/05/2018 16:56, Lionel Landwerlin wrote:
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration for
its own use case. To do so, we expose a context parameter to allow
adjustment of the RPCS register stored within
the kernel.
v2: Bump the command parser revision (Chris)
v3: Whitelist TEXTURE_PALETTE_LOAD_INSTRUCTION_DISABLE (Chris)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 13 -
drivers/gpu/drm/i915/i915_reg.h| 5 +
2 files changed, 17
the kernel.
v2: Bump the command parser revision (Chris)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 11 ++-
drivers/gpu/drm/i915/i915_reg.h| 3 +++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
On 18/05/18 15:40, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-18 15:29:21)
On 18/05/18 15:26, Lionel Landwerlin wrote:
On Gen8+ this register is not priviledged and we want to use it in
Mesa to implement a feature required by GPA called Null Hardware. The
idea is to have the
On 18/05/18 15:26, Lionel Landwerlin wrote:
On Gen8+ this register is not priviledged and we want to use it in
Mesa to implement a feature required by GPA called Null Hardware. The
idea is to have the command parser turn 3DPRIMITIVE/GPGPU_WALKER into
NOOPs.
This patch just whitelists the bits
the kernel.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 8
drivers/gpu/drm/i915/i915_reg.h| 3 +++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
b/drivers/gpu/drm/i915/i915_cmd_parser.c
index
On 17/05/18 11:21, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-17 11:18:16)
This should be sent to stable right?
Yeah, my bad for not digging out the relevant Fixes: +cc Joonas for
the next batch. -Chris
I should have looked at it too. Was just in shock ;)
For Haswell:
Fixes
.
References: https://bugs.freedesktop.org/show_bug.cgi?id=106379
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_perf.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915
On 16/05/18 16:40, Tvrtko Ursulin wrote:
On 15/05/2018 10:05, Tvrtko Ursulin wrote:
On 14/05/2018 16:56, Lionel Landwerlin wrote:
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration
for
its own use case. To do so, we expose a context parameter to allow
On 15/05/18 15:10, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-15 14:57:44)
We don't actually need this information in i915 but we would like to
get it in IGT and since the pciid headers are in sync..
Hmm, I don't see that we display the GT anywhere. I was thinking an
imm
Icelake has less of an emphasis on the GT number and is more
classified as trio of slices-subslices-EUs numbers. Since all the
current skus have only one slice, let's classify them as GT1 for now.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file chang
ned-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_pci.c | 11 +--
include/drm/i915_pciids.h | 18 ++
2 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4364922e935d..81
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
well
drm/i915: Record the sseu configuration per-context & engine
drm/i915: Expose RPCS (SSEU) configuration to userspace
Lionel Landwerlin (4):
drm/i915/perf: simplify configure all context function
drm/i915/perf: reuse intel_lrc ctx regs macro
drm/i915/perf: lock powergating configur
sseu configuration against the device's capabilities (Lionel)
v6: Change context powergating settings through MI_SDM on kernel context (Chris)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
c: Dmitry Rogozhkin
per context & engine (Chris)
v3: introduce the i915_gem_context_sseu to store powergating
programming, sseu_dev_info has grown quite a bit (Lionel)
v4: rename i915_gem_sseu into intel_sseu (Chris)
use to_intel_context() (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwe
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 34 +++-
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 94466aeafd02..fc5b5d66abcd 100644
--- a/drivers
etely unreasonable to hold on
powergating for the same reason.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 24 +++-
drivers/gpu/drm/i915/i915_request.c| 2 ++
drivers/gpu/drm/i915/i915_request.h| 11 +++
drivers/gpu/drm
want to
opt out of the "always-enabled" setting.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gp
This can be used to monitor the number of powergating transition
changes for a particular workload.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
drivers/gpu/drm/i915/intel_lrc.c| 16 +++-
drivers/gpu/drm/i915/intel_ringbuffer.h | 12
On 11/05/18 16:51, Chris Wilson wrote:
But I can't even startup a gdm on that machine with drm-tip. So maybe
there is some much more broken...
Don't leave us in suspense...
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=890614
Not our bug :)
__
On 11/05/18 15:11, Lionel Landwerlin wrote:
On 11/05/18 14:52, Chris Wilson wrote:
Before we unpin the buffer used for OA reports and return it to the
system, we need to be sure that the HW has finished writing into it.
For lack of a better idea, poll OACONTROL to check it is switched off
On 11/05/18 16:51, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-11 16:43:02)
On 11/05/18 15:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-11 15:14:13)
My understanding of the virtual memory addressing from the GPU is limited...
But how can the GPU poke at the kernel&#
On 11/05/18 15:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-11 15:14:13)
My understanding of the virtual memory addressing from the GPU is limited...
But how can the GPU poke at the kernel's allocated data?
I thought we mapped into the GPU's address space only what is
On 11/05/18 15:34, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-11 15:28:24)
On 11/05/18 15:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-11 15:14:13)
My understanding of the virtual memory addressing from the GPU is limited...
But how can the GPU poke at the kernel&#
On 11/05/18 15:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-11 15:14:13)
My understanding of the virtual memory addressing from the GPU is limited...
But how can the GPU poke at the kernel's allocated data?
I thought we mapped into the GPU's address space only what is
hat the OA architecture is clobbering random memory. Disable
it until this can be resolved.
References: https://bugs.freedesktop.org/show_bug.cgi?id=106379
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Matthew Auld
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Jani Nikula
Cc: sta...@vger.
/show_bug.cgi?id=106379
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Matthew Auld
Sounds fair :
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915
On 09/05/18 18:48, Lionel Landwerlin wrote:
@@ -1953,10 +1992,26 @@ static int gen8_emit_bb_start(struct i915_request *rq,
rq->ctx->ppgtt->pd_dirty_rings &=
~intel_engine_flag(rq->engine);
}
- cs = intel_ring_begin(rq, 6);
+ cs = intel_ring_begi
want to
opt out of the "always-enabled" setting.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gp
PCS (SSEU) configuration to userspace
Lionel Landwerlin (5):
drm/i915/perf: simplify configure all context function
drm/i915: add new pipe control helper for mmio writes
drm/i915: give engine to execlists cancel helper
drm/i915: reprogram NOA muxes on context switch when using perf
drm/i915: count po
es (Lionel)
v6: Change context powergating settings through MI_SDM on kernel context (Chris)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
c: Dmitry Rogozhkin
CC: Tvrtko Ursulin
CC: Zhipeng Gong
CC: Joonas Laht
We would like to set a value on the associated engine in this helper
in a following commit.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_guc_submission.c | 2 +-
drivers/gpu/drm/i915/intel_lrc.c| 10 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 2
This can be used to monitor the number of powergating transition
changes for a particular workload.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
drivers/gpu/drm/i915/intel_lrc.c| 1 +
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++
3 files
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
per context & engine (Chris)
v3: introduce the i915_gem_context_sseu to store powergating
programming, sseu_dev_info has grown quite a bit (Lionel)
v4: rename i915_gem_sseu into intel_sseu (Chris)
use to_intel_context() (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwe
only (Chris)
Program MI_BATCH_BUFFER_START into NOA reprogramming correctly (Chris)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c| 135
drivers/gpu/drm/i915/i915_request.c | 2 +
drivers/gpu/drm/i915/i915_request.h | 11
We'll use those helpers in the following commits. It's a good thing to
have them around as they need to apply a particular workaround on
Skylake.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_lrc.c| 34 +
drivers/gpu/drm/i915/intel_ri
On 08/05/18 21:56, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-05-03 18:18:43)
On 25/04/2018 12:45, Lionel Landwerlin wrote:
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration for
its own use case. To do so, we expose a context parameter to allow
On 09/05/18 09:59, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-08 19:03:45)
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes. We need to reprogram them
when we
On 09/05/18 10:05, Chris Wilson wrote:
Could there be any more pointer chasing?
Thinking about more about how to make this part cleaner, could we not
store the engine->noa_batch and then this all becomes
vma = engine->noa_batch;
if (vma)
return;
Locking! Missed it in the first pass, b
On 09/05/18 09:59, Chris Wilson wrote:
+
+ *cs++ = MI_BATCH_BUFFER_START_GEN8 | MI_BATCH_SECOND_LEVEL;
You are not a second level batch. You are calling from the ring to a
global address of _0_.
+ *cs++ = 0;
low 32bits = 0
+ *cs++ = i915_ggtt_offset(stream->noa_reprogram_v
detecting configuration changes (Chris/Lionel)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++
drivers/gpu/drm/i915/i915_perf.c | 108 ++
drivers/gpu/drm/i915/i915_request.h | 6 ++
drivers/gpu/drm/i915/intel_gpu_commands.h
want to
opt out of the "always-enabled" setting.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gp
ration per-context & engine
drm/i915: Expose RPCS (SSEU) configuration to userspace
Lionel Landwerlin (3):
drm/i915/perf: simplify configure all context function
drm/i915: reprogram NOA muxes on context switch when using perf
drm/i915: count powergating transitions per engine
driver
ities (Lionel)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
c: Dmitry Rogozhkin
CC: Tvrtko Ursulin
CC: Zhipeng Gong
CC: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem_context.c | 94 -
d
This can be used to monitor the number of powergating transition
changes for a particular workload.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
drivers/gpu/drm/i915/intel_lrc.c| 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 1 +
drivers/gpu/drm
per context & engine (Chris)
v3: introduce the i915_gem_context_sseu to store powergating
programming, sseu_dev_info has grown quite a bit (Lionel)
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_gem.h | 13 +
drivers/gpu
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
On 03/05/18 18:18, Tvrtko Ursulin wrote:
+int intel_lr_context_set_sseu(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ struct i915_gem_context_sseu *sseu)
+{
+ struct drm_i915_private *dev_priv = ctx->i915;
+ struct intel_context *ce;
+
breadcrumb; switching
contexts at this point is futile so don't.
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Joonas Lahtinen
Reviewed-by: Tvrtko Ursulin
Reviewed-by: Lionel Landwerlin
---
Michał and Michel,
please take a look and see if you can think o
On 03/05/18 19:00, Tvrtko Ursulin wrote:
On 03/05/2018 18:31, Lionel Landwerlin wrote:
On 03/05/18 18:12, Tvrtko Ursulin wrote:
On 30/04/2018 15:37, Lionel Landwerlin wrote:
On 25/04/18 12:50, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-04-25 12:45:14)
This function will be used
On 03/05/18 18:12, Tvrtko Ursulin wrote:
On 30/04/2018 15:37, Lionel Landwerlin wrote:
On 25/04/18 12:50, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-04-25 12:45:14)
This function will be used later by the per (context,engine) power
programming interface.
No. This is not the
On 03/05/18 17:04, Joonas Lahtinen wrote:
Quoting Lionel Landwerlin (2018-04-26 13:22:30)
On 26/04/18 11:00, Joonas Lahtinen wrote:
Quoting Lionel Landwerlin (2018-04-25 14:45:21)
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration for
its own use case
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