Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Fix gem_madvise for ttm+shmem objects

the _SELF_MANAGED_SHRINK_LIST set, make sure they end up on the correct list. v2: - Revert a change that made swapped-out objects inaccessible for truncating. (Matthew Auld) Signed-off-by: Thomas Hellström Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_gem.c | 3 ++- 1 file changed, 2 insertions

Re: [Intel-gfx] [PATCH] drm/i915/gem: Fix gem_madvise for ttm+shmem objects

On 05/11/2021 13:03, Thomas Hellström wrote: Gem-TTM objects that are backed by shmem might have populated page-vectors without having the Gem pages set. Those objects aren't moved to the correct shrinker / purge list by the gem_madvise. Furthermore they are purged directly on MADV_DONTNEED

Re: [Intel-gfx] [PATCH 8/8] drm/amdgpu: add drm buddy support to amdgpu

On 04/11/2021 07:34, Christian König wrote: Am 03.11.21 um 20:25 schrieb Matthew Auld: On 25/10/2021 14:00, Arunpravin wrote: - Remove drm_mm references and replace with drm buddy functionalities - Add res cursor support for drm buddy Signed-off-by: Arunpravin +    spin_lock(>l

Re: [Intel-gfx] [PATCH 8/8] drm/amdgpu: add drm buddy support to amdgpu

On 25/10/2021 14:00, Arunpravin wrote: - Remove drm_mm references and replace with drm buddy functionalities - Add res cursor support for drm buddy Signed-off-by: Arunpravin + spin_lock(>lock); + r = drm_buddy_alloc(mm, (uint64_t)place->fpfn << PAGE_SHIFT, +

Re: [Intel-gfx] [PATCH 6/8] drm/i915: add free_unused_pages support to i915

On 25/10/2021 14:00, Arunpravin wrote: add drm_buddy_free_unused_pages() support on contiguous allocation Signed-off-by: Arunpravin --- drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c

Re: [Intel-gfx] [PATCH 5/8] drm: Implement method to free unused pages

On 25/10/2021 14:00, Arunpravin wrote: On contiguous allocation, we round up the size to the *next* power of 2, implement a function to free the unused pages after the newly allocate block. Signed-off-by: Arunpravin Ideally this gets added with some user, so we can see it in action? Maybe

Re: [Intel-gfx] [PATCH 3/8] drm: implement top-down allocation method

On 25/10/2021 14:00, Arunpravin wrote: Implemented a function which walk through the order list, compares the offset and returns the maximum offset block, this method is unpredictable in obtaining the high range address blocks which depends on allocation and deallocation. for instance, if driver

Re: [Intel-gfx] [PATCH v2 2/8] drm: improve drm_buddy_alloc function

On 25/10/2021 14:00, Arunpravin wrote: - Make drm_buddy_alloc a single function to handle range allocation and non-range allocation demands - Implemented a new function alloc_range() which allocates the requested power-of-two block comply with range limitations - Moved order computation

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: fixup dma_fence_wait usage

On 02/11/2021 18:48, Patchwork wrote: *Patch Details* *Series:* drm/i915: fixup dma_fence_wait usage *URL:* https://patchwork.freedesktop.org/series/96504/ *State:*failure *Details:*

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/ttm: Failsafe migration blits

On Tue, 2 Nov 2021 at 17:55, Thomas Hellström wrote: > > > On 11/2/21 18:40, Matthew Auld wrote: > > On Tue, 2 Nov 2021 at 16:39, Thomas Hellström > > wrote: > >> If the initial fill blit or copy blit of an object fails, the old > >> content of the

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/ttm: Failsafe migration blits

failures and failure to allocate > the async dma_fence_work. > > A previous version of this pach used dma_fence_work, now that's > opencoded which adds more code but might lower the latency > somewhat in the common non-error case. > > v3: > - Style fixes (Matthew Auld) &g

Re: [Intel-gfx] [PATCH 11/28] drm/i915/pm: Move CONTEXT_VALID_BIT check

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Resetting will clear the CONTEXT_VALID_BIT, so wait until after that to test. > AFAIK this seems to be fixing something earlier in the series(maybe patch 7?) i.e without this patch we seem to trigger the BUG_ON. If so, this needs to be

[Intel-gfx] [PATCH] drm/i915: fixup dma_fence_wait usage

dma_fence_wait expects a boolean for whether it should be interruptible, not a timeout value. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/i915_vma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/ttm: Failsafe migration blits

g to system, TTM or shmem will provide us with +* cleared pages. +*/ + if (!IS_ERR(fence) && !i915_ttm_gtt_binds_lmem(dst_mem) && + !I915_SELFTEST_ONLY(fail_gpu_migration || + fail

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/ttm: Reorganize the ttm move code

be no functional change. Signed-off-by: Thomas Hellström Reviewed-by: Matthew Auld

Re: [Intel-gfx] [PATCH v4 1/4] drm/i915: Introduce refcounted sg-tables

ematurely freed, and finally the subclassed struct ttm_resource would > have to bleed into the asynchronous vma bind code. > > v3: > - Address a number of style issues (Matthew Auld) > v4: > - Dont check for st->sgl being NULL in i915_ttm_tt__shmem_unpopulate(), > that shou

Re: [Intel-gfx] [PATCH 4/7] drm/i915/adlp/fb: Fix remapping of linear CCS AUX surfaces

On Tue, 26 Oct 2021 at 23:51, Imre Deak wrote: > > During remapping CCS FBs the CCS AUX surface mapped size and offset->x,y > coordinate calculations assumed a tiled layout. This works as long as > the CCS surface height is aligned to 64 lines (ensuring a 4k bytes CCS > surface tile layout).

Re: [Intel-gfx] [PATCH 3/7] drm/i915/fb: Factor out functions to remap contiguous FB obj pages

et_page(sg, NULL, count * 4096, 0); s/4096/I915_GTT_PAGE_SIZE ? > + sg_dma_address(sg) = 0; I guess maybe a little bit scary, since that might be a valid address. Using the vma->vm scratch might be annoying though, since it could be a different type than the object, plus this is only the GGTT. Looks fine I think, Reviewed-by: Matthew Auld

[Intel-gfx] [PATCH v2] drm/i915/dmabuf: drop the flush on discrete

We were overzealous here; even though discrete is non-LLC, it should still be always coherent. v2(Thomas & Daniel) - Be extra cautious and limit to DG1 - Add some more commentary Signed-off-by: Matthew Auld Cc: Thomas Hellström Cc: Daniel Vetter --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3 6/8] drm/i915: Rework context handling in hugepages selftests

subtest starts with a clean slate, and a clean address space. v2: - Make hugepage_ctx static. Reported-by: kernel test robot Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 128 +++--- 1

[Intel-gfx] [PATCH v3 8/8] drm/i915: Require object lock when freeing pages during destruction

From: Maarten Lankhorst TTM already requires this, and we require it for delayed destroy. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers

[Intel-gfx] [PATCH v3 5/8] drm/i915: Remove resv from i915_vma

From: Maarten Lankhorst It's just an alias to vma->obj->base.resv, no need to duplicate it. Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v3 7/8] drm/i915: Drain the ttm delayed workqueue too

From: Maarten Lankhorst Lets be thorough here. Users of the TTM backend would likely expect this behaviour. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers

[Intel-gfx] [PATCH v3 4/8] drm/i915: vma is always backed by an object.

From: Maarten Lankhorst vma->obj and vma->resv are now never NULL, and some checks can be removed. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_context.c | 2 +- .../gpu/drm/i915/gt/intel_ring_submis

[Intel-gfx] [PATCH v3 3/8] drm/i915: Create a full object for mock_ring, v2.

hew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/mock_engine.c | 38 --- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c index 8b89215afe46..bb99fc03f503 100

[Intel-gfx] [PATCH v3 2/8] drm/i915: Create a dummy object for gen6 ppgtt

ect is created. It just has to look real enough. Also kill pin_mutex, it's not compatible with ww locking, and we can use the vm lock instead. v2: - Drop IS_SHRINKABLE and shorten overly long line v3: - Checkpatch fix for alignment Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-

[Intel-gfx] [PATCH v3 1/8] drm/i915: Remove gen6_ppgtt_unpin_all

From: Maarten Lankhorst gen6_ppgtt_unpin_all is unused, kill it. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 11 --- drivers/gpu/drm/i915/gt/gen6_ppgtt.h | 1 - 2 files changed, 12 deletions

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/4] drm/i915/clflush: fixup handling of cache_dirty (rev2)

On 28/10/2021 13:57, Patchwork wrote: *Patch Details* *Series:* series starting with [v2,1/4] drm/i915/clflush: fixup handling of cache_dirty (rev2) *URL:* https://patchwork.freedesktop.org/series/96348/ *State:*failure *Details:*

[Intel-gfx] [PATCH v2 09/10] drm/i915: Drain the ttm delayed workqueue too

From: Maarten Lankhorst Lets be thorough here. Users of the TTM backend would likely expect this behaviour. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers

[Intel-gfx] [PATCH v2 10/10] drm/i915: Require object lock when freeing pages during destruction

From: Maarten Lankhorst TTM already requires this, and we require it for delayed destroy. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers

[Intel-gfx] [PATCH v2 08/10] drm/i915: Rework context handling in hugepages selftests

subtest starts with a clean slate, and a clean address space. v2: - Make hugepage_ctx static. Reported-by: kernel test robot Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 128 +++--- 1

[Intel-gfx] [PATCH v2 07/10] drm/i915: Remove resv from i915_vma

From: Maarten Lankhorst It's just an alias to vma->obj->base.resv, no need to duplicate it. Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v2 05/10] drm/i915: vma is always backed by an object.

From: Maarten Lankhorst vma->obj and vma->resv are now never NULL, and some checks can be removed. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_context.c | 2 +- .../gpu/drm/i915/gt/intel_ring_submis

[Intel-gfx] [PATCH v2 04/10] drm/i915: Create a full object for mock_ring, v2.

hew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/mock_engine.c | 38 --- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c index 8b89215afe46..bb99fc03f503 100

[Intel-gfx] [PATCH v2 03/10] drm/i915: Create a dummy object for gen6 ppgtt

ect is created. It just has to look real enough. Also kill pin_mutex, it's not compatible with ww locking, and we can use the vm lock instead. v2: - Drop IS_SHRINKABLE and shorten overly long line v3: - Checkpatch fix for alignment Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-

[Intel-gfx] [PATCH v2 06/10] drm/i915/pm: Move CONTEXT_VALID_BIT check

From: Maarten Lankhorst Resetting will clear the CONTEXT_VALID_BIT, so wait until after that to test. Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 5 +++-- 1 file changed, 3 insertions

[Intel-gfx] [PATCH v2 02/10] drm/i915: Remove gen6_ppgtt_unpin_all

From: Maarten Lankhorst gen6_ppgtt_unpin_all is unused, kill it. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 11 --- drivers/gpu/drm/i915/gt/gen6_ppgtt.h | 1 - 2 files changed, 12 deletions

[Intel-gfx] [PATCH v2 01/10] drm/i915: Remove unused bits of i915_vma/active api

Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_active.c | 28 +++- drivers/gpu/drm/i915/i915_active.h | 17 + drivers/gpu/drm/i915/i915_vma.c| 2 +- drivers/gpu/drm/i915/i915_vma.h| 2 -- 4 files changed, 5 insertions(+), 44

[Intel-gfx] [PATCH 11/11] drm/i915: Require object lock when freeing pages during destruction

From: Maarten Lankhorst TTM already requires this, and we require it for delayed destroy. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers

[Intel-gfx] [PATCH 09/11] drm/i915: Rework context handling in hugepages selftests

subtest starts with a clean slate, and a clean address space. v2: - Make hugepage_ctx static. Reported-by: kernel test robot Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 128 +++--- 1

[Intel-gfx] [PATCH 10/11] drm/i915: Drain the ttm delayed workqueue too

From: Maarten Lankhorst Lets be thorough here. Users of the TTM backend would likely expect this behaviour. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers

[Intel-gfx] [PATCH 08/11] drm/i915: Remove resv from i915_vma

From: Maarten Lankhorst It's just an alias to vma->obj->base.resv, no need to duplicate it. Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 07/11] drm/i915/pm: Move CONTEXT_VALID_BIT check

From: Maarten Lankhorst Resetting will clear the CONTEXT_VALID_BIT, so wait until after that to test. Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 5 +++-- 1 file changed, 3 insertions

[Intel-gfx] [PATCH 06/11] drm/i915: vma is always backed by an object.

From: Maarten Lankhorst vma->obj and vma->resv are now never NULL, and some checks can be removed. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_context.c | 2 +- .../gpu/drm/i915/gt/intel_ring_submis

[Intel-gfx] [PATCH 02/11] drm/i915: Slightly rework EXEC_OBJECT_CAPTURE handling, v2.

, but we can't enforce it yet through annotations. Changes since v1: - Rebase on top of multi-batchbuffer changes. v2: - Fix up checkpatch warnings Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura #v1 Signed-off-by: Matthew Auld --- .../gpu/drm/i915/gem

[Intel-gfx] [PATCH 05/11] drm/i915: Create a full object for mock_ring, v2.

hew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/mock_engine.c | 38 --- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c index 8b89215afe46..bb99fc03f503 100

[Intel-gfx] [PATCH 03/11] drm/i915: Remove gen6_ppgtt_unpin_all

From: Maarten Lankhorst gen6_ppgtt_unpin_all is unused, kill it. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 11 --- drivers/gpu/drm/i915/gt/gen6_ppgtt.h | 1 - 2 files changed, 12 deletions

[Intel-gfx] [PATCH 04/11] drm/i915: Create a dummy object for gen6 ppgtt

ect is created. It just has to look real enough. Also kill pin_mutex, it's not compatible with ww locking, and we can use the vm lock instead. v2: - Drop IS_SHRINKABLE and shorten overly long line Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/

[Intel-gfx] [PATCH 01/11] drm/i915: Remove unused bits of i915_vma/active api

Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_active.c | 28 +++- drivers/gpu/drm/i915/i915_active.h | 17 + drivers/gpu/drm/i915/i915_vma.c| 2 +- drivers/gpu/drm/i915/i915_vma.h| 2 -- 4 files changed, 5 insertions(+), 44

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce refcounted sg-tables

On 28/10/2021 10:35, Thomas Hellström wrote: On 10/28/21 10:47, Matthew Auld wrote: On 28/10/2021 08:04, Thomas Hellström wrote: On Wed, 2021-10-27 at 19:03 +0100, Matthew Auld wrote: On 27/10/2021 11:52, Thomas Hellström wrote: As we start to introduce asynchronous failsafe object

[Intel-gfx] [PATCH v2 2/2] drm/i915/gtt: stop caching the scratch page

Normal users shouldn't be hitting this, likely this would indicate a userspace bug. So don't bother caching, which should be safe now that we manually flush the page. Suggested-by: Chris Wilson Signed-off-by: Matthew Auld Cc: Thomas Hellström Cc: Chris Wilson Cc: Ramalingam C Reviewed

[Intel-gfx] [PATCH v2 1/2] drm/i915/gtt: flush the scratch page

sh support is missing. Signed-off-by: Matthew Auld Cc: Thomas Hellström Cc: Chris Wilson Cc: Ramalingam C Reviewed-by: Thomas Hellström --- drivers/gpu/drm/i915/gt/intel_gtt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/d

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build

On 28/10/2021 02:43, Vivi, Rodrigo wrote: On Wed, 2021-10-27 at 10:48 +0100, Matthew Auld wrote: On Wed, 27 Oct 2021 at 10:44, Jani Nikula wrote: On Wed, 27 Oct 2021, Matthew Auld wrote: On Wed, 27 Oct 2021 at 09:58, Jani Nikula wrote: On Wed, 27 Oct 2021, Matthew Auld wrote: On Thu

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce refcounted sg-tables

On 28/10/2021 08:04, Thomas Hellström wrote: On Wed, 2021-10-27 at 19:03 +0100, Matthew Auld wrote: On 27/10/2021 11:52, Thomas Hellström wrote: As we start to introduce asynchronous failsafe object migration, where we update the object state and then submit asynchronous commands we need

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce refcounted sg-tables

On 27/10/2021 11:52, Thomas Hellström wrote: As we start to introduce asynchronous failsafe object migration, where we update the object state and then submit asynchronous commands we need to record what memory resources are actually used by various part of the command stream. Initially for

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build

On Wed, 27 Oct 2021 at 15:54, Lucas De Marchi wrote: > > On Wed, Oct 27, 2021 at 08:57:48AM +0100, Matthew Auld wrote: > >On Thu, 21 Oct 2021 at 13:54, Matthew Auld wrote: > >> > >> wbinvd_on_all_cpus() is only defined on x86 it seems, plus we need

[Intel-gfx] [PATCH v2 4/4] drm/i915: stop setting cache_dirty on discrete

Should not be needed. Even with non-coherent display, we should be using device local-memory there, and not system memory. v2: also add a warning in i915_gem_clflush_object Signed-off-by: Matthew Auld Cc: Thomas Hellström Reviewed-by: Thomas Hellström #v1 --- drivers/gpu/drm/i915/gem

[Intel-gfx] [PATCH v2 3/4] drm/i915: move cpu_write_needs_clflush

Move it next to its partner in crime; gpu_write_needs_clflush. For better readability lets keep gpu vs cpu at least in the same file. Signed-off-by: Matthew Auld Cc: Thomas Hellström Reviewed-by: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 12 drivers/gpu

[Intel-gfx] [PATCH v2 2/4] drm/i915/clflush: disallow on discrete

, so there should in theory be no conceivable reason to ever call i915_gem_clflush_object() on discrete. References: https://gitlab.freedesktop.org/drm/intel/-/issues/4320 Signed-off-by: Matthew Auld Cc: Thomas Hellström Reviewed-by: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_clflush.c

[Intel-gfx] [PATCH v2 1/4] drm/i915/clflush: fixup handling of cache_dirty

the pages are populated. v2(Thomas): - Move setting cache_dirty out of the async portion, also add a comment for why that should still be safe. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 10 +- 1 file changed, 9 insertions

Re: [Intel-gfx] [PATCH] drm/i915: Revert 'guc_id' from i915_request tracepoint

od per platform and are not necessarily possible to maintain in > the future. > > Fixes: dbf9da8d55ef ("drm/i915/guc: Add trace point for GuC submit") > Signed-off-by: Joonas Lahtinen > Cc: John Harrison > Cc: Matthew Brost > Cc: Daniele Ceraolo Spurio > Cc: Chris Wilson > Cc: Matt Roper Reviewed-by: Matthew Auld

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build

On Wed, 27 Oct 2021 at 10:44, Jani Nikula wrote: > > On Wed, 27 Oct 2021, Matthew Auld wrote: > > On Wed, 27 Oct 2021 at 09:58, Jani Nikula > > wrote: > >> > >> On Wed, 27 Oct 2021, Matthew Auld wrote: > >> > On Thu, 2

Re: [Intel-gfx] [PATCH] drm/i915/gem: Remove gpu reloc workaround

On Wed, 27 Oct 2021 at 09:36, Thomas Hellström wrote: > > GPU relocs are gone. There should be no need for this workaround anymore. > Remove it. > > Signed-off-by: Thomas Hellström I was completely wrong here, sorry. Digging through the git history it looks like this came from: Commit

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build

On Wed, 27 Oct 2021 at 09:58, Jani Nikula wrote: > > On Wed, 27 Oct 2021, Matthew Auld wrote: > > On Thu, 21 Oct 2021 at 13:54, Matthew Auld wrote: > >> > >> wbinvd_on_all_cpus() is only defined on x86 it seems, plus we need to > >> include asm/smp.h h

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build

On Thu, 21 Oct 2021 at 13:54, Matthew Auld wrote: > > wbinvd_on_all_cpus() is only defined on x86 it seems, plus we need to > include asm/smp.h here. > > Reported-by: kernel test robot > Signed-off-by: Matthew Auld > Cc: Thomas Hellström Jani, would it make sense to cherr

Re: [Intel-gfx] [PATCH] drm/i915: Use ERR_CAST instead of ERR_PTR(PTR_ERR())

On 25/10/2021 12:32, Wan Jiabing wrote: Fix following coccicheck warning: ./drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:3117:15-22: WARNING: ERR_CAST can be used with eb->requests[i]. Signed-off-by: Wan Jiabing Pushed to drm-intel-gt-next. Thanks. ---

Re: [Intel-gfx] [PATCH 21/28] drm/i915: Drain the ttm delayed workqueue too

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Be thorough.. > > Signed-off-by: Maarten Lankhorst Is this strictly needed for something? Needs a proper commit message anyway. > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git

Re: [Intel-gfx] [PATCH 28/28] drm/i915: Remove short-term pins from execbuf, v4.

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Add a flag PIN_VALIDATE, to indicate we don't need to pin and only > protected by the object lock. > > This removes the need to unpin, which is done by just releasing the > lock. > > eb_reserve is slightly reworked for readability, but

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix inconsistent IS_ERR and PTR_ERR

On 22/10/2021 13:06, Kai Song wrote: Fix inconsistent IS_ERR and PTR_ERR in i915_gem_dmabuf.c Signed-off-by: Kai Song Pushed to drm-intel-gt-next. Thanks. --- drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [Intel-gfx] [PATCH v2 06/17] drm/i915/xehpsdv: support 64K GTT pages

On 21/10/2021 15:26, Ramalingam C wrote: From: Matthew Auld XEHPSDV optimises 64K GTT pages for local-memory, since everything should be allocated at 64K granularity. We say goodbye to sparse entries, and instead get a compact 256B page-table for 64K pages, which should be more cache friendly

Re: [Intel-gfx] [PATCH v2 07/17] drm/i915: Add vm min alignment support

On 21/10/2021 15:26, Ramalingam C wrote: From: Bommu Krishnaiah Replace the hard coded 4K alignment value with vm->min_alignment. Cc: Wilson Chris P Signed-off-by: Bommu Krishnaiah Signed-off-by: Ramalingam C Reviewed-by: Matthew Auld Although likely want to squash patch patches 3

[Intel-gfx] [PATCH 2/2] drm/i915/gtt: stop caching the scratch page

Normal users shouldn't be hitting this, likely this would indicate a userspace bug. So don't bother caching, which should be safe now that we manually flush the page. Suggested-by: Chris Wilson Signed-off-by: Matthew Auld Cc: Thomas Hellström Cc: Chris Wilson Cc: Ramalingam C --- drivers

[Intel-gfx] [PATCH 1/2] drm/i915/gtt: flush the scratch page

The scratch page is directly visible in the users address space, and while this is forced as CACHE_LLC, by the kernel, we still have to contend with things like "Bypass-LLC" MOCS. So just flush no matter what. Signed-off-by: Matthew Auld Cc: Thomas Hellström Cc: Chris Wilson Cc: Ra

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/28] drm/i915: Fix i915_request fence wait semantics

On Thu, 21 Oct 2021 at 13:57, Patchwork wrote: > *Patch Details* > *Series:* series starting with [01/28] drm/i915: Fix i915_request fence > wait semantics > *URL:* https://patchwork.freedesktop.org/series/96115/ > *State:* failure > *Details:* >

Re: [Intel-gfx] [PATCH 25/28] drm/i915: Require object lock when freeing pages during destruction

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > TTM already requires this, and we require it for delayed destroy. > > Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld

Re: [Intel-gfx] [PATCH 13/28] drm/i915: Remove pages_mutex and intel_gtt->vma_ops.set/clear_pages members

On Thu, 21 Oct 2021 at 18:30, Matthew Auld wrote: > > On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst > wrote: > > > > Big delta, but boils down to moving set_pages to i915_vma.c, and removing > > the special handling, all callers use the defaults anyway. We only re

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dmabuf: drop the flush on discrete

On 22/10/2021 10:26, Thomas Hellström wrote: Hi, Matt On 10/21/21 14:53, Matthew Auld wrote: We were overzealous here; even though discrete is non-LLC, it should still be always coherent. Signed-off-by: Matthew Auld Cc: Thomas Hellström ---   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3

Re: [Intel-gfx] [PATCH] drm/i195: Remove some dead struct fwd decl from i915_drv.h

On Fri, 22 Oct 2021 at 09:22, Daniel Vetter wrote: > > Gone with userptr rewrite by Maarten in ed29c2691188 ("drm/i915: Fix > userptr so we do not have to worry about obj->mm.lock, v7.") > > Signed-off-by: Daniel Vetter > Cc: Maarten Lankhorst s/i195/i

Re: [Intel-gfx] [PATCH 19/28] drm/i915: Pass trylock context to callers

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Signed-off-by: Maarten Lankhorst Needs a proper commit message.

Re: [Intel-gfx] [PATCH 18/28] drm/i915: Take trylock during eviction, v2.

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Now that freeing objects takes the object lock when destroying the > backing pages, we can confidently take the object lock even for dead > objects. > > Use this fact to take the object lock in the shrinker, without requiring > a

Re: [Intel-gfx] [PATCH 16/28] drm/i915: Rework context handling in hugepages selftests

arated, it's a lot better to use > i915_live_selftests, so each subtest starts with a clean slate, and a > clean address space. > > Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld

Re: [Intel-gfx] [PATCH 15/28] drm/i915: Add lock for unbinding to i915_gem_object_ggtt_pin_ww

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Signed-off-by: Maarten Lankhorst Needs a proper commit message. > --- > drivers/gpu/drm/i915/i915_gem.c | 9 - > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c

Re: [Intel-gfx] [PATCH 14/28] drm/i915: Take object lock in i915_ggtt_pin if ww is not set

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > i915_vma_wait_for_bind needs the vma lock held, fix the caller. > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/i915_vma.c | 40 +++-- > 1 file changed, 28 insertions(+), 12 deletions(-) > >

Re: [Intel-gfx] [PATCH 13/28] drm/i915: Remove pages_mutex and intel_gtt->vma_ops.set/clear_pages members

On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst wrote: > > Big delta, but boils down to moving set_pages to i915_vma.c, and removing > the special handling, all callers use the defaults anyway. We only remap > in ggtt, so default case will fall through. > > Because we still don't require locking

Re: [Intel-gfx] [PATCH 10/28] drm/i915: Change shrink ordering to use locking around unbinding.

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst wrote: > > Call drop_pages with the gem object lock held, instead of the other > way around. This will allow us to drop the vma bindings with the > gem object lock held. > > We plan to require the object lock for unpinning in the future, > and this

Re: [Intel-gfx] [PATCH 09/28] drm/i915: vma is always backed by an object.

-struct i915_vma *i915_vma_alloc(void) > +static struct i915_vma *i915_vma_alloc(void) > { > return kmem_cache_zalloc(slab_vmas, GFP_KERNEL); > } > > -void i915_vma_free(struct i915_vma *vma) > +static void i915_vma_free(struct i915_vma *vma) > {

Re: [Intel-gfx] [PATCH 08/28] drm/i915: Create a full object for mock_ring, v2.

gt; + > + return vma; > + > +err: > + i915_gem_object_put(obj); > + return vma; > +} > + > static struct intel_ring *mock_ring(struct intel_engine_cs *engine) > { > - const unsigned long sz = PAGE_SIZE / 2; > + const unsigned long sz =

Re: [Intel-gfx] [PATCH 07/28] drm/i915: Create a dummy object for gen6 ppgtt

m_object *obj, > +struct sg_table *pages) > +{ > +} > + > +static const struct drm_i915_gem_object_ops pd_dummy_obj_ops = { > + .name = "pd_dummy_obj", > + .flags = I915_GEM_OBJECT_IS_SHRINKABLE, I would assume we d

Re: [Intel-gfx] [PATCH 03/28] drm/i915: Remove dma_resv_prune

On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst wrote: > > The signaled bit is already used for quick testing if a fence is signaled. Why do we need this change? Can you add some more details to the commit please? > > Signed-off-by: Maarten Lankhorst > --- > drivers/gpu/drm/i915/Makefile

[Intel-gfx] [PATCH 2/2] drm/i915/dmabuf: drop the flush on discrete

We were overzealous here; even though discrete is non-LLC, it should still be always coherent. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem

[Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: fix broken build

wbinvd_on_all_cpus() is only defined on x86 it seems, plus we need to include asm/smp.h here. Reported-by: kernel test robot Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 3/4] drm/i915: move cpu_write_needs_clflush

Move it next to its partner in crime; gpu_write_needs_clflush. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 12 drivers/gpu/drm/i915/gem/i915_gem_object.h | 15 ++- drivers/gpu/drm/i915/i915_gem.c| 2

[Intel-gfx] [PATCH 2/4] drm/i915/clflush: disallow on discrete

, so there should in theory be no conceivable reason to ever call i915_gem_clflush_object() on discrete. References: https://gitlab.freedesktop.org/drm/intel/-/issues/4320 Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 6 -- 1 file changed, 4

[Intel-gfx] [PATCH 4/4] drm/i915: stop setting cache_dirty on discrete

Should not be needed. Even with non-coherent display, we should be using device local-memory there, and not system memory. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 10 ++ drivers/gpu/drm/i915/gem/i915_gem_object.c | 7

[Intel-gfx] [PATCH 1/4] drm/i915/clflush: fixup handling of cache_dirty

the pages are populated. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c index

Re: [Intel-gfx] drm/i915: remove duplicate include in mock_region.c

On 20/10/2021 09:04, Ran Jianping wrote: From: ran jianping 'drm/ttm/ttm_placement.h' included in 'drivers/gpu/drm/i915/selftests/mock_region.c' is duplicated. It is also included on the 9 line. Reported-by: Zeal Robot Signed-off-by: ran jianping Pushed to drm-intel-gt-next. Thanks. ---

Re: [Intel-gfx] [PATCH] remove duplicate include in mock_region.c

be prefixed with 'drm/i915:'. Can fix up when pushing though. Thanks, Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/selftests/mock_region.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/mock_region.c b/drivers/gpu/drm/i915/selftests/mock_region.c index

[Intel-gfx] [PATCH 9/9] drm/i915/selftests: mark up hugepages object with start_cpu_write

Just like we do for internal objects. Also just use i915_gem_object_set_cache_coherency() here. No need for over-flushing on LLC platforms. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 7 ++- 1 file changed, 6 insertions(+), 1

[Intel-gfx] [PATCH 7/9] drm/i915: expand on the kernel-doc for cache_dirty

Add some details around non-LLC platforms and cflushing, when dealing with the flush-on-acquire, which is potentially security sensitive. Signed-off-by: Matthew Auld Cc: Thomas Hellström Cc: Daniel Vetter --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 11 .../gpu/drm/i915/gem

[Intel-gfx] [PATCH 8/9] drm/i915: mark up internal objects with start_cpu_write

objects, such that we can re-acquire new pages, if so desired, without needing a new object. As a result we should probably be paranoid here and put the object back into the CPU domain when discarding the pages, and also correctly set cache_dirty, if required. Signed-off-by: Matthew Auld Cc: Thomas

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