Re: [Intel-gfx] [Mesa-dev] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.

2012-07-30 Thread Olivier Galibert
On Mon, Jul 30, 2012 at 10:30:57AM -0700, Eric Anholt wrote: > I'm perfectly fine with the VUE containing slots for both when the app > has gone out of its way to ask for deprecated two-sided color > rendering. Are you also ok with recompiler the shaders when that enable is switched? OG. _

Re: [Intel-gfx] [Mesa-dev] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.

2012-07-29 Thread Olivier Galibert
On Tue, Jul 17, 2012 at 07:37:43AM -0700, Paul Berry wrote: > If possible, I would still like to think of a way to address this situation > that (a) doesn't require modifying both fragment shader back-ends and the > SF program, and (b) helps all Mesa drivers, not just Intel Gen4-5. > Especially bec

Re: [Intel-gfx] [Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.

2012-07-27 Thread Olivier Galibert
On Thu, Jul 26, 2012 at 10:18:01AM -0700, Eric Anholt wrote: > Olivier Galibert writes: > > > In some cases the fragment shader view of the vue registers was out of > > sync with the builder. This fixes it. > > s/builder/SF outputs/ ? > > I'd love to see

Re: [Intel-gfx] [Mesa-dev] [PATCH 5/9] intel gen4-5: Compute the interpolation status for every variable in one place.

2012-07-27 Thread Olivier Galibert
On Thu, Jul 26, 2012 at 10:22:26AM -0700, Eric Anholt wrote: > I don't like seeing this data that should be referenced out of the > program cache key being communicated through brw->. What would you like it being communicated through? OG. ___ Intel-gf

Re: [Intel-gfx] [PATCH 4/9] intel gen4-5: Fix backface/frontface selection when one one color is written to.

2012-07-20 Thread Olivier Galibert
On Fri, Jul 20, 2012 at 10:01:03AM -0700, Eric Anholt wrote: > > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp > > b/src/mesa/drivers/dri/i965/brw_fs.cpp > > index 3f98137..3b62952 100644 > > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp > > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp > > @@ -972,

[Intel-gfx] [PATCH 9/9] intel gen4-5: Don't touch flatshaded values when clipping, only copy them.

2012-07-19 Thread Olivier Galibert
This patch ensures that integers will pass through unscathed. Doing (useless) computations on them is risky, especially when their bit patterns correspond to values like inf or nan. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_clip_util.c | 48

[Intel-gfx] [PATCH 8/9] intel gen4-5: Make noperspective clipping work.

2012-07-19 Thread Olivier Galibert
At this point all interpolation tests with fixed clipping work. Signed-off-by: Olivier Galibert Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_clip.c |9 ++ src/mesa/drivers/dri/i965/brw_clip.h |1 + src/mesa/drivers/dri/i965/brw_clip_util.c | 147

[Intel-gfx] [PATCH 7/9] intel gen4-5: Correctly handle flat vs. non-flat in the clipper.

2012-07-19 Thread Olivier Galibert
At that point, all interpolation piglit tests involving fixed clipping work as long as there's no noperspective. Signed-off-by: Olivier Galibert Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_clip.c | 13 -- src/mesa/drivers/dri/i965/brw_clip.h |

[Intel-gfx] [PATCH 6/9] intel gen4-5: Correctly setup the parameters in the sf.

2012-07-19 Thread Olivier Galibert
would require putting brw_wm_prog before brw_clip_prog and brw_sf_prog. This may be a good thing, but it could have unexpected consequences, so it's better be done independently in any case. Signed-off-by: Olivier Galibert Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_f

[Intel-gfx] [PATCH 5/9] intel gen4-5: Compute the interpolation status for every variable in one place.

2012-07-19 Thread Olivier Galibert
The program keys are updated accordingly, but the values are not used yet. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_clip.c| 90 ++- src/mesa/drivers/dri/i965/brw_clip.h|1 + src/mesa/drivers/dri/i965/brw_context.h | 11

[Intel-gfx] [PATCH 4/9] intel gen4-5: Fix backface/frontface selection when one one color is written to.

2012-07-19 Thread Olivier Galibert
most of the generated piglit tests useless to test the backface selection, but it's simple and it works. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_fs.cpp |9 + src/mesa/drivers/dri/i965/brw_wm_pass2.c |9 + 2 files changed, 18 insertions(+)

[Intel-gfx] [PATCH 3/9] intel gen4-5: fix GL_VERTEX_PROGRAM_TWO_SIDE selection.

2012-07-19 Thread Olivier Galibert
Previous code only selected two side in pure fixed-function setups. This version also activates it when needed with shaders programs. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_sf.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers

[Intel-gfx] [PATCH 2/9] intel gen4-5: simplify the bfc copy in the sf.

2012-07-19 Thread Olivier Galibert
This patch is mostly designed to make followup patches simpler, but it's a simplification by itself. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_sf_emit.c | 93 +-- 1 file changed, 52 insertions(+), 41 deletions(-) diff --git a/src

[Intel-gfx] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.

2012-07-19 Thread Olivier Galibert
In some cases the fragment shader view of the vue registers was out of sync with the builder. This fixes it. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_fs.cpp |9 - src/mesa/drivers/dri/i965/brw_wm_pass2.c | 10 +- 2 files changed, 17 insertions

[Intel-gfx] (no subject)

2012-07-19 Thread Olivier Galibert
Hi, This is the second verion of the clipping/interpolation patches. Main differences: - I tried to take all of Paul's remarks into account - I exploded the first patch in 4 independant ones - I've added a patch to ensure that integers pass through unscathed Patch 4/9 is (slightly) controversi

Re: [Intel-gfx] [Mesa-dev] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.

2012-07-17 Thread Olivier Galibert
On Mon, Jul 16, 2012 at 08:43:17PM -0700, Paul Berry wrote: > Also, I'm not convinced that #3 is necessary. Is there something in the > spec that dictates this behaviour? My reading of the spec is that if the > vertex shader writes to gl_BackColor but not glFrontColor, then the > contents of gl_C

Re: [Intel-gfx] [Mesa-dev] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.

2012-07-17 Thread Olivier Galibert
On Mon, Jul 16, 2012 at 08:43:17PM -0700, Paul Berry wrote: > Can you split this into three separate patches? That will make it easier > to troubleshoot in case we find bugs with these patches in the future. I'm going to try. > Also, I'm not convinced that #3 is necessary. Is there something i

Re: [Intel-gfx] [Mesa-dev] [PATCH 0/5] First batch of gm45 clipping/interpolation fixes

2012-07-14 Thread Olivier Galibert
On Fri, Jul 13, 2012 at 02:45:10PM -0700, Kenneth Graunke wrote: > Sorry...been really busy, and most of us haven't actually spent much if > any time in the clipper shaders. I'll try and review it within a week. Ok cool, lack of time is something I completely understand :-) > Despite the lack o

Re: [Intel-gfx] [Mesa-dev] [PATCH 0/5] First batch of gm45 clipping/interpolation fixes

2012-07-13 Thread Olivier Galibert
On Sat, Jun 30, 2012 at 08:50:10PM +0200, Olivier Galibert wrote: > This is the first part of the fixes I've done to make my gm45 work > correctly w.r.t clipping and interpolation. There's a fair chance > they work for everything gen 4/5, but I have no way to be sure. So, n

Re: [Intel-gfx] [PATCH] drm/i915: Detect the error case for too large CRTC offsets

2012-07-05 Thread Olivier Galibert
On Thu, Jul 05, 2012 at 10:10:10AM +0100, Chris Wilson wrote: > + if (INTEL_INFO(dev)->gen >= 4 && (x|y) & ~4095) { > + DRM_ERROR("CRTC offset too larget (%d, %d)\n", x, y); larget? OG. ___ Intel-gfx mailing list Intel-gfx@lists.freede

[Intel-gfx] [PATCH 5/5] intel gen4-5: Make noperspective clipping work.

2012-06-30 Thread Olivier Galibert
At this point all interpolation tests with fixed clipping work. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_clip.c |9 ++ src/mesa/drivers/dri/i965/brw_clip.h |1 + src/mesa/drivers/dri/i965/brw_clip_util.c | 133 ++--- 3 files

[Intel-gfx] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.

2012-06-30 Thread Olivier Galibert
you. The code instead picks whatever slot was written to by the vertex shader. That makes most of the generated piglit tests useless to test the backface selection though. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_fs.cpp | 18 +- src/mesa/drivers/dri/i965

[Intel-gfx] [PATCH 3/5] intel gen4-5: Correctly setup the parameters in the sf.

2012-06-30 Thread Olivier Galibert
would require putting brw_wm_prog before brw_clip_prog and brw_sf_prog. This may be a good thing, but it could have unexpected consequences, so it's better be done independently in any case. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_fs.cpp |2 +- src/mesa/dr

[Intel-gfx] [PATCH 4/5] intel gen4-5: Correctly handle flat vs. non-flat in the clipper.

2012-06-30 Thread Olivier Galibert
At that point, all interpolation piglit tests involving fixed clipping work as long as there's no noperspective. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_clip.c | 10 - src/mesa/drivers/dri/i965/brw_clip.h |6 +-- src/mesa/drivers/dri

[Intel-gfx] [PATCH 0/5] First batch of gm45 clipping/interpolation fixes

2012-06-30 Thread Olivier Galibert
Hi, This is the first part of the fixes I've done to make my gm45 work correctly w.r.t clipping and interpolation. There's a fair chance they work for everything gen 4/5, but I have no way to be sure. [PATCH 1/5] intel gen4-5: fix GL_VERTEX_PROGRAM_TWO_SIDE. [PATCH 2/5] intel gen4-5: Compute t

[Intel-gfx] [PATCH 2/5] intel gen4-5: Compute the interpolation status for every variable in one place.

2012-06-30 Thread Olivier Galibert
The program keys are updated accordingly, but the values are not used yet. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_clip.c| 82 ++- src/mesa/drivers/dri/i965/brw_clip.h|1 + src/mesa/drivers/dri/i965/brw_context.h | 59

[Intel-gfx] Register "linking"

2012-06-12 Thread Olivier Galibert
Hi guys, I'm playing with my gm45, and trying to understand the inter-shader register allocation and referencing aspects. From what I see, the vs and clipper follow the brw_vue_map to know where data is. The fragment shader, though, does its own input register allocation in the urb_setup array

Re: [Intel-gfx] [PATCH] ACPI/Intel: Rework Opregion support

2011-03-15 Thread Olivier Galibert
On Tue, Mar 15, 2011 at 01:32:40PM +, Matthew Garrett wrote: > Opregion is one mechanism to provide VBT - it doesn't define it. Then let me repeat that I haven't seen anything in the VBT tables of the gma500-using netbook I have that didn't seem to be parsed correctly by the current gpu/drm/i9

Re: [Intel-gfx] [PATCH] ACPI/Intel: Rework Opregion support

2011-03-15 Thread Olivier Galibert
On Tue, Mar 15, 2011 at 01:52:26AM +, Matthew Garrett wrote: > Now that we've got multiple consumers it's probably not helpful to move > the (potentially chip-specific) VBT handling to general code. We've got > zero documentation on how GMA500 handles VBT, and not a great deal more > for i91