[Intel-gfx] [PATCH] drm/i915: Ringbuffer signal func for the second BSD ring

2014-05-09 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com This is missing in: commit 78325f2d270897c9ee0887125b7abb963eb8efea Author: Ben Widawsky benjamin.widaw...@intel.com Date: Tue Apr 29 14:52:29 2014 -0700 drm/i915: Virtualize the ringbuffer signal func Looks to me like a rebase side-effect

[Intel-gfx] [PATCH] tests/gem_error_capture: Initial testcase for error state capture/dump

2014-04-11 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/.gitignore | 1 + tests/Makefile.sources| 1 + tests/gem_error_capture.c | 230 ++ 3 files changed, 232 insertions(+) create mode

[Intel-gfx] [PATCH v2] tests/gem_error_capture: Initial testcase for error state capture/dump

2014-04-11 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Guarantees that error capture works at a very basic level. v2: Also check that the ring object contains a reloc with MI_BB_START for the presumed batch object's address. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/.gitignore | 1

[Intel-gfx] [PATCH] drm/i915: Gracefully handle obj not bound to GGTT in is_pin_display

2014-04-02 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Otherwise, we do a NULL pointer dereference. I've seen this happen while handling an error in i915_gem_object_pin_to_display_plane(): If i915_gem_object_set_cache_level() fails, we call is_pin_display() to handle the error. At this point, the object

[Intel-gfx] [PATCH 27/49] drm/i915/bdw: Prepare for user-created LR contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Now that our global default contexts are correctly created and we have finished the refactoring, it's time to allow other kind of contexts. As we said earlier, logical ring contexts created by the user have their own ringbuffer: not only the backing pages

[Intel-gfx] [PATCH 37/49] drm/i915/bdw: Implement context switching (somewhat)

2014-03-27 Thread oscar . mateo
the globally unique Submission ID to send to the hardware. Also, context pages are now pinned unconditionally to GGTT, so there is no need to bind them. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_lrc.c | 84 + 1 file changed

[Intel-gfx] [PATCH 31/49] drm/i915/bdw: Introduce dependent contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com From here on, we define a stand-alone context as the first context with a given ID to be created for a new fd or a new context create ioctl. This is the one we can easily find using integer ID management. On the other hand, dependent contexts

[Intel-gfx] [PATCH 34/49] drm/i915/bdw: Fix reset stats ioctl with LR contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Since we cannot tell apart which specific context the user refers too, get stats from all the per-engine cotexts with the same ID. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/intel_uncore.c | 15 +++ 1 file

[Intel-gfx] [PATCH 46/49] drm/i915/bdw: Start queueing contexts to be submitted

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Finally, start queueing request on write_tail. Also, remove remaining legacy context switches. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_gem.c| 9 ++--- drivers/gpu/drm/i915/i915_gem_context.c| 10

[Intel-gfx] [PATCH 49/49] drm/i915/bdw: Document execlists and logical ring contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Explain i915_lrc.c with some execlists notes Signed-off-by: Thomas Daniel thomas.dan...@intel.com v2: Add notes on logical ring context creation. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_lrc.c | 78

[Intel-gfx] [PATCH 47/49] drm/i915/bdw: Always write seqno to default context

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Even though we have one Hardware Status Page per context, we are still managing the seqnos per engine. Therefore, the sequence number must be written to a consistent place for all contexts: one of the global default contexts. Signed-off-by: Thomas Daniel

[Intel-gfx] [PATCH 15/49] drm/i915/bdw: GEN8 semaphoreless ring add request

2014-03-27 Thread oscar . mateo
From: Ben Widawsky benjamin.widaw...@intel.com Semaphores have changed, so let's not submit useless commands to the ring. Signed-off-by: Ben Widawsky b...@bwidawsk.net v2: Several rebases. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/intel_ringbuffer.c | 23

[Intel-gfx] [PATCH 17/49] drm/i915/bdw: A bit more advanced context init/fini

2014-03-27 Thread oscar . mateo
...@bwidawsk.net v2: Rebased on top of the Full PPGTT series. It is important to notice that at this point we have one global default context per engine, all of them using the aliasing PPGTT (as opposed to the single global default context we have with legacy HW contexts). Signed-off-by: Oscar Mateo

[Intel-gfx] [PATCH 18/49] drm/i915/bdw: Allocate ringbuffer for LR contexts

2014-03-27 Thread oscar . mateo
backing object early instead of waiting for the alloc destroy ringbuffer calls during ring initialization. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 4 ++ drivers/gpu/drm/i915/i915_lrc.c | 65 +++-- drivers

[Intel-gfx] [PATCH 20/49] drm/i915/bdw: Status page for LR contexts

2014-03-27 Thread oscar . mateo
Widawsky b...@bwidawsk.net v2: Several rebases. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/intel_ringbuffer.c | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 19/49] drm/i915/bdw: Populate LR contexts (somewhat)

2014-03-27 Thread oscar . mateo
is MI_LOAD_REGISTER_IMM(14) for render and (11) for other engines. Signed-off-by: Rafael Barbalho rafael.barba...@intel.com v3: Several rebases and general changes to the code. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_lrc.c | 145 ++-- 1 file

[Intel-gfx] [PATCH 29/49] drm/i915/bdw: Pin context pages at context create time

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com For the moment, this is simple and works allright. When we start having a lot of contexts, this is going to become problematic. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_lrc.c | 21 +++-- 1 file changed

[Intel-gfx] [PATCH 24/49] drm/i915/bdw: Write a new set of context-aware ringbuffer management functions

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Since the ringbuffer can live in the ring (pre-GEN8) or in the context (GEN8+) we need functions that are aware of this. After this commit and some of the previous, this new ringbuffer functions finally are: intel_ringbuffer_get intel_ringbuffer_begin

[Intel-gfx] [PATCH 43/49] drm/i915/bdw: Handle context switch events

2014-03-27 Thread oscar . mateo
to be grabbed, so defer unreferencing and freeing to a bottom half. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_irq.c | 28 ++--- drivers/gpu/drm/i915/i915_lrc.c | 101

[Intel-gfx] [PATCH 32/49] drm/i915/bdw: Create stand-alone and dependent contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com On execbuffer, either...: A) there is not standalone context (and we error: user provided ctx id is invalid). B) the standalone context is the one we are looking for (and we return it). C) the standalone context is blank (and we populate and return it). D

[Intel-gfx] [PATCH 28/49] drm/i915/bdw: Start creating destroying user LR contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Users can create contexts either implicitly by opening an fd, or explicitly by the context create ioctl. In either case, this context needs to be corectly populated with advanced stuff. For the moment we consider all the user contexts to be of the render

[Intel-gfx] [PATCH 33/49] drm/i915/bdw: Allow non-default, non-render user LR contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com This commit changes the ABI, so it is provided separately so that it can be dropped by the maintainer is so he wishes. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_lrc.c | 6 -- 1 file changed, 6 deletions(-) diff

[Intel-gfx] [PATCH 30/49] drm/i915/bdw: Extract LR context object populating

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com As a separate function, we can decide wether we want a context with real information about which engine it uses, or a blank context for which to make a deferred decision. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_lrc.c

[Intel-gfx] [PATCH 26/49] drm/i915/bdw: Set the request context information correctly in the LRC case

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com We need it (at least) to properly update the last retired head. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_gem.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c

[Intel-gfx] [PATCH 22/49] drm/i915/bdw: Plumbing for user LR context switching

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Plumb ring-write_tail with a context argument, which in turn means plumbing ring-add_request, which in turn, etc The idea is that, by the time we would usually update the tail register, we know which context we are working with and, therefore, we can

[Intel-gfx] [PATCH 00/49] Execlists

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Hi all, This patch series implement execlists for GEN8+. Before continuing, it is important to mention that I might have taken upon myself to assemble the series and rewrite it for upstreaming, but many people have worked on this series before me

[Intel-gfx] [PATCH 07/49] drm/i915/bdw: Rework init code for gen8 contexts

2014-03-27 Thread oscar . mateo
. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_gem.c | 16 +++- drivers/gpu/drm/i915/i915_lrc.c | 5 + 3 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers

[Intel-gfx] [PATCH 05/49] drm/i915: Extract trivial parts of ring init (early init)

2014-03-27 Thread oscar . mateo
. Signed-off-by: Ben Widawsky b...@bwidawsk.net v2: The Full PPGTT series have moved things around a little bit. Also, don't forget the VEBOX. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ drivers/gpu/drm/i915/intel_ringbuffer.c | 57

[Intel-gfx] [PATCH 08/49] drm/i915: Make i915_gem_create_context outside accessible

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com We are going to reuse it during logical ring context creation. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem_context.c | 2 +- 2 files changed, 3 insertions(+), 1

[Intel-gfx] [PATCH 03/49] drm/i915: for_each_ring

2014-03-27 Thread oscar . mateo
From: Ben Widawsky benjamin.widaw...@intel.com for_each_ring() iterates over all rings supported by the hardware, not just those which have been initialized as in for_each_active_ring() Signed-off-by: Ben Widawsky b...@bwidawsk.net Acked-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm

[Intel-gfx] [PATCH 13/49] drm/i915/bdw: Execlists ring tail writing

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com The write tail function is a very special place for execlists: since all access to the ring is mediated through requests (thanks to Chris Wilson's Write RING_TAIL once per-request for that) and all requests end up with a write tail, this is the place we

[Intel-gfx] [PATCH 12/49] drm/i915: Rename functions that mention ringbuffers (meaning rings)

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Continue the refactoring: do not init or clean a ringbuffer when you actually mean a ring. Again, no functional changes. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_dma.c | 6 +++--- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 04/49] drm/i915: Simplify a couple of functions thanks to for_each_ring

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com This patch should have no functional changes. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_gem_context.c | 37 +++-- 1 file changed, 12 insertions(+), 25 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 11/49] drm/i915: Split the ringbuffers and the rings

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Following the logic behind the previous patch, the ringbuffers and the rings belong in different structs. We keep the relationship between the two via the default_ringbuf living inside each ring/engine. This commit should not introduce functional changes

[Intel-gfx] [PATCH 36/49] drm/i915/bdw: Prepare for a 20-bits globally unique submission ID

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Consisting on 12 bits with the filepriv ID, 5 bits with the context ID and 3 bits with the ring ID. Note: this changes the ABI (only 4096 file descriptors are now allowed, with 8 contexts per-fd) and will break some IGT tests (those that open a big number

[Intel-gfx] [PATCH 35/49] drm/i915: Allocate an integer ID for each new file descriptor

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Since context IDs are not globally unique anymore (they are only unique for a given file descriptor), we can use the new file_priv ID in combination with the context ID to unequivocally refer to a context. The ID 0 remains to be used internally by i915

[Intel-gfx] [PATCH 38/49] drm/i915/bdw: Add forcewake lock around ELSP writes

2014-03-27 Thread oscar . mateo
From: Thomas Daniel thomas.dan...@intel.com BSPEC says: SW must set Force Wakeup bit to prevent GT from entering C6 while ELSP writes are in progress. Signed-off-by: Thomas Daniel thomas.dan...@intel.com Acked-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 1

[Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

2014-03-27 Thread oscar . mateo
are due to no users waiting on a sequence number. Therefore, this commit adds a bitmask of interrupts to be kept unmasked at all times. Signed-off-by: Thomas Daniel thomas.dan...@intel.com Acked-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_irq.c | 28

[Intel-gfx] [PATCH 39/49] drm/i915/bdw: Swap the PPGTT PDPs, LRC style

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Each logical ring context has the PDPs in the context object, so update them before submission. This should work both for Aliasing PPGTT (nothing will be changed) and Full PPGTT. Also, don't write PDP in the legacy way when using logical ring contexts

[Intel-gfx] [PATCH 14/49] drm/i915/bdw: LR context ring init

2014-03-27 Thread oscar . mateo
From: Ben Widawsky benjamin.widaw...@intel.com Logical ring contexts do not need most of the ring init: we just need the pipe control object for the render ring and a few other things (some of which will be added later). Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 45/49] drm/i915/bdw: Display context ringbuffer info in debugfs

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 226b630..c52108d

[Intel-gfx] [PATCH 48/49] drm/i915/bdw: Enable logical ring contexts

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com The time has come, the Walrus said, to talk of many things. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers

[Intel-gfx] [PATCH 40/49] drm/i915/bdw: Write the tail pointer, LRC style

2014-03-27 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Writing the tail pointer for the context ringbuffer is quite similar to the legacy ringbuffers. The primary difference is that each context has the ringbuffer pointers in the context object. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- drivers/gpu

[Intel-gfx] [PATCH v2 2/3] tests/gem_close_race: Adapt the test for Full PPGTT

2013-12-13 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com With Full PPGTT, each new fd creates a new context and thus a new PPGTT, so we have to reduce the number of simultaneous fds or face OOM problems. For every new PPGTT, its PDEs are stored in the GGTT which imposes a limit of 1024 new contexts. We want

[Intel-gfx] [PATCH] build: Create version and config information files in Android

2013-12-13 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Also, skip the compilation of pm_lpsp in Android (uses Cairo) Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/Android.mk | 35 +-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/tests/Android.mk

[Intel-gfx] [PATCH 2/3] tests/gem_close_race: Adapt the test for Full PPGTT

2013-12-10 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com With Full PPGTT, each new fd creates a new context and thus a new PPGTT, so we have to reduce the number of simultaneous fds or face OOM problems. For every new PPGTT, its PDEs are stored in the GGTT which imposes a limit of 1024 new contexts. We want

[Intel-gfx] [PATCH 1/3] lib/drmtest: Add a new test helper to check for Full PPGTT usage

2013-12-10 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- lib/drmtest.c | 14 ++ lib/drmtest.h |1 + 2 files changed, 15 insertions(+) diff --git a/lib/drmtest.c b/lib/drmtest.c index f2624a1..c2483ee 100644 --- a/lib/drmtest.c +++ b/lib

[Intel-gfx] [PATCH 3/3] tests/gem_ppgtt: New Full PPGTT set of tests

2013-12-10 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com These tests cover some tricky corner cases found during the True-and-only Full PPGTT feature development. v2: Add pthread requirement to Makefile. v3: Added new pinned testcase. v4: Require Full PPGTT. Signed-off-by: Oscar Mateo oscar.ma...@intel.com

[Intel-gfx] [PATCH v2 03/11] build: Move logic to tests/Makefile.am and away from Makefile.sources

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Makefile.sources is just a listing with all the sources, and the logic to use these sources goes into either Makefile.am (automake) or Android.mk (make). Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/Makefile.am |4 tests

[Intel-gfx] [PATCH v2 06/11] tests/drm_get_client_auth: In Android, use gettid() instead of syscall(SYS_gettid)

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/drm_get_client_auth.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/tests/drm_get_client_auth.c b/tests/drm_get_client_auth.c index 28e1b3d..2f493f9 100644

[Intel-gfx] [PATCH v2 08/11] build: Fix assorted compilation warnings

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com As these files are compiled for every test, the warnings cluttered the Android build completely. v2: As suggested by Daniel Vetter, drop some of the fixes and fix the compilation flags instead. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- lib

[Intel-gfx] [PATCH v2 07/11] tests/gem_vmap_blits: Finish extracting gem_read

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com It seems something escaped this commit: commit bd5cf9a07d17ce91dfaa3aa12d3f2c93815f0489 Author: Daniel Vetter daniel.vet...@ffwll.ch Date: Tue Jan 10 15:37:53 2012 +0100 lib/drmtest: extract gem_read Signed-off-by: Oscar Mateo oscar.ma...@intel.com

[Intel-gfx] [PATCH v2 05/11] rendercopy: Remove rendercopy.c

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Move scratch_buf_write_to_png() to its only user, gem_render_copy.c. This makes the cairo dependencies easier to handle from the Android perspective, but if there is a good reason why this file exists I can try to handle it differently. Signed-off

[Intel-gfx] [PATCH v2 09/11] lib/drmtest: Get the correct basename() under Android

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- lib/drmtest.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/lib/drmtest.c b/lib/drmtest.c index 44fd30e..75f49cd 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c @@ -26,7

[Intel-gfx] [PATCH v2 02/11] build: Fix missing \ in tests/Makefile.sources

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Noticed by Damien Lespiau. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/Makefile.sources |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 70809c7..311f4b6 100644

[Intel-gfx] [PATCH v2 01/11] build: list all test/tool/lib source files in their own Makefile.sources

2013-11-12 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com In this way, all source files are listed in Makefile.sources and included from Makefile.am, thus enabling the reuse from Android makefiles. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- lib/Makefile.am| 38 + lib/Makefile.sources

[Intel-gfx] [PATCH] tests/drv_suspend: Replace /dev/null with /dev/null 21

2013-11-11 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Some shells do not understand . For instance, my Ubuntu 12.04 machine has /bin/sh pointing to dash, which makes a mess out of (to the point that the helper processes cannot be killed). Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests

[Intel-gfx] [PATCH 3/4 v2] prime_self_import: Assure no pending requests before object counting

2013-11-05 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com We don't want a previously used object to be freed in the middle of a before/after object counting operation (or we would get a -1 objects leaked message). We have seen this happening, e.g., when a context from a previous run dies, but its backing object

[Intel-gfx] [PATCH 4/4 v2] gem_flink_race: Assure no pending requests before object counting

2013-11-05 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Same thing that was done for prime_self_import. v2: Move igt_drop_caches_set() call inside get_object_count() to make it clearer why we want this. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/gem_flink_race.c |7 ++- 1 file changed

[Intel-gfx] [PATCH] lib/drmtest: Retire requests via drop caches after gem_quiescent_gpu

2013-11-05 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com This helps make sure that the GPU is really quiescent by getting rid of any residual stuff. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- lib/drmtest.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/drmtest.c b/lib/drmtest.c index

[Intel-gfx] [PATCH 4/4] gem_flink_race: Assure no pending requests before object counting

2013-11-04 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com Same thing that was done for prime_self_import. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/gem_flink_race.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tests/gem_flink_race.c b/tests/gem_flink_race.c index

[Intel-gfx] [PATCH 3/4] prime_self_import: Assure no pending requests before object counting

2013-11-04 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com We don't want a previously used object to be freed in the middle of a before/after object counting operation (or we would get a -1 objects leaked message). We have seen this happening, e.g., when a context from a previous run dies, but its backing object

[Intel-gfx] [PATCH 1/4] tests: Fix -thrashing and -thrash-inactive distinction

2013-11-04 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com A typo in the relocation tests made both sub-tests perform the same action: drop *all* caches. Signed-off-by: Oscar Mateo oscar.ma...@intel.com --- tests/gem_persistent_relocs.c |2 +- tests/gem_reloc_vs_gpu.c |2 +- 2 files changed, 2

[Intel-gfx] [PATCH 2/4] lib: Add igt_drop_caches_set()

2013-11-04 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com This is basically a drop cache interface to the igt_debugfs facilities. Also, update existing users. Signed-off-by: Oscar Mateo oscar.ma...@intel.com Cc: Damien Lespiau damien.lesp...@intel.com --- lib/igt_debugfs.c | 28

[Intel-gfx] [PATCH] prime_self_import: Assure no pending requests before object counting

2013-11-01 Thread oscar . mateo
From: Oscar Mateo oscar.ma...@intel.com We don't want a previously used object to be freed in the middle of a before/after object counting operation (or we would get a -1 objects leaked message). We have seen this happening, e.g., when a context from a previous run dies, but its backing object

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