Re: [Intel-gfx] [PATCH v9 01/11] drm/i915: Add i915 perf infrastructure

On Tue, Nov 22, 2016 at 1:31 PM, Daniel Vetter <dan...@ffwll.ch> wrote: > On Tue, Nov 22, 2016 at 02:29:18PM +0100, Daniel Vetter wrote: > > On Wed, Nov 09, 2016 at 08:00:06PM +, Matthew Auld wrote: > > > On 7 November 2016 at 19:49, Robert Bragg <rob...@sixbynine

[Intel-gfx] [PATCH igt] stubs/drm: Add drm_intel_gem_context_get_id stub

The plan is to use this api in i915-perf tests so this adds the corresponding stub in case libdrm was built with libdrm_intel disabled. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- lib/stubs/drm/intel_bufmgr.c | 7 +++ lib/stubs/drm/intel_bufmgr.h | 2 ++ 2 files chan

[Intel-gfx] [PATCH igt v4 13/13] igt/gem_exec_parse: check oacontrol lri bad for >= v9

and will abort for any execbuf error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/gem_exec_parse.c | 25 + 1 file changed, 25 insertions(+) diff --git a/tests/gem_exec_parse.c b/tests/gem_

[Intel-gfx] [PATCH igt v4 11/13] igt/gem_exec_parse: update hsw_load_register_reg for v >= 8

This updates the checking of disallowed loads to set a distinguishable value before the load and explicitly check the load was a NOOP by reading back the final value. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/gem_

[Intel-gfx] [PATCH igt v4 10/13] igt/gem_exec_parse: update cmd-crossing-page for >= v8

Since an access violation won't return an error to userspace for v >= 8 of the command parser this updates the cmd-crossing-page test to explicitly read back from SO_WRITE_OFFSET[0] to see that the command wasn't squashed to a NOOP. Signed-off-by: Robert Bragg <rob...@sixbynine.org>

[Intel-gfx] [PATCH igt v4 07/13] igt/gem_exec_parse: req. v < 9 for oacontrol tracking test

ace. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/gem_exec_parse.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c index 9e57ff5..6dc9998 100644 --- a/tests/gem_exe

[Intel-gfx] [PATCH igt v4 12/13] igt/gem_exec_parse: update registers test for v >= 8

that might interfere with the result. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/gem_exec_parse.c | 94 ++ 1 file changed, 49 insertions(+), 45 deletions(-) diff -

[Intel-gfx] [PATCH igt v4 08/13] igt/gem_exec_parse: make basic-rejected version agnostic

This adapts the basic-rejected test to focus on invalid commands that will result in an EINVAL errno being returned to userspace even with the upcoming version 8 parser change to stop reporting access violations as EINVAL errors. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Re

[Intel-gfx] [PATCH igt v4 09/13] igt/gem_exec_parse: update bitmasks test for v >=8

With v8 of the command parser (where we won't get an EINVAL for an access violation) this updates the bitmasks test to explicitly confirm that the command became a NOOP by reading back from where the QW_WRITE would have otherwise landed. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Re

[Intel-gfx] [PATCH igt v4 04/13] igt/gem_exec_parse: update hsw_load_register_reg

This generalises hsw_load_register_reg to loop through an array of allowed and disallowed registers and to use the exec_batch[_patched] utilities. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/gem_exec_p

[Intel-gfx] [PATCH igt v4 06/13] igt/gem_exec_parse: init global parser_version in fixture

This adds a static global int parser_version that can be referenced by all subtests without needing multiple GETPARAM requests. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a

[Intel-gfx] [PATCH igt v4 05/13] igt/gem_exec_parse: make global vars local to main()

Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c index dcf39a2..ebcd092 100644 --- a/tests/gem_exec_parse.c +++ b/tests/gem_exec_p

[Intel-gfx] [PATCH igt v4 03/13] igt/gem_exec_parse: move hsw_load_register_reg down

No functional change, just moving hsw_load_regster_reg test code down below the execbuf utilities in preparation for updating to use them. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/gem_exec_p

[Intel-gfx] [PATCH igt v4 01/13] igt/perf: add i915 perf stream tests for Haswell

Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- tests/Makefile.sources |1 + tests/perf.c | 2373 2 files changed, 2374 insertions(+) create mode 100644 tests/

[Intel-gfx] [PATCH igt v4 00/13] corresponding changes for i915-perf interface

handle and fd global variables could be made local to main() and so added a minor patch for that. perf.c no longer depends on the i915_drm.h copy in libdrm including the i915 perf interface since the test itself includes a guarded copy of the new uapi for now. - Robert Robert Bragg (13): igt/perf

[Intel-gfx] [PATCH igt v4 02/13] igt/gem_exec_parse: some minor cleanups

I915_GEM_DOMAIN_COMMAND domain is now used with all relocs. The register/command defines have been moved to the top of the file to be available to all tests/utilities. The handle + fd variables are now static. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <

Re: [Intel-gfx] [PATCH igt v3 01/11] igt/perf: add i915 perf stream tests for Haswell

On Thu, Nov 10, 2016 at 11:03 PM, Matthew Auld <matthew.william.auld@gmail. com> wrote: > On 11/09, Robert Bragg wrote: > > + > > +igt_main > > +{ > > +igt_skip_on_simulation(); > > + > > +igt_fixture { > > +

Re: [Intel-gfx] [PATCH v9 09/11] drm/i915: add dev.i915.oa_max_sample_rate sysctl

On Wed, Nov 9, 2016 at 7:52 PM, Matthew Auld <matthew.william.a...@gmail.com > wrote: > On 7 November 2016 at 19:49, Robert Bragg <rob...@sixbynine.org> wrote: > > The maximum OA sampling frequency is now configurable via a > > dev.i915.oa_max_sample_rate sysctl p

[Intel-gfx] [PATCH igt v3 10/11] igt/gem_exec_parse: update registers test for v >= 8

that might interfere with the result. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 86 ++ 1 file changed, 45 insertions(+), 41 deletions(-) diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c

[Intel-gfx] [PATCH igt v3 09/11] igt/gem_exec_parse: update hsw_load_register_reg for v >= 8

This updates the checking of disallowed loads to set a distinguishable value before the load and explicitly check the load was a NOOP by reading back the final value. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 20 ++-- 1 file chang

[Intel-gfx] [PATCH igt v3 11/11] igt/gem_exec_parse: check oacontrol lri bad for >= v9

and will abort for any execbuf error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 25 + 1 file changed, 25 insertions(+) diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c index 0fa3af8..702b6f4 100644 --- a

[Intel-gfx] [PATCH igt v3 08/11] igt/gem_exec_parse: update cmd-crossing-page for >= v8

Since an access violation won't return an error to userspace for v >= 8 of the command parser this updates the cmd-crossing-page test to explicitly read back from SO_WRITE_OFFSET[0] to see that the command wasn't squashed to a NOOP. Signed-off-by: Robert Bragg <rob...@sixbynine.org> -

[Intel-gfx] [PATCH igt v3 07/11] igt/gem_exec_parse: update bitmasks test for v >=8

With v8 of the command parser (where we won't get an EINVAL for an access violation) this updates the bitmasks test to explicitly confirm that the command became a NOOP by reading back from where the QW_WRITE would have otherwise landed. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH igt v3 06/11] igt/gem_exec_parse: make basic-rejected version agnostic

This adapts the basic-rejected test to focus on invalid commands that will result in an EINVAL errno being returned to userspace even with the upcoming version 8 parser change to stop reporting access violations as EINVAL errors. Signed-off-by: Robert Bragg <rob...@sixbynine.org> ---

[Intel-gfx] [PATCH igt v3 03/11] igt/gem_exec_parse: move hsw_load_register_reg down

No functional change, just moving hsw_load_regster_reg test code down below the execbuf utilities in preparation for updating to use them. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 182 - 1 file chang

[Intel-gfx] [PATCH igt v3 04/11] igt/gem_exec_parse: update hsw_load_register_reg

This generalises hsw_load_register_reg to loop through an array of allowed and disallowed registers and to use the exec_batch[_patched] utilities. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 139 +++-- 1 file c

[Intel-gfx] [PATCH igt v3 05/11] igt/gem_exec_parse: req. v < 9 for oacontrol tracking test

ace. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c index 2fea060..368f30b 100644 --- a/tests/gem_exec_parse.c +++ b/tests/gem_exec_parse.c

[Intel-gfx] [PATCH igt v3 01/11] igt/perf: add i915 perf stream tests for Haswell

Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/Makefile.sources |1 + tests/perf.c | 2220 2 files changed, 2221 insertions(+) create mode 100644 tests/perf.c diff --git a/tests/Makefile.sources b

[Intel-gfx] [PATCH igt v3 02/11] igt/gem_exec_parse: some minor cleanups

I915_GEM_DOMAIN_COMMAND domain is now used with all relocs. The register/command defines have been moved to the top of the file to be available to all tests/utilities. The handle + fd variables are now static. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c

[Intel-gfx] [PATCH igt v3 00/11] corresponding changes for i915-perf interface

The i915-perf series affects the command parser and itself includes new uapi which these i-g-t changes try to cover. As well as splitting up the gem_exec_parse changes this version maintains support for testing version 7 of the command parser. - Robert Robert Bragg (6): igt/perf: add i915

[Intel-gfx] [PATCH v2] drm/i915: don't whitelist oacontrol in cmd parser

and parser version from 8 to 9, as the change is visible to userspace. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> Reviewed-by: Sourab Gupta <sourab.gu...@intel.com> --- drivers/gpu/drm/i915/i

Re: [Intel-gfx] [PATCH v9 09/11] drm/i915: add dev.i915.oa_max_sample_rate sysctl

On Tue, Nov 8, 2016 at 6:19 AM, sourab gupta <sourab.gu...@intel.com> wrote: > On Mon, 2016-11-07 at 11:49 -0800, Robert Bragg wrote: > > The maximum OA sampling frequency is now configurable via a > > dev.i915.oa_max_sample_rate sysctl parameter. > > > > Foll

[Intel-gfx] [PATCH igt v2 0/6] corresponding changes for i915-perf interface

constant for Haswell, considering how the previous approach of scaling by an integer (80) isn't going to work for gen9. - Robert Robert Bragg (6): igt/perf: add i915 perf stream tests for Haswell igt/gem_exec_parse: remove oacontrol checks igt/gem_exec_parse: some minor cleanups igt

[Intel-gfx] [PATCH igt v2 1/6] igt/perf: add i915 perf stream tests for Haswell

Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/Makefile.sources |1 + tests/perf.c | 2220 2 files changed, 2221 insertions(+) create mode 100644 tests/perf.c diff --git a/tests/Makefile.sources b

[Intel-gfx] [PATCH igt v2 6/6] igt/gem_exec_parse: update for version 8 changes

behaviour was liable to break userspace, such as Mesa which explicitly tries to observe whether OACONTROL LRIs are squashed to NOOPs but Mesa will abort for execbuffer errors. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.

[Intel-gfx] [PATCH igt v2 4/6] igt/gem_exec_parse: move hsw_load_register_reg down

No functional change, just moving hsw_load_regster_reg test code down below the execbuf utilities in preparation for updating to use them. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 174 - 1 file chang

[Intel-gfx] [PATCH igt v2 2/6] igt/gem_exec_parse: remove oacontrol checks

fallback path for not being able to write to OACONTROL via LRI commands will cause Mesa applications to abort(). Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 88 -- 1 file changed, 88 deletions(-) diff --git a

[Intel-gfx] [PATCH igt v2 3/6] igt/gem_exec_parse: some minor cleanups

I915_GEM_DOMAIN_COMMAND domain is now used with all relocs. The register/command defines have been moved to the top of the file to be available to all tests/utilities. The handle + fd variables are now static. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c

[Intel-gfx] [PATCH igt v2 5/6] igt/gem_exec_parse: update hsw_load_register_reg

This generalises hsw_load_register_reg to loop through an array of allowed and disallowed registers and to use the exec_batch[_patched] utilities. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 132 - 1 file c

[Intel-gfx] [PATCH v9 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c

In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixbynine.org&

[Intel-gfx] [PATCH v9 08/11] drm/i915: Add dev.i915.perf_stream_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Re

[Intel-gfx] [PATCH v9 10/11] drm/i915: Add more Haswell OA metric sets

s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 559 - 1 file changed, 558 insertions(+), 1

[Intel-gfx] [PATCH v9 07/11] drm/i915: advertise available metrics via sysfs

and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v9 09/11] drm/i915: add dev.i915.oa_max_sample_rate sysctl

The maximum OA sampling frequency is now configurable via a dev.i915.oa_max_sample_rate sysctl parameter. Following the precedent set by perf's similar kernel.perf_event_max_sample_rate the default maximum rate is 10Hz Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/g

[Intel-gfx] [PATCH v9 03/11] drm/i915: return EACCES for check_cmd() failures

is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. This bumps the command parser version from 7 to 8, as the change is visible to userspace. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH v9 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

ing, without relying on _pin_notify hook, in case ctx already pinned. v3: Revert back to pinning ctx upfront when opening stream, removing need to hook in to pinning and to update OACONTROL on the fly. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Signed-off-by: Zhenyu W

[Intel-gfx] [PATCH v9 05/11] drm/i915: Add 'render basic' Haswell OA unit config

ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH v9 00/11] Enable i915 perf stream for Haswell OA unit

gen9 OA is enabled where the exponents don't represent the same periods as for Haswell. - Robert Robert Bragg (11): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: return EACCES for check_cmd() failures drm/i915: don't whitelist oacontrol in cmd

[Intel-gfx] [PATCH v9 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> Reviewed-by: Sourab Gupt

[Intel-gfx] [PATCH v9 04/11] drm/i915: don't whitelist oacontrol in cmd parser

running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> Reviewed-by: Sourab Gupta <sourab.

[Intel-gfx] [PATCH v9 01/11] drm/i915: Add i915 perf infrastructure

attempt to open a stream will return an error. v2: use i915_gem_context_get() - Chris Wilson v3: update read() interface to avoid passing state struct - Chris Wilson fix some rebase fallout, with i915-perf init/deinit v4: s/DRM_IORW/DRM_IOW/ - Emil Velikov Signed-off-by: Robert Bragg

Re: [Intel-gfx] [PATCH v8 02/12] drm/i915: Add i915 perf infrastructure

On Fri, Nov 4, 2016 at 8:59 AM, sourab gupta <sourab.gu...@intel.com> wrote: > On Thu, 2016-10-27 at 19:14 -0700, Robert Bragg wrote: > > Adds base i915 perf infrastructure for Gen performance metrics. > > > > This adds a DRM_IOCTL_I915_PERF_OPEN ioctl that takes an arr

Re: [Intel-gfx] [PATCH v8 10/12] drm/i915: add oa_event_min_timer_exponent sysctl

On Wed, Nov 2, 2016 at 6:29 AM, sourab gupta <sourab.gu...@intel.com> wrote: > On Thu, 2016-10-27 at 19:14 -0700, Robert Bragg wrote: > > The minimal sampling period is now configurable via a > > dev.i915.oa_min_timer_exponent sysctl parameter. > > > > Fo

Re: [Intel-gfx] [PATCH v8 11/12] drm/i915: Add more Haswell OA metric sets

On Tue, Nov 1, 2016 at 2:57 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Fri, Oct 28, 2016 at 03:14:29AM +0100, Robert Bragg wrote: > > This adds 'compute', 'compute extended', 'memory reads', 'memory writes' > > and 'sampler balance' metric sets for Haswell. >

Re: [Intel-gfx] [PATCH v8 02/12] drm/i915: Add i915 perf infrastructure

On Mon, Oct 31, 2016 at 5:13 PM, Matthew Auld < matthew.william.a...@gmail.com> wrote: > On 31 October 2016 at 16:27, Robert Bragg <rob...@sixbynine.org> wrote: > > > > > > On Fri, Oct 28, 2016 at 3:27 PM, Matthew Auld > > <matthew.william.a...@gmai

Re: [Intel-gfx] [PATCH v8 02/12] drm/i915: Add i915 perf infrastructure

On Fri, Oct 28, 2016 at 3:27 PM, Matthew Auld < matthew.william.a...@gmail.com> wrote: > > +/* Note we copy the properties from userspace outside of the i915 perf > > + * mutex to avoid an awkward lockdep with mmap_sem. > > + * > > + * Note this function only validates properties in isolation it

[Intel-gfx] [PATCH v8 09/12] drm/i915: Add dev.i915.perf_stream_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Re

[Intel-gfx] [PATCH v8 12/12] drm/i915: Add a kerneldoc summary for i915_perf.c

In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixbynine.org&

[Intel-gfx] [PATCH v8 10/12] drm/i915: add oa_event_min_timer_exponent sysctl

The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH v8 08/12] drm/i915: advertise available metrics via sysfs

and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v8 11/12] drm/i915: Add more Haswell OA metric sets

s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 559 - 1 file changed, 558 insertions(+), 1

[Intel-gfx] [PATCH v8 06/12] drm/i915: Add 'render basic' Haswell OA unit config

ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH v8 07/12] drm/i915: Enable i915 perf stream for Haswell OA unit

ing, without relying on _pin_notify hook, in case ctx already pinned. v3: Revert back to pinning ctx upfront when opening stream, removing need to hook in to pinning and to update OACONTROL on the fly. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@s

[Intel-gfx] [PATCH v8 05/12] drm/i915: don't whitelist oacontrol in cmd parser

running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/i915_cmd_p

[Intel-gfx] [PATCH v8 03/12] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/gv

[Intel-gfx] [PATCH v8 00/12] Enable i915 perf stream for Haswell OA unit

himself with a proper commit message. - Robert Chris Wilson (1): ctx-pin placeholder from chris Robert Bragg (11): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: return EACCES for check_cmd() failures drm/i915: don't whitelist oacontrol in cmd

[Intel-gfx] [PATCH v8 02/12] drm/i915: Add i915 perf infrastructure

attempt to open a stream will return an error. v2: use i915_gem_context_get() - Chris Wilson v3: update read() interface to avoid passing state struct - Chris Wilson fix some rebase fallout, with i915-perf init/deinit v4: s/DRM_IORW/DRM_IOW/ - Emil Velikov Signed-off-by: Robert Bragg

[Intel-gfx] [PATCH v8 01/12] ctx-pin placeholder from chris

From: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 34 ++--- 2 files changed, 24 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v8 04/12] drm/i915: return EACCES for check_cmd() failures

is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. This bumps the command parser version from 7 to 8, as the change is visible to userspace. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH v7 00/11] Enable i915 perf stream for Haswell OA unit

was overly cautious (or no longer an issue with the latest code), then this change is ok. - Robert Robert Bragg (11): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: return EACCES for check_cmd() failures drm/i915: don't whitelist oacontrol in cmd

[Intel-gfx] [PATCH v7 05/11] drm/i915: Add 'render basic' Haswell OA unit config

ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH igt 2/3] igt/gem_exec_parse: remove oacontrol checks

fallback path for not being able to write to OACONTROL via LRI commands will cause Mesa applications to abort(). Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c | 88 -- 1 file changed, 88 deletions(-) diff --git a

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On Wed, Oct 26, 2016 at 4:03 PM, Robert Bragg <robert.br...@gmail.com> wrote: > On 26 Oct 2016 11:08 a.m., "Matthew Auld" <matthew.william.a...@gmail.com> > wrote: > > > > On 26 October 2016 at 00:51, Robert Bragg <rob...@sixbynine.org> wrote: >

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On 26 Oct 2016 5:54 p.m., "Ville Syrjälä" <ville.syrj...@linux.intel.com> wrote: > > On Wed, Oct 26, 2016 at 05:42:23PM +0100, Robert Bragg wrote: > > On Wed, Oct 26, 2016 at 4:37 PM, Ville Syrjälä < > > ville.syrj...@linux.intel.com> wrote: > >

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On Wed, Oct 26, 2016 at 4:37 PM, Ville Syrjälä < ville.syrj...@linux.intel.com> wrote: > On Wed, Oct 26, 2016 at 04:17:45PM +0100, Robert Bragg wrote: > > On 26 Oct 2016 9:54 a.m., "Chris Wilson" <ch...@chris-wilson.co.uk> > wrote: > > > > > &

[Intel-gfx] [PATCH igt 3/3] igt/gem_exec_parse: update for version 8 changes

behaviour was liable to break userspace, such as Mesa which explicitly tries to observe whether OACONTROL LRIs are squashed to NOOPs but Mesa will abort for execbuffer errors. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/gem_exec_parse.c

[Intel-gfx] [PATCH igt 1/3] igt/perf: add i915 perf stream tests for Haswell

Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/Makefile.sources |1 + tests/perf.c | 2173 2 files changed, 2174 insertions(+) create mode 100644 tests/perf.c diff --git a/tests/Makefile.sources b

[Intel-gfx] [PATCH igt 0/3] corresponding changes for i915-perf interface

The i915-perf series affects the command parser and itself includes new uapi which these i-g-t changes try to cover. - Robert Robert Bragg (3): igt/perf: add i915 perf stream tests for Haswell igt/gem_exec_parse: remove oacontrol checks igt/gem_exec_parse: update for version 8 changes

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On 26 Oct 2016 9:54 a.m., "Chris Wilson" <ch...@chris-wilson.co.uk> wrote: > > On Wed, Oct 26, 2016 at 12:51:58AM +0100, Robert Bragg wrote: > >On Tue, Oct 25, 2016 at 10:35 PM, Matthew Auld > ><[1]matthew.william.a...@gmail.com> wrote: > >

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On 26 Oct 2016 11:08 a.m., "Matthew Auld" <matthew.william.a...@gmail.com> wrote: > > On 26 October 2016 at 00:51, Robert Bragg <rob...@sixbynine.org> wrote: > > > > > > On Tue, Oct 25, 2016 at 10:35 PM, Matthew Auld > > <matthew.william.a...@

Re: [Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On Tue, Oct 25, 2016 at 10:35 PM, Matthew Auld < matthew.william.a...@gmail.com> wrote: > On 25 October 2016 at 00:19, Robert Bragg <rob...@sixbynine.org> wrote: > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > &

[Intel-gfx] [PATCH v7 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c

In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixbynine.org&

[Intel-gfx] [PATCH v7 10/11] drm/i915: Add more Haswell OA metric sets

s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 559 - 1 file changed, 558 insertions(+), 1

[Intel-gfx] [PATCH v7 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

ing, without relying on _pin_notify hook, in case ctx already pinned. v3: Revert back to pinning ctx upfront when opening stream, removing need to hook in to pinning and to update OACONTROL on the fly. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@s

[Intel-gfx] [PATCH v7 09/11] drm/i915: add oa_event_min_timer_exponent sysctl

The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH v7 08/11] drm/i915: Add dev.i915.perf_stream_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Re

[Intel-gfx] [PATCH v7 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL

OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/gv

[Intel-gfx] [PATCH v7 01/11] drm/i915: Add i915 perf infrastructure

attempt to open a stream will return an error. v4: s/DRM_IORW/DRM_IOW/ - Emil Velikov v3: update read() interface to avoid passing state struct - Chris Wilson fix some rebase fallout, with i915-perf init/deinit v2: use i915_gem_context_get() - Chris Wilson Signed-off-by: Robert Bragg

[Intel-gfx] [PATCH v7 07/11] drm/i915: advertise available metrics via sysfs

and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v7 04/11] drm/i915: don't whitelist oacontrol in cmd parser

running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 38 ++ 1 file chan

[Intel-gfx] [PATCH v7 03/11] drm/i915: return EACCES for check_cmd() failures

is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. This bumps the command parser version from 7 to 8, as the change is visible to userspace. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH] igt/gem_exec_parse: update for version 8 changes

OPS). The interface change isn't expected to affect userspace and in fact it looks like the previous behaviour was liable to break userspace, such as Mesa which explicitly tries to observe whether OACONTROL LRIs are squashed to NOOPs but Mesa will abort for execbuffer errors. Signed-off-by: Rob

[Intel-gfx] [PATCH] drm/i915: Enable i915 perf stream for Haswell OA unit

ing, without relying on _pin_notify hook, in case ctx already pinned. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixbynine.org> Signed-off-by: Zhenyu Wang <zhen...@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 70 ++-

Re: [Intel-gfx] [PATCH v6 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On Thu, Oct 20, 2016 at 11:10 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Thu, Oct 20, 2016 at 10:19:05PM +0100, Robert Bragg wrote: > > +int i915_gem_context_pin_legacy_rcs_state(struct drm_i915_private > *dev_priv, > > +

Re: [Intel-gfx] [PATCH v6 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

On Thu, Oct 20, 2016 at 11:10 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Thu, Oct 20, 2016 at 10:19:05PM +0100, Robert Bragg wrote: > > +int i915_gem_context_pin_legacy_rcs_state(struct drm_i915_private > *dev_priv, > > +

[Intel-gfx] [PATCH v6 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c

In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixbynine.org&

[Intel-gfx] [PATCH v6 07/11] drm/i915: advertise available metrics via sysfs

and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v6 08/11] drm/i915: Add dev.i915.perf_stream_paranoid sysctl option

Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.org> Re

[Intel-gfx] [PATCH v6 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

ing, without relying on _pin_notify hook, in case ctx already pinned. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixbynine.org> Signed-off-by: Zhenyu Wang <zhen...@linux.intel.com> factor out init_specific_ctx_id func --- drivers/gp

[Intel-gfx] [PATCH v6 09/11] drm/i915: add oa_event_min_timer_exponent sysctl

The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

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