ioctl on gen12+")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Acked-by: Vanshidhar Konda
---
drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
b/drivers/gpu/drm/i915/gem/i915_gem_tiling.
e we don't cause an eviction! */
+ obj.offset += stride; /* make sure we don't cause an eviction! */
execbuf.rsvd1 = clone;
if (gen > 3 && gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
--
2.21.0
Reviewed-by: Vanshidhar Konda
__
[n].offset = gen8_canonical_address(obj[n].offset);
obj[n].flags = EXEC_OBJECT_PINNED |
EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
err = gem_gtt_validate_object(fd, &obj[n]);
--
2.21.0
Reviewed-by: Vanshidhar Konda
___
igt_assert_eq(err, -ENOSPC);
continue;
+ }
igt_debug("obj[%d] handle=%d, address=%llx\n",
n, obj[n].handle, (long long)obj[n].offset);
--
Other than the above comments, looks good to me.
R
On Thu, Oct 31, 2019 at 09:23:36PM +, Chris Wilson wrote:
Vanshidhar Konda asked for the simplest test "to verify that the kernel
can submit and hardware can execute batch buffers on all the command
streamers in parallel." We have a number of tests in userspace that
submit lo
On Thu, Oct 31, 2019 at 04:28:57PM +0100, Janusz Krzysztofik wrote:
exec-shared-gtt-* subtests use hardcoded values for object size and
softpin offset, based on 4kB GTT alignment assumption. That may result
in those subtests failing when run on future backing stores with
possibly larger minimum
May be this patch can just be merged with the other patch in this series
that changes gem_exec_reloc.
Vanshi
On Thu, Oct 31, 2019 at 04:28:54PM +0100, Janusz Krzysztofik wrote:
Commit a355b2d6eb42 ("igt/gem_exec_reloc: Filter out unavailable
addresses for !ppgtt") introduced filtering of addres
On Thu, Oct 31, 2019 at 04:28:55PM +0100, Janusz Krzysztofik wrote:
Some tests assume 4kB offset alignment while using softpin. That
assumption may be wrong on future GEM backends with possibly larger
minimum page sizes. As a result, those tests may either fail on
softpin at offsets which are i
On Thu, Oct 31, 2019 at 08:40:58AM +0100, Janusz Krzysztofik wrote:
On Wednesday, October 30, 2019 10:19:43 PM CET Vanshidhar Konda wrote:
On Wed, Oct 30, 2019 at 06:15:35PM +0100, Janusz Krzysztofik wrote:
>Commit a355b2d6eb42 ("igt/gem_exec_reloc: Filter out unavailable
>addresses
On Wed, Oct 30, 2019 at 06:15:35PM +0100, Janusz Krzysztofik wrote:
Commit a355b2d6eb42 ("igt/gem_exec_reloc: Filter out unavailable
addresses for !ppgtt") introduced filtering of addresses possibly
occupied by other users of shared GTT. Unfortunately, that filtering
doesn't distinguish actually
On Tue, Apr 16, 2019 at 08:30:22AM -0700, Bob Paauwe wrote:
On Mon, 15 Apr 2019 17:33:30 -0700
Vanshidhar Konda wrote:
On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote:
>There are real-time use cases where having deterministic CPU processes
>can be more important than GPU
On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote:
There are real-time use cases where having deterministic CPU processes
can be more important than GPU power/performance. Parking the GPU at a
specific freqency by setting idle, min and max prohibits the normal
dynamic GPU frequency switc
On Tue, Mar 26, 2019 at 06:02:18PM +0100, Michał Winiarski wrote:
Since GEM_CREATE is trying to outsmart the user by rounding up unaligned
objects, we used to update the size returned to userspace.
This update seems to have been lost throughout the history.
v2: Use round_up(), reorder locals (Ch
On Fri, Mar 15, 2019 at 02:43:46PM -0700, Rodrigo Vivi wrote:
On Fri, Mar 15, 2019 at 02:39:25PM -0700, Rodrigo Vivi wrote:
On Fri, Mar 15, 2019 at 02:31:40PM -0700, Rodrigo Vivi wrote:
> On Fri, Mar 15, 2019 at 01:27:22PM -0700, Vanshidhar Konda wrote:
> > On Fri, Mar 15, 2019 at 1
On Fri, Mar 15, 2019 at 12:38:41PM -0700, Rodrigo Vivi wrote:
On Fri, Mar 15, 2019 at 11:39:54AM -0700, Vanshidhar Konda wrote:
Extend the timeout for the hardware to signal SEND_BUSY on the DP
Aux Channel Controller register.
This is needed to address FDO #109982
https
Extend the timeout for the hardware to signal SEND_BUSY on the DP
Aux Channel Controller register.
This is needed to address FDO #109982
https://bugzilla.freedesktop.org/show_bug.cgi?id=109982
Cc: Ville Syrjälä
Cc: Imre Deak
Signed-off-by: Vanshidhar Konda
---
drivers/gpu/drm/i915/intel_dp.c
On Fri, Mar 15, 2019 at 03:35:04PM +0200, Ville Syrjälä wrote:
On Thu, Mar 14, 2019 at 06:37:22PM -0700, Vanshidhar Konda wrote:
On Thu, Mar 14, 2019 at 11:09:38PM +0200, Ville Syrjälä wrote:
>On Thu, Mar 14, 2019 at 02:00:29PM -0700, Vanshidhar Konda wrote:
>> On Thu, Mar 14, 2019
On Thu, Mar 14, 2019 at 11:09:38PM +0200, Ville Syrjälä wrote:
On Thu, Mar 14, 2019 at 02:00:29PM -0700, Vanshidhar Konda wrote:
On Thu, Mar 14, 2019 at 10:47:56PM +0200, Ville Syrjälä wrote:
>On Thu, Mar 14, 2019 at 01:26:00PM -0700, Vanshidhar Konda wrote:
>> On Thu, Mar 14, 2019
On Thu, Mar 14, 2019 at 10:47:56PM +0200, Ville Syrjälä wrote:
On Thu, Mar 14, 2019 at 01:26:00PM -0700, Vanshidhar Konda wrote:
On Thu, Mar 14, 2019 at 08:39:11PM +0200, Ville Syrjälä wrote:
>On Thu, Mar 14, 2019 at 10:58:49AM -0700, Vanshidhar Konda wrote:
>> The log level for time
On Thu, Mar 14, 2019 at 08:39:11PM +0200, Ville Syrjälä wrote:
On Thu, Mar 14, 2019 at 10:58:49AM -0700, Vanshidhar Konda wrote:
The log level for timeout after waiting for a signal on the DP aux
channel control register is set to DRM_ERROR. But this is timeout not a
fatal error as the driver
I'll add the Signed Off by line when I re-submit the patch after a
review.
Thanks,
Vanshi
On Thu, Mar 14, 2019 at 10:58:49AM -0700, Vanshidhar Konda wrote:
The log level for timeout after waiting for a signal on the DP aux
channel control register is set to DRM_ERROR. But this is timeou
The log level for timeout after waiting for a signal on the DP aux
channel control register is set to DRM_ERROR. But this is timeout not a
fatal error as the driver is expected to retry the command. Failure
after all retries is already captured as an error. Hence, reducing the
log for a timeout t
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