On Fri, Oct 04, 2024 at 10:45:25AM +0200, Sebastian Andrzej Siewior wrote:
> On 2024-10-04 11:31:22 [+0300], Ville Syrjälä wrote:
> >
> > So once vblank evasion has declared things to be safe we might have
> > as short a time as VBLANK_EVASION_TIME_US to write all the regi
On Fri, Oct 04, 2024 at 08:49:51AM +0200, Sebastian Andrzej Siewior wrote:
> On 2024-10-02 19:58:08 [+0300], Ville Syrjälä wrote:
> > > These patches were not picked. Did I forget something or was this just
> > > overseen?
> >
> > This looks quite poorly
On Mon, Sep 30, 2024 at 08:04:02PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use the DSB to perform simple plane/color management commits.
> Anything more complicatd (modesets and fastsets) are still
> punted to the mmio path.
>
> Also DSB won't be used wh
On Thu, Oct 03, 2024 at 10:50:24PM +0200, Maarten Lankhorst wrote:
> Hello,
>
> Den 2024-10-03 kl. 18:14, skrev Ville Syrjälä:
> > On Thu, Oct 03, 2024 at 05:44:12PM +0200, Maarten Lankhorst wrote:
> >> I'm planning to reorder readout in the Xe sequence in such a way
On Thu, Oct 03, 2024 at 02:33:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> drm_client_firmware_config() is currently picking up the current
> mode of the crtc via the legacy crtc->mode, which is not supposed
> to be used by atomic drivers at all. We can't
On Thu, Oct 03, 2024 at 09:20:38AM -0700, Matt Roper wrote:
> On Thu, Oct 03, 2024 at 07:12:41PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 09:05:40AM -0700, Matt Roper wrote:
> > > On Thu, Oct 03, 2024 at 06:46:31PM +0300, Ville Syrjälä wrote:
> > > >
_de_wait_custom(i915, PLANE_SURFLIVE(pipe, plane_id), ~0U,
> base, 0, 40, NULL) < 0)
> + drm_warn(&i915->drm, "async flip timed out\n");
> +
> + /* No need to vblank wait either */
> + return false;
> }
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Thu, Oct 03, 2024 at 09:05:40AM -0700, Matt Roper wrote:
> On Thu, Oct 03, 2024 at 06:46:31PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
> > >
> > > On 03-10-2024 20:28, Ville Syrjälä wrote:
> > >
On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
>
> On 03-10-2024 20:28, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> >> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> >>> On Thu,
c_helper_update_legacy_modeset_state()
and I didn't bother looking for a better home for it when I split
it out. But seems like it should work fine as is.
>
> I tested kms_vblank, all of them are SUCCESS/SKIP, do you know other tests
> that can trigger bugs?
You would explicitly have to race commits against vblank_enable.
Could of course sprinkle sleep()s around to widen the race window
if you're really keen to hit it.
--
Ville Syrjälä
Intel
On Thu, Oct 03, 2024 at 02:33:03PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Bunch of variables are only needed inside loops and whatnot.
> Move them to a tighter scope to make the code less confusing.
>
> Also replace the 'unsigned int i' footguns with p
On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> > On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > >
On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > > With ICL, we have a way to check if gamma and csc are enabled on
> >
On Thu, Oct 03, 2024 at 02:38:35PM +0200, Louis Chauvet wrote:
> Le 02/10/24 - 21:22, Ville Syrjala a écrit :
> > From: Ville Syrjälä
> >
> > Atomic drivers shouldn't be using the legacy state stored
> > directly under drm_crtc. Move that junk into a 'legac
On Wed, Oct 02, 2024 at 09:21:59PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Hide the plane->fb/etc. footguns better by stashing them inside
> a "legacy" sub struct.
>
> Eventually maybe we could turn 'legacy' into a pointer
> that only ex
intel_color_funcs icl_color_funcs = {
> @@ -3823,7 +3843,7 @@ static const struct intel_color_funcs icl_color_funcs =
> {
> .read_luts = icl_read_luts,
> .lut_equal = icl_lut_equal,
> .read_csc = icl_read_csc,
> - .get_config = skl_get_config,
> + .get_config = icl_get_config,
> };
>
> static const struct intel_color_funcs glk_color_funcs = {
> --
> 2.34.1
--
Ville Syrjälä
Intel
transitions and other stuff from igt, and also
some real workloads) and probably throw in a bunch of
other load/perturbance at the system to make life hard.
After the system has been sufficiently hammered one can
compare sys/kernel/debug/dri/0/crtc-*/i915_update_info
against a baseline. Bonus points for doing it on a potato.
--
Ville Syrjälä
Intel
On Fri, Sep 27, 2024 at 05:56:31PM +0300, Jani Nikula wrote:
> On Fri, 27 Sep 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Eliminate the special gen2 irq code by simply reusing the
> > gen3+ code on gen2. Works just fine on actual hardware.
> >
&g
On Mon, Sep 30, 2024 at 02:50:09PM -0500, Bjorn Helgaas wrote:
> On Thu, Sep 26, 2024 at 07:03:16PM +0300, Ville Syrjälä wrote:
> > On Wed, Sep 25, 2024 at 02:28:42PM -0500, Bjorn Helgaas wrote:
> > > On Wed, Sep 25, 2024 at 05:45:21PM +0300, Ville Syrjala wrote:
> >
CK_X(sync_mode_slaves_mask);
> PIPE_CONF_CHECK_I(master_transcoder);
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Fri, Sep 27, 2024 at 04:45:44PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 27, 2024 at 04:14:17PM +0300, Jani Nikula wrote:
> > On Fri, 27 Sep 2024, Ville Syrjälä wrote:
> > > On Fri, Sep 27, 2024 at 11:20:32AM +0300, Jani Nikula wrote:
> > >> On Fri,
inor
> fixes. (Ville)
>
> Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 46 +++--
> 1 file changed, 36 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp
;
if (num_joined_pipes > 1)
max_bpp = min(max_bpp, bigjoiner_bw_max_bpp(...));
if (num_joined_pipes == 4)
max_bpp = min(max_bpp, ultrajoiner_ram_max_bpp(...));
return max_bpp;
}
but that can be done as a followup.
Reviewed-by: Ville Syrjälä
>
> return max_bpp_small_joiner_ram;
> --
> 2.45.2
--
Ville Syrjälä
Intel
Ankit Nautiyal
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 29f8c
On Fri, Sep 27, 2024 at 05:35:45PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The only real reason why we have the gen2 vs. gen3+ split
> in irq handling is that bspec claims that IIR/IMR/IER/ISR
> and EMR are only 16 bits on gen2, as opposed to being 32
> bits on g
On Fri, Sep 27, 2024 at 04:14:17PM +0300, Jani Nikula wrote:
> On Fri, 27 Sep 2024, Ville Syrjälä wrote:
> > On Fri, Sep 27, 2024 at 11:20:32AM +0300, Jani Nikula wrote:
> >> On Fri, 27 Sep 2024, Alessandro Zanni wrote:
> >> > This fix solves multiple Smatch errors:
EN_UPTO_DC6
> - use intel_crtc->block_dc6_needed
>
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
> Signed-off-by: Jouni Högander
> Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_crtc.c | 7 +
> .../gpu/drm/i915/d
=1
issue I pointed out the other patch.
Or if you want to handle the num_joined_pipes==1 case inside
bigjoiner_bw_max_bpp() then please adjust this to do a similar
thing.
> +
> return max_bpp;
> }
>
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Fri, Sep 27, 2024 at 03:31:29PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 27, 2024 at 02:08:26PM +0530, Ankit Nautiyal wrote:
> > Streamline the helper to get max compressed bpp for joiner case, to
> > effectively use num of pipes joined. This will make the addition of
t; + max_bpp *= num_joined_pipes;
> +
lgtm, with the caveat that this part needs a bit of adjustment
after the *=2 gets moved here when respinning the previous patch.
Reviewed-by: Ville Syrjälä
> return max_bpp;
> }
>
> @@ -899,19 +902,12 @@ u32 get_max_
2 */
> - int ppc = 2;
> - u32 max_bpp_bigjoiner =
> - i915->display.cdclk.max_cdclk_freq * ppc *
> bigjoiner_interface_bits /
> - intel_dp_mode_to_fec_clock(mode_clock);
> + u32 max_bpp_bigjoiner = bigjoiner_bw_max_bpp(display,
> mode_clock, num_joined_pipes);
>
> max_bpp_small_joiner_ram *= 2;
That multiplication should be inside small_joiner_ram_max_bpp().
>
> --
> 2.45.2
--
Ville Syrjälä
Intel
&&
> > fb->format->format == DRM_FORMAT_C8)
> > new_crtc_state->c8_planes |= BIT(plane->id);
> >
> > if (new_plane_state->uapi.visible || old_plane_state->uapi.visible)
> > new_crtc_state->update_planes |= BIT(plane->id);
> >
> > - if (new_plane_state->uapi.visible &&
> > + if (new_plane_state->uapi.visible && fb &&
> > intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) {
> > new_crtc_state->data_rate_y[plane->id] =
> > intel_plane_data_rate(new_crtc_state, new_plane_state,
> > 0);
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
iner_ram = (4 * 72 * 512) / mode_hdisplay;
>
> - return min(max_bpp_small_joiner_ram, max_bpp_bigjoiner);
> + max_bpp = min(max_bpp, max_bpp_ultrajoiner_ram);
> }
>
> - return max_bpp_small_joiner_ram;
> + return max_bpp;
> }
>
> u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Thu, Sep 26, 2024 at 10:43:21AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 25, 2024 at 05:45:22PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > driver/pci does the pci_save_state()+pci_set_power_state() from the
> > _noirq() pm hooks. Move our m
On Wed, Sep 25, 2024 at 02:28:42PM -0500, Bjorn Helgaas wrote:
> On Wed, Sep 25, 2024 at 05:45:21PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > On some older laptops i915 needs to leave the GPU in
> > D0 when hibernating the system, or else the BIOS
>
On Thu, Sep 26, 2024 at 10:45:44AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 25, 2024 at 05:45:23PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Stop spelling out each variant of the hook ("" vs. "_late" vs.
> > "_early
On Thu, Sep 26, 2024 at 10:48:41AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 25, 2024 at 05:45:25PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Since this switcheroo stuff bypasses all the core pm we
> > have to manually manage the pci state. To t
On Thu, Sep 26, 2024 at 06:45:14PM +0530, Nautiyal, Ankit K wrote:
>
> On 9/26/2024 4:49 PM, Ville Syrjälä wrote:
> > On Thu, Sep 26, 2024 at 12:56:31PM +0530, Ankit Nautiyal wrote:
> >> Pass the current pipe into enabled_joiner_pipes(), and let it figure out
> >&
On Thu, Sep 26, 2024 at 06:37:46PM +0530, Nautiyal, Ankit K wrote:
>
> On 9/26/2024 4:44 PM, Ville Syrjälä wrote:
> > On Thu, Sep 26, 2024 at 12:56:25PM +0530, Ankit Nautiyal wrote:
> >> Currently we support joiner only for DP encoder.
> >> Do not create the deb
> struct dentry *root = connector->base.debugfs_entry;
> int connector_type = connector->base.connector_type;
> + struct intel_dp *intel_dp = intel_attached_dp(connector);
I'd probably drop the local variable entirely since it
can give us garbage for non-dp
skiy
> Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/int
Signed-off-by: Stanislav Lisovskiy
> Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 88 +++
> .../gpu/drm/i915/display/intel_vdsc_regs.h| 2 +
> 2 files changed, 90 insertions(+)
>
> diff
tches. (Ville)
>
> Signed-off-by: Ankit Nautiyal
> Suggested-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 89 ++--
> 1 file changed, 44 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_di
t needs to be
done between intel_crtc_compute_pipe_mode() and
intel_crtc_compute_pixel_rate(). I would stash it all inside
some kind of intel_crtc_compute_pfit() function so as to
not pollute intel_crtc_compute_config() too badly.
> + }
> +
> /* Dithering seems to not pass-through bits correctly when it should, so
>* only enable it on 6bpc panels and when its not a compliance
>* test requesting 6bpc video pattern.
> --
> 2.25.1
--
Ville Syrjälä
Intel
l_encoder
> *encoder,
> if (ret)
> return ret;
>
> - ret = intel_panel_fitting(pipe_config, conn_state);
> - if (ret)
> - return ret;
> + if (HAS_GMCH(dev_priv)) {
> + ret = intel_gch_panel_fitting(pipe_config, conn_state);
> + if (ret)
> + return ret;
> + }
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> return -EINVAL;
> --
> 2.25.1
--
Ville Syrjälä
Intel
s
> intel_panel_mode_valid(struct intel_connector *connector,
> const struct drm_display_mode *mode);
> -int intel_panel_fitting(struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state);
> +int intel_gch_panel_fitting(struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state);
> +
> +int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state);
> +
> int intel_panel_compute_config(struct intel_connector *connector,
> struct drm_display_mode *adjusted_mode);
> void intel_panel_add_edid_fixed_modes(struct intel_connector *connector,
> --
> 2.25.1
--
Ville Syrjälä
Intel
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2491,9 +2491,7 @@
> #define GEN12_PIPEDMC_INTERRUPT REG_BIT(26) /* tgl+ */
> #define GEN12_PIPEDMC_FAULT REG_BIT(25) /* tgl+ */
> #define MTL_PIPEDMC_ATS_FAULT REG_BIT(24) /* mtl+ */
> -#define XELPD_PI
On Tue, Sep 24, 2024 at 04:37:04PM +0300, Jani Nikula wrote:
> On Tue, 24 Sep 2024, Lucas De Marchi wrote:
> > On Tue, Sep 24, 2024 at 12:49:25PM GMT, Jani Nikula wrote:
> >>On Thu, 29 Aug 2024, Ville Syrjälä wrote:
> >>> On Wed, Aug 28, 2024 at 04:41:24PM -0400,
On Mon, Sep 23, 2024 at 08:35:06PM +0300, Ville Syrjälä wrote:
> On Sun, Sep 22, 2024 at 10:40:32AM +, Govindapillai, Vinod wrote:
> > On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > As with other water
On Sun, Sep 22, 2024 at 09:31:10AM +, Govindapillai, Vinod wrote:
> On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > intel_sprite_set_colorkey_ioctl() lives in intel_sprice_uapi.{c,h}
> > these days. For some reason the o
On Mon, Sep 23, 2024 at 05:48:29PM -0300, Gustavo Sousa wrote:
> Quoting Gustavo Sousa (2024-09-23 17:47:08-03:00)
> >Quoting Ville Syrjälä (2024-09-23 17:18:39-03:00)
> >>On Mon, Sep 23, 2024 at 05:06:00PM -0300, Gustavo Sousa wrote:
> >>> Quoting Ville Syrj
On Mon, Sep 23, 2024 at 05:06:00PM -0300, Gustavo Sousa wrote:
> Quoting Ville Syrjälä (2024-09-23 16:23:27-03:00)
> >On Mon, Sep 23, 2024 at 04:02:54PM -0300, Gustavo Sousa wrote:
> >> Tracepoints that display frame and scanline counters for all pipes were
> >> add
ry_cxsr,
> __entry->new = new;
> ),
>
> - TP_printk("dev %s, cxsr %s->%s, pipe A: frame=%u, scanline=%u, pipe
> B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
> + TP_printk("dev %s, cxsr %s->%s, " _PIPES_FRAME_AND_SCANLINE_FMT,
> __get_str(dev), str_on_off(__entry->old),
> str_on_off(__entry->new),
> - __entry->frame[_TRACE_PIPE_A],
> __entry->scanline[_TRACE_PIPE_A],
> - __entry->frame[_TRACE_PIPE_B],
> __entry->scanline[_TRACE_PIPE_B],
> - __entry->frame[_TRACE_PIPE_C],
> __entry->scanline[_TRACE_PIPE_C])
> + _PIPES_FRAME_AND_SCANLINE_VALUES)
> );
>
> TRACE_EVENT(g4x_wm,
> --
> 2.46.1
--
Ville Syrjälä
Intel
On Mon, Sep 23, 2024 at 11:43:36PM +0530, Ankit Nautiyal wrote:
> Allow forcing ultrajoiner through debugfs.
>
> v2: Minor refactoring of switch case logic. (Ville)
>
> Signed-off-by: Ankit Nautiyal
> Reviewed-by: Suraj Kandpal
Reviewed-by: Ville Syrjälä
> ---
&g
+ if (HAS_ULTRAJOINER(i915))
> + max_dotclock *= 4;
> +
Extraneous newline. With that removed
Reviewed-by: Ville Syrjälä
> + else if (HAS_UNCOMPRESSED_JOINER(i915) || HAS_BIGJOINER(i915))
> max_dotclock *= 2;
>
> return max_dotclock;
> --
> 2.45.2
--
Ville Syrjälä
Intel
;
> + num_joined_pipes /= 2;
> +
> + return clock > num_joined_pipes * i915->display.cdclk.max_dotclk_freq ||
> +hdisplay > 5120;
'num_joined_pipes * 5120'
With that
Reviewed-by: Ville Syrjälä
> }
>
> int intel_dp_num_joined_pipes
to
be trying to say (basically that we need at least two slices
per pipe) whenever bigjoiner is enabled. Ultrajoiner presumably
does not really change that fact in any way?
> continue;
>
> if (min_slice_count <= test_slice_count)
> --
> 2.45.2
--
Ville Syrjälä
Intel
Lisovskiy
> Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 42
> drivers/gpu/drm/i915/display/intel_display.h | 3 ++
> drivers/gpu/drm/i915/display/intel_vdsc.c| 11 -
> 3 files changed
; -Add more drm_WARNs and checks for final primary/secondary pipes.
> (Ville)
>
> Signed-off-by: Ankit Nautiyal
> Suggested-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 85 +++-
> 1 file changed, 48 insertions(+), 37 deletions
tches.
> }
>
> static enum pipe get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes,
> u8 secondary_pipes)
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> index f921ad67b587..bf32a3b46fb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> @@ -37,6 +37,8 @@
> #define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25)
> #define SPLITTER_CONFIGURATION_2_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0)
> #define SPLITTER_CONFIGURATION_4_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1)
> +#define ULTRA_JOINER_ENABLE REG_BIT(23)
> +#define PRIMARY_ULTRA_JOINER_ENABLE REG_BIT(22)
> #define UNCOMPRESSED_JOINER_PRIMARY (1 << 21)
> #define UNCOMPRESSED_JOINER_SECONDARY (1 << 20)
>
> --
> 2.45.2
--
Ville Syrjälä
Intel
+ (IS_DGFX(i915) && DISPLAY_VER(i915)
> == 14)) && \
> + HAS_DSC(i915))
> #define HAS_VRR(i915)(DISPLAY_VER(i915) >= 11)
> #define HAS_AS_SDP(i915) (DISPLAY_VER(i915) >= 13)
> #define HAS_CMRR(i915) (DISPLAY_VER(i915) >= 20)
> --
> 2.45.2
--
Ville Syrjälä
Intel
(force_joined_pipes) {
> case 0:
> break;
> + case 1:
> + fallthrough;
The 'fallthrough' is still redundant.
> case 2:
> connector->force_joined_pipes = force_joined_pipes;
> break;
> --
> 2.45.2
--
Ville Syrjälä
Intel
urn ret;
> +
> + switch (force_joined_pipes) {
> + case 0:
> + break;
The break shouldn't be here. We want to set connector->force_joined_pipes
for both values.
With that fixed
Reviewed-by: Ville Syrjälä
> + case 2:
> + connector->force_
gt;connector_type == DRM_MODE_CONNECTOR_eDP)) {
I think you need to reverse the connector type vs. intel_dp_has_joiner()
checks, otherwise we already assume it's DP when calling
intel_dp_has_joiner().
> debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Mon, Sep 23, 2024 at 11:43:21PM +0530, Ankit Nautiyal wrote:
> Bigjoiner needs DSC, add a check to reflect that.
Might want to point out here that DSC can be fused off, hence
the platform check itself is not sufficient.
Reviewed-by: Ville Syrjälä
>
> Signed-off-by: Ankit
On Mon, Sep 23, 2024 at 11:09:19AM -0700, Matt Roper wrote:
> On Mon, Sep 23, 2024 at 08:38:35PM +0300, Ville Syrjälä wrote:
> > On Mon, Sep 23, 2024 at 08:40:07AM +0530, Suraj Kandpal wrote:
> > > Reduce SHPD_CNT to 250us for display version 12 as it lines up
> > >
On Mon, Sep 23, 2024 at 08:38:35PM +0300, Ville Syrjälä wrote:
> On Mon, Sep 23, 2024 at 08:40:07AM +0530, Suraj Kandpal wrote:
> > Reduce SHPD_CNT to 250us for display version 12 as it lines up
> > with DP1.4a(Table3-4) spec.
> >
> > --v2
> > -Update
rite(&dev_priv->uncore, SHPD_FILTER_CNT,
> SHPD_FILTER_CNT_250);
IMO if we start reducing this for older platforms then we
should just do it for all of them, instead of based on some
random cutoff.
--
Ville Syrjälä
Intel
On Sun, Sep 22, 2024 at 10:40:32AM +, Govindapillai, Vinod wrote:
> On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > As with other watermark calculations, the dodgy pre-g4x
> > update_wm_{pre,post} flag calcultion would like
On Sun, Sep 22, 2024 at 10:34:07AM +, Govindapillai, Vinod wrote:
> On Sun, 2024-09-22 at 12:54 +0300, Govindapillai, Vinod wrote:
> > On Mon, 2024-09-16 at 19:24 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > intel_wm_need_update()
On Mon, Sep 23, 2024 at 05:24:46PM +0300, Jani Nikula wrote:
> On Mon, 23 Sep 2024, Ville Syrjälä wrote:
> > On Mon, Sep 23, 2024 at 12:12:39PM +0300, Jani Nikula wrote:
> >> On Fri, 20 Sep 2024, Ville Syrjälä wrote:
> >> > On Thu, Sep 12, 2024 at 03:15:52PM +0300,
On Mon, Sep 23, 2024 at 12:12:39PM +0300, Jani Nikula wrote:
> On Fri, 20 Sep 2024, Ville Syrjälä wrote:
> > On Thu, Sep 12, 2024 at 03:15:52PM +0300, Jani Nikula wrote:
> >> On Tue, 10 Sep 2024, Ville Syrjala wrote:
> >> > From: Ville Syrjälä
> >> >
&g
On Thu, Sep 12, 2024 at 03:44:32PM +0300, Jani Nikula wrote:
> On Tue, 10 Sep 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Abstract away the nuts and bolts of the SPI vs. PCI ROM
> > stuff, and hide it all in soc/intel_rom.c so that the
> > VBT cod
On Thu, Sep 12, 2024 at 03:02:03PM +0300, Jani Nikula wrote:
> On Tue, 10 Sep 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > The SPI VBT codepath only knows how to read 4 bytes at a time.
> > So to read the 2 byte vbt_size it masks out the unwanted
On Thu, Sep 12, 2024 at 03:15:52PM +0300, Jani Nikula wrote:
> On Tue, 10 Sep 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Replace the three hand rolled "$VBT"s with a vbt_signature[]
> > to avoid accidents.
> >
> > Signed-off-by:
es in DP test debugfs
> drm/i915/display: remove the loop in fifo underrun debugfs file
> creation
> drm/i915/dp: convert DP test debugfs to struct intel_display
> drm/i915/dp: add intel_dp_test_reset() and intel_dp_test_short_pulse()
Gave this a quick once over, didn't see
e *conn_state);
> +void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
> void intel_vrr_set_transcoder_timings(const struct intel_crtc_state
> *crtc_state);
> void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
> void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
> --
> 2.29.0
--
Ville Syrjälä
Intel
*intel_primary_crtc(const struct intel_crtc_state
> *crtc_state);
> bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state);
> +void intel_crtc_adjust_vblank_delay(struct intel_crtc_state *crtc_state,
> + struct intel_encoder *encoder);
> bool intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> const struct intel_crtc_state *pipe_config,
> bool fastset);
> --
> 2.29.0
--
Ville Syrjälä
Intel
317,8 @@ int intel_dp_compute_num_pipes(struct intel_dp
> *intel_dp,
> case 1:
> fallthrough;
> case 2:
> + fallthrough;
Unnecessary fallthrough.
> + case 4:
> return connector->force_joined_pipes;
> default:
> MISSING_CASE(connector->force_joined_pipes);
> --
> 2.45.2
--
Ville Syrjälä
Intel
ven true because bigjoiner
depends on dsc which can (at least theoretically) be fused
odd. Perhaps we also want to include a has_dsc check in
HAS_BIGJOINER() and HAS_ULTRAJOINER()...
> max_dotclock *= 2;
>
> return max_dotclock;
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Thu, Sep 19, 2024 at 06:33:54PM +0300, Jani Nikula wrote:
> The array can be in rodate, make it const.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_quirks.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(
joiner_needs_dsc(struct drm_i915_private
> *i915,
>* Pipe joiner needs compression up to display 12 due to bandwidth
>* limitation. DG2 onwards pipe joiner can be enabled without
>* compression.
> + * Ultrajoiner always needs compression.
>*/
> - return !HAS_UNCOMPRESSED_JOINER(i915) && num_joined_pipes == 2;
> + return (!HAS_UNCOMPRESSED_JOINER(i915) && num_joined_pipes == 2) ||
> + num_joined_pipes == 4;
> }
>
> static int
> --
> 2.45.2
--
Ville Syrjälä
Intel
> + if (intel_crtc_ultrajoiner_enable_needed(crtc_state))
> + dss_ctl1_val |= ULTRA_JOINER_ENABLE;
> +
> + if (intel_crtc_is_ultrajoiner_primary(crtc_state))
> + dss_ctl1_val |= PRIMARY_ULTRA_JOINER_ENABLE;
> +
> dss_ctl1_val |= BIG_JOINER_ENABLE;
> +
> if (intel_crtc_is_bigjoiner_primary(crtc_state))
> dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE;
> }
> --
> 2.45.2
--
Ville Syrjälä
Intel
On Wed, Sep 18, 2024 at 08:13:39PM +0530, Ankit Nautiyal wrote:
> Pass the current pipe into enabled_joiner_pipes(), and let it figure out
> the proper bitmasks for us.
>
> Signed-off-by: Ankit Nautiyal
> Suggested-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display
think is in the next patch, I'll comment there some more.
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> index f921ad67b587..bf32a3b46fb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> @@ -37,6 +37,8 @@
> #define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25)
> #define SPLITTER_CONFIGURATION_2_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0)
> #define SPLITTER_CONFIGURATION_4_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1)
> +#define ULTRA_JOINER_ENABLE REG_BIT(23)
> +#define PRIMARY_ULTRA_JOINER_ENABLE REG_BIT(22)
> #define UNCOMPRESSED_JOINER_PRIMARY (1 << 21)
> #define UNCOMPRESSED_JOINER_SECONDARY (1 << 20)
>
> --
> 2.45.2
--
Ville Syrjälä
Intel
ase.
> #define HAS_VRR(i915)(DISPLAY_VER(i915) >= 11)
> #define HAS_AS_SDP(i915) (DISPLAY_VER(i915) >= 13)
> #define HAS_CMRR(i915) (DISPLAY_VER(i915) >= 20)
> --
> 2.45.2
--
Ville Syrjälä
Intel
igjoiner_pipes) !=
> 0,
> + "Uncomressed joiner pipes(%#x) and bigjoiner pipes(%#x) can't
> intersect\n",
> + uncompressed_joiner_pipes, bigjoiner_pipes);
Maybe add an empty line between all the WARNs becaus
t;
> v2: Fixed checkpatch warnings (Ankit)
> v3: Use struct intel_display in the new functions. (Ankit)
> v4: Use check for bigjoiner before reading the regs. (Ville)
>
> Signed-off-by: Stanislav Lisovskiy
> Signed-off-by: Ankit Nautiyal
> Reviewed-by: Suraj Kandpal
Reviewed-
ed_pipes) {
> + case 1:
> + fallthrough;
> case 2:
> return connector->force_joined_pipes;
> default:
This hunk would completely disappear with the previously
suggested simplification to this function.
--
Ville Syrjälä
Intel
return 2;
> + }
> +
> + return 1;
I think that could be simplified to just:
{
if (force_joined_pipes)
return force_joined_pipes;
if (need_bigjoiner())
return 2;
return 1;
}
Apart from that this looks good.
isplay/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 19f78432cc8f..2e35a81fa6d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1280,7 +1280,7 @@ bool intel_dp_need_joiner(struct intel_dp *intel_dp,
> return false;
>
> return clock > i915->display.cdclk.max_dotclk_freq || hdisplay > 5120 ||
> -connector->force_bigjoiner_enable;
> +connector->force_joined_pipes == 2;
> }
>
> bool intel_dp_has_dsc(const struct intel_connector *connector)
> --
> 2.45.2
--
Ville Syrjälä
Intel
(connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> connector_type == DRM_MODE_CONNECTOR_eDP)) {
> debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,
> --
> 2.45.2
--
Ville Syrjälä
Intel
_init(i915);
> +
> + INIT_WORK(&i915->display.irq.vblank_work, intel_display_vblank_work);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 000ab373c8879..245c1381b455f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1413,6 +1413,8 @@ struct intel_crtc {
> #ifdef CONFIG_DEBUG_FS
> struct intel_pipe_crc pipe_crc;
> #endif
> +
> + u8 block_dc_for_vblank;
Can be 'bool'
Apart from those minor issues this looks good to me. Series is
Reviewed-by: Ville Syrjälä
> };
>
> struct intel_plane {
> --
> 2.34.1
--
Ville Syrjälä
Intel
eset_all() and
> bxt_pps_reset_all() is natural.
>
> Remove the platform checks and warnings from the functions. We don't
> usually have them, unless we're unsure. To make this easier to reason
> about for BXT/GLK, change the condition on caller side from "!PCH" to
> "BX
On Thu, Sep 19, 2024 at 10:53:15AM +0300, Luca Coelho wrote:
> On Mon, 2024-09-16 at 18:29 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Clean up the main commit_tail() codepath a bit by pulling
> > the post plane update steps that need to performed after
On Wed, Sep 18, 2024 at 01:58:44PM +0300, Ville Syrjälä wrote:
> On Wed, Sep 18, 2024 at 05:53:37AM +, Hogander, Jouni wrote:
> > On Tue, 2024-09-17 at 20:58 +0300, Ville Syrjälä wrote:
> > > On Tue, Sep 17, 2024 at 09:35:59AM +0300, Jouni Högander wrote:
> > > >
continue;
>
> - if (DISPLAY_VER(display) >= 9)
> - intel_dp->pps.bxt_pps_reset = true;
> - else
> + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
> + else
> + intel_dp->pps.bxt_pps_reset = true;
> }
> }
>
> --
> 2.39.2
--
Ville Syrjälä
Intel
icl_get_stolen_reserved(i915, uncore,
> &reserved_base, &reserved_size);
> } else if (GRAPHICS_VER(i915) >= 8) {
> - if (IS_LP(i915))
> + if (IS_CHERRYVIEW(i915) || IS_BROXTON(i915) ||
> IS_GEMIN
IS_COMETLAKE(dev_priv)));
The !A&&!B form seems more popular in these, so I'd suggest
using that. JSP looks to be the only one that had to do it
differently for whatever reason...
Either way
Reviewed-by: Ville Syrjälä
> return PCH_TG
er A-D, D-A
> respectively.
>
> v2:
> -Simplify the iterator macro. (Ville)
> -Use struct intel_display. (Ville)
> -Add prefix _intel to the helper name. (Ville)
>
> Signed-off-by: Ankit Nautiyal
> Suggested-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/
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