> -Original Message-
> From: Chauhan, Madhav
> Sent: Saturday, December 24, 2016 12:53 AM
> To: Nikula, Jani ; intel-gfx@lists.freedesktop.org
> Cc: Conselvan De Oliveira, Ander ;
> Saarinen, Jani ; Konduru, Chandra
> ; Shankar, Uma ;
> Mukherjee, Indranil ; Kumar, Shobhit
> ; Deepak M
>
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, December 23, 2016 7:27 PM
> To: Chauhan, Madhav ; intel-
> g...@lists.freedesktop.org
> Cc: Conselvan De Oliveira, Ander ;
> Saarinen, Jani ; Konduru, Chandra
> ; Shankar, Uma ;
> Mukherjee, Indranil ; Kumar, Shobhit
> ; Deepak M ; C
On Thu, 15 Dec 2016, Madhav Chauhan wrote:
> From: Deepak M
>
> Program the clk lane and tlpx time count registers
> to configure DSI PHY.
>
> v2: Addressed Jani's Review comments(renamed bit field macros)
>
> Signed-off-by: Deepak M
> Signed-off-by: Madhav Chauhan
> ---
> drivers/gpu/drm/i915
On Thu, 22 Dec 2016, Ville Syrjälä wrote:
> On Thu, Dec 15, 2016 at 02:31:33PM +0530, Madhav Chauhan wrote:
>> From: Deepak M
>>
>> Program the clk lane and tlpx time count registers
>> to configure DSI PHY.
>>
>> v2: Addressed Jani's Review comments(renamed bit field macros)
>>
>> Signed-off-
On Thu, Dec 15, 2016 at 02:31:33PM +0530, Madhav Chauhan wrote:
> From: Deepak M
>
> Program the clk lane and tlpx time count registers
> to configure DSI PHY.
>
> v2: Addressed Jani's Review comments(renamed bit field macros)
>
> Signed-off-by: Deepak M
> Signed-off-by: Madhav Chauhan
> ---
From: Deepak M
Program the clk lane and tlpx time count registers
to configure DSI PHY.
v2: Addressed Jani's Review comments(renamed bit field macros)
Signed-off-by: Deepak M
Signed-off-by: Madhav Chauhan
---
drivers/gpu/drm/i915/i915_reg.h | 18 ++
drivers/gpu/drm/i915/inte
