On 2010.09.16 15:59:29 +0800, Yuanhan Liu wrote: > Sandybridge uses different address offset(0x100000) for fence table registers, > so make sure we save the right fence registers before suspend. > > This would fix bug: https://bugs.freedesktop.org/show_bug.cgi?id=30199 >
Nice catch! But fence reg only changed on sandybridge, shouldn't use
HAS_PCH_SPLIT.
> Signed-off-by: Yuanhan Liu <yuanhan....@intel.com>
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 10 ++++++++--
> 1 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c
> b/drivers/gpu/drm/i915/i915_suspend.c
> index 2c6b98f..ea09375 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -789,7 +789,10 @@ int i915_save_state(struct drm_device *dev)
> dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
>
> /* Fences */
> - if (IS_I965G(dev)) {
> + if (HAS_PCH_SPLIT(dev)) {
> + for (i = 0; i < 16; i++)
> + dev_priv->saveFENCE[i] =
> I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8));
> + } else if (IS_I965G(dev)) {
> for (i = 0; i < 16; i++)
> dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 +
> (i * 8));
> } else {
> @@ -815,7 +818,10 @@ int i915_restore_state(struct drm_device *dev)
> I915_WRITE(HWS_PGA, dev_priv->saveHWS);
>
> /* Fences */
> - if (IS_I965G(dev)) {
> + if (HAS_PCH_SPLIT(dev)) {
> + for (i = 0; i < 16; i++)
> + I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + (i * 8),
> dev_priv->saveFENCE[i]);
> + } else if (IS_I965G(dev)) {
> for (i = 0; i < 16; i++)
> I915_WRITE64(FENCE_REG_965_0 + (i * 8),
> dev_priv->saveFENCE[i]);
> } else {
> --
> 1.7.2.2
>
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