Re: [Intel-gfx] [PATCH] drm/i915/bxt: Save/Restore Backlight registers when PG0 is gated

2016-01-03 Thread Jani Nikula
On Sat, 02 Jan 2016, Jani Nikula wrote: > On Thu, 31 Dec 2015, Vidya Srinivas wrote: >> Currently Backlight registers which are associated with Power Well 0 >> are not being saved before gating the power well for S0ix. Hence, >> upon resume from S0ix, these registers are not being restored. Due t

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Save/Restore Backlight registers when PG0 is gated

2016-01-02 Thread Jani Nikula
On Thu, 31 Dec 2015, Vidya Srinivas wrote: > Currently Backlight registers which are associated with Power Well 0 > are not being saved before gating the power well for S0ix. Hence, > upon resume from S0ix, these registers are not being restored. Due to > this, the display has resumed and since th

[Intel-gfx] [PATCH] drm/i915/bxt: Save/Restore Backlight registers when PG0 is gated

2015-12-31 Thread Vidya Srinivas
Currently Backlight registers which are associated with Power Well 0 are not being saved before gating the power well for S0ix. Hence, upon resume from S0ix, these registers are not being restored. Due to this, the display has resumed and since there is no backlight, nothing is seen. Patch fixes th