Re: [Intel-gfx] [PATCH] drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC

Thanks for capture the typo. LGTM. Reviewed-by: Alex Dai On 01/18/2016 07:59 AM, Arun Siluvery wrote: In GuC submission mode, driver has to provide a list of registers to be save/restored during gpu reset, make the max no. of registers value consistent with that of the value

Re: [Intel-gfx] [PATCH] drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC

On Tue, Jan 19, 2016 at 10:13:43AM -0800, Yu Dai wrote: > Thanks for capture the typo. LGTM. > > Reviewed-by: Alex Dai > > On 01/18/2016 07:59 AM, Arun Siluvery wrote: > >In GuC submission mode, driver has to provide a list of registers to be > >save/restored during gpu reset,

[Intel-gfx] [PATCH] drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC

In GuC submission mode, driver has to provide a list of registers to be save/restored during gpu reset, make the max no. of registers value consistent with that of the value defined in FW. If they are not in sync then register save/restore during gpu reset won't work as expected. Cc: Alex Dai