Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Use 0 to designate disabled PL1 power limit

2023-03-30 Thread Dixit, Ashutosh
On Thu, 30 Mar 2023 08:44:34 -0700, Rodrigo Vivi wrote: > > On Wed, Mar 29, 2023 at 10:50:09PM -0700, Dixit, Ashutosh wrote: > > On Tue, 28 Mar 2023 16:35:43 -0700, Ashutosh Dixit wrote: > > > > > > On ATSM the PL1 limit is disabled at power up. The previous uapi assumed > > > that the PL1 limit is

Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Use 0 to designate disabled PL1 power limit

2023-03-30 Thread Rodrigo Vivi
On Wed, Mar 29, 2023 at 10:50:09PM -0700, Dixit, Ashutosh wrote: > On Tue, 28 Mar 2023 16:35:43 -0700, Ashutosh Dixit wrote: > > > > On ATSM the PL1 limit is disabled at power up. The previous uapi assumed > > that the PL1 limit is always enabled and therefore did not have a notion of > > a disable

Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Use 0 to designate disabled PL1 power limit

2023-03-29 Thread Dixit, Ashutosh
On Tue, 28 Mar 2023 16:35:43 -0700, Ashutosh Dixit wrote: > > On ATSM the PL1 limit is disabled at power up. The previous uapi assumed > that the PL1 limit is always enabled and therefore did not have a notion of > a disabled PL1 limit. This results in erroneous PL1 limit values when the > PL1 limi

[Intel-gfx] [PATCH] drm/i915/hwmon: Use 0 to designate disabled PL1 power limit

2023-03-28 Thread Ashutosh Dixit
On ATSM the PL1 limit is disabled at power up. The previous uapi assumed that the PL1 limit is always enabled and therefore did not have a notion of a disabled PL1 limit. This results in erroneous PL1 limit values when the PL1 limit is disabled. For example at power up, the disabled ATSM PL1 limit