[Intel-gfx] [PATCH] drm/i915/psr: Disable PSR2 selective fetch for all TGL steps

2022-02-07 Thread Lyude Paul
As we've unfortunately started to come to expect from PSR on Intel platforms, PSR2 selective fetch is not at all ready to be enabled on Tigerlake as it results in severe flickering issues - at least on this ThinkPad X1 Carbon 9th generation. The easiest way I've found of reproducing these issues is

Re: [Intel-gfx] [PATCH] drm/i915/psr: Disable PSR2 selective fetch for all TGL steps

2022-02-08 Thread Hogander, Jouni
Hello Paul, On Mon, 2022-02-07 at 16:38 -0500, Lyude Paul wrote: > As we've unfortunately started to come to expect from PSR on Intel > platforms, PSR2 selective fetch is not at all ready to be enabled on > Tigerlake as it results in severe flickering issues - at least on > this > ThinkPad X1 Carb

Re: [Intel-gfx] [PATCH] drm/i915/psr: Disable PSR2 selective fetch for all TGL steps

2022-02-08 Thread Souza, Jose
On Mon, 2022-02-07 at 16:38 -0500, Lyude Paul wrote: > As we've unfortunately started to come to expect from PSR on Intel > platforms, PSR2 selective fetch is not at all ready to be enabled on > Tigerlake as it results in severe flickering issues - at least on this > ThinkPad X1 Carbon 9th generati

Re: [Intel-gfx] [PATCH] drm/i915/psr: Disable PSR2 selective fetch for all TGL steps

2022-02-08 Thread Lyude Paul
On Tue, 2022-02-08 at 13:06 +, Souza, Jose wrote: > On Mon, 2022-02-07 at 16:38 -0500, Lyude Paul wrote: > > As we've unfortunately started to come to expect from PSR on Intel > > platforms, PSR2 selective fetch is not at all ready to be enabled on > > Tigerlake as it results in severe flickeri

Re: [Intel-gfx] [PATCH] drm/i915/psr: Disable PSR2 selective fetch for all TGL steps

2022-02-08 Thread Lyude Paul
Opened the issue at https://gitlab.freedesktop.org/drm/intel/-/issues/5077 , included dmesg + video. Feel free to let me know if you need any more info, or need me to try any patches On Tue, 2022-02-08 at 13:06 +, Souza, Jose wrote: > On Mon, 2022-02-07 at 16:38 -0500, Lyude Paul wrote: > > As