Re: [Intel-gfx] [PATCH] drm/i915: Adjust available RPS information through sysfs for vlv

2013-08-26 Thread Daniel Vetter
On Mon, Aug 26, 2013 at 04:18:54PM +0100, Chris Wilson wrote: > Valleyview has its own render power state implementation with different > capability knobs - it has no RP0,RP1,RPn but rather RPe. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67734 > Signed-off-by: Chris Wilson > Teste

[Intel-gfx] [PATCH] drm/i915: Adjust available RPS information through sysfs for vlv

2013-08-26 Thread Chris Wilson
Valleyview has its own render power state implementation with different capability knobs - it has no RP0,RP1,RPn but rather RPe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67734 Signed-off-by: Chris Wilson Tested-by: kobe@intel.com Reviewed-by: Jani Nikula --- drivers/gpu/drm/i9