[Intel-gfx] [PATCH] drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor

According to Spec this is a reserved bit for Gen9+ and should not be set. Change-Id: I0215fb7057b94139b7a2f90ecc7a0201c0c93ad4 Signed-off-by: Arun Siluvery arun.siluv...@linux.intel.com --- drivers/gpu/drm/i915/intel_lrc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

Re: [Intel-gfx] [PATCH] drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor

Arun Siluvery arun.siluv...@linux.intel.com writes: According to Spec this is a reserved bit for Gen9+ and should not be set. Change-Id: I0215fb7057b94139b7a2f90ecc7a0201c0c93ad4 Signed-off-by: Arun Siluvery arun.siluv...@linux.intel.com --- Reviewed-by: Mika Kuoppala

Re: [Intel-gfx] [PATCH] drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 6139 -Summary- Platform Delta drm-intel-nightly Series Applied PNV -5

Re: [Intel-gfx] [PATCH] drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor

On Tue, Apr 07, 2015 at 05:03:32PM +0300, Mika Kuoppala wrote: Arun Siluvery arun.siluv...@linux.intel.com writes: According to Spec this is a reserved bit for Gen9+ and should not be set. Change-Id: I0215fb7057b94139b7a2f90ecc7a0201c0c93ad4 Signed-off-by: Arun Siluvery