Quoting Ville Syrjälä (2022-04-20 19:23:57)
> On Wed, Apr 20, 2022 at 05:32:43PM +0200, Hans de Goede wrote:
> > Hi Ville,
> >
> > On 4/20/22 16:03, Ville Syrjälä wrote:
> > > On Mon, Apr 18, 2022 at 05:09:36PM +0200, Hans de Goede wrote:
> > >> Commit 428cb15d5b00 ("drm/i915: Clean up pre-skl pri
On Wed, Apr 20, 2022 at 05:32:43PM +0200, Hans de Goede wrote:
> Hi Ville,
>
> On 4/20/22 16:03, Ville Syrjälä wrote:
> > On Mon, Apr 18, 2022 at 05:09:36PM +0200, Hans de Goede wrote:
> >> Commit 428cb15d5b00 ("drm/i915: Clean up pre-skl primary plane registers")
> >> introduced DISP_POS_Y and DI
Hi Ville,
On 4/20/22 16:03, Ville Syrjälä wrote:
> On Mon, Apr 18, 2022 at 05:09:36PM +0200, Hans de Goede wrote:
>> Commit 428cb15d5b00 ("drm/i915: Clean up pre-skl primary plane registers")
>> introduced DISP_POS_Y and DISP_HEIGHT defines but accidentally set these
>> their masks to REG_GENMASK(
On Mon, Apr 18, 2022 at 05:09:36PM +0200, Hans de Goede wrote:
> Commit 428cb15d5b00 ("drm/i915: Clean up pre-skl primary plane registers")
> introduced DISP_POS_Y and DISP_HEIGHT defines but accidentally set these
> their masks to REG_GENMASK(31, 0) instead of REG_GENMASK(31, 16).
>
> This breaks
On Mon, 2022-04-18 at 17:09 +0200, Hans de Goede wrote:
> Commit 428cb15d5b00 ("drm/i915: Clean up pre-skl primary plane registers")
> introduced DISP_POS_Y and DISP_HEIGHT defines but accidentally set these
> their masks to REG_GENMASK(31, 0) instead of REG_GENMASK(31, 16).
>
> This breaks the pr
Commit 428cb15d5b00 ("drm/i915: Clean up pre-skl primary plane registers")
introduced DISP_POS_Y and DISP_HEIGHT defines but accidentally set these
their masks to REG_GENMASK(31, 0) instead of REG_GENMASK(31, 16).
This breaks the primary display pane on at least pineview machines, fix
the mask to
