[Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-21 Thread Zhi Wang
a PT page will be released if it doesn't contain any meaningful mappings during PPGTT page table shrinking. The PT entry in the upper level will be set to a scratch entry. Normally this works nicely, but in virtualization world, the PPGTT page table is tracked by hypervisor. Releasing the PT page

[Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-28 Thread Zhi Wang
a PT page will be released if it doesn't contain any meaningful mappings during PPGTT page table shrinking. The PT entry in the upper level will be set to a scratch entry. Normally this works nicely, but in virtualization world, the PPGTT page table is tracked by hypervisor. Releasing the PT page

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Zhi Wang
Hi guys: Would you mind to have a quick review on this patch? :P The linux guest under GVT-g couldn't boot up without this patch in the newer kernel. Thanks, Zhi. On 11/21/16 19:44, Zhi Wang wrote: a PT page will be released if it doesn't contain any meaningful mappings during PPGTT page

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Chris Wilson
On Tue, Nov 22, 2016 at 09:29:40PM +0800, Zhi Wang wrote: > Hi guys: > Would you mind to have a quick review on this patch? :P The > linux guest under GVT-g couldn't boot up without this patch in the > newer kernel. > > Thanks, > Zhi. > > On 11/21/16 19:44, Zhi Wang wrote: > >a PT page will b

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Michał Winiarski
On Mon, Nov 21, 2016 at 07:44:26PM +0800, Zhi Wang wrote: > a PT page will be released if it doesn't contain any meaningful mappings > during PPGTT page table shrinking. The PT entry in the upper level will > be set to a scratch entry. > > Normally this works nicely, but in virtualization world, t

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Zhenyu Wang
On 2016.11.22 14:38:19 +, Chris Wilson wrote: > On Tue, Nov 22, 2016 at 09:29:40PM +0800, Zhi Wang wrote: > > Hi guys: > > Would you mind to have a quick review on this patch? :P The > > linux guest under GVT-g couldn't boot up without this patch in the > > newer kernel. > > > > Thanks, >

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Zhi Wang
Thanks Michał! Have a good day. :P On 11/22/16 22:39, Michał Winiarski wrote: On Mon, Nov 21, 2016 at 07:44:26PM +0800, Zhi Wang wrote: a PT page will be released if it doesn't contain any meaningful mappings during PPGTT page table shrinking. The PT entry in the upper level will be set to a sc

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Wang, Zhi A
Hi Chris, thanks for the reply! Without this patch, we have to do pattern scan to identify if the page is still being used as a PT page. :( It's complicated. Originally, all the guest shadow PPGTT pages will be set to write-protected by HV. When guest makes a change in its page table, it will be

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-22 Thread Tian, Kevin
It's also the style how CPU page table is managed... > From: Wang, Zhi A > Sent: Wednesday, November 23, 2016 3:37 PM > > Hi Chris, thanks for the reply! Without this patch, we have to do pattern > scan to identify > if the page is still being used as a PT page. :( It's complicated. > > Origina

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-23 Thread Chris Wilson
On Wed, Nov 23, 2016 at 07:43:21AM +, Tian, Kevin wrote: > It's also the style how CPU page table is managed... But it is not the style of how the GPU page table behaves, which is what the code expects. My only concern here is if the fact that the page is not idle has further rammifactions. -C

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-28 Thread Zhi Wang
Thanks Chirs and Michal :P Please take this patch. :) On 11/29/16 14:55, Zhi Wang wrote: a PT page will be released if it doesn't contain any meaningful mappings during PPGTT page table shrinking. The PT entry in the upper level will be set to a scratch entry. Normally this works nicely, but in

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-29 Thread Tvrtko Ursulin
On 29/11/2016 06:55, Zhi Wang wrote: a PT page will be released if it doesn't contain any meaningful mappings during PPGTT page table shrinking. The PT entry in the upper level will be set to a scratch entry. Normally this works nicely, but in virtualization world, the PPGTT page table is track

Re: [Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

2016-11-29 Thread Chris Wilson
On Tue, Nov 29, 2016 at 08:48:08AM +, Tvrtko Ursulin wrote: > > On 29/11/2016 06:55, Zhi Wang wrote: > >a PT page will be released if it doesn't contain any meaningful mappings > >during PPGTT page table shrinking. The PT entry in the upper level will > >be set to a scratch entry. > > > >Norma