Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6563
-Summary-
Platform Delta drm-intel-nightly Series Applied
ILK
On to, 2015-06-25 at 14:54 -0700, Bob Paauwe wrote:
> Broxton is using a different register and different bit ordering
> for rps status capabilities.
>
> Also GT perf freqency register is different for Broxton so update
> that.
>
> Signed-off-by: Bob Paauwe
> ---
> drivers/gpu/drm/i915/i915_deb
Broxton is using a different register and different bit ordering
for rps status capabilities.
Also GT perf freqency register is different for Broxton so update
that.
Signed-off-by: Bob Paauwe
---
drivers/gpu/drm/i915/i915_debugfs.c | 21 -
drivers/gpu/drm/i915/i915_reg.h
