On Tue, Sep 09, 2014 at 02:25:50PM -0700, Jesse Barnes wrote:
On Tue, 09 Sep 2014 21:45:08 +0530
Deepak S deepa...@intel.com wrote:
On Monday 08 September 2014 08:10 PM, Daniel Vetter wrote:
On Mon, Sep 08, 2014 at 05:14:23PM +0300, Ville Syrjälä wrote:
On Mon, Sep 08, 2014 at
On Wed, Sep 10, 2014 at 09:16:45AM +0200, Daniel Vetter wrote:
On Tue, Sep 09, 2014 at 02:25:50PM -0700, Jesse Barnes wrote:
On Tue, 09 Sep 2014 21:45:08 +0530
Deepak S deepa...@intel.com wrote:
On Monday 08 September 2014 08:10 PM, Daniel Vetter wrote:
On Mon, Sep 08, 2014 at
On Wed, Sep 10, 2014 at 05:47:39PM +0200, Daniel Vetter wrote:
Aside if someone gets bored and wants to apply some polish: And __ variant
of force_wake_get/put which only asserts that the device isn't runtime
suspended instead of doing the runtime_pm_get/put would be cute - we have
one other
9:21 PM
To: Daniel Vetter
Cc: Jesse Barnes; S, Deepak; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: add cherryview specfic forcewake in
execlists_elsp_write
On Wed, Sep 10, 2014 at 05:47:39PM +0200, Daniel Vetter wrote:
Aside if someone gets bored and wants to apply
From: Deepak S deepa...@linux.intel.com
In chv, we have two power wells Render Media. We need to use
corresponsing forcewake count. If we dont follow this we are getting
error *ERROR*: Timed out waiting for forcewake old ack to clear due to
multiple entry into __vlv_force_wake_get.
On Tue, Sep 09, 2014 at 07:14:16PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
In chv, we have two power wells Render Media. We need to use
corresponsing forcewake count. If we dont follow this we are getting
error *ERROR*: Timed out waiting for forcewake
On Mon, Sep 08, 2014 at 05:02:43PM +0300, Ville Syrjälä wrote:
On Tue, Sep 09, 2014 at 07:14:16PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
In chv, we have two power wells Render Media. We need to use
corresponsing forcewake count. If we dont follow
On Mon, Sep 08, 2014 at 05:14:23PM +0300, Ville Syrjälä wrote:
On Mon, Sep 08, 2014 at 05:02:43PM +0300, Ville Syrjälä wrote:
On Tue, Sep 09, 2014 at 07:14:16PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
In chv, we have two power wells Render
On Monday 08 September 2014 08:10 PM, Daniel Vetter wrote:
On Mon, Sep 08, 2014 at 05:14:23PM +0300, Ville Syrjälä wrote:
On Mon, Sep 08, 2014 at 05:02:43PM +0300, Ville Syrjälä wrote:
On Tue, Sep 09, 2014 at 07:14:16PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S
