Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 7138
-Summary-
Platform Delta drm-intel-nightly Series Applied
ILK -1
On Mon, Aug 10, 2015 at 07:06:44PM +0100, Chris Wilson wrote:
On Mon, Aug 10, 2015 at 02:57:32PM -0300, Paulo Zanoni wrote:
I started digging this when I noticed that the BDW code was just
reserving 1mb by coincidence since it was reading reserved fields.
Then I noticed we didn't have any
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 7018
-Summary-
Platform Delta drm-intel-nightly Series Applied
ILK
I started digging this when I noticed that the BDW code was just
reserving 1mb by coincidence since it was reading reserved fields.
Then I noticed we didn't have any values set for SNB and earlier, and
that the HSW sizes were wrong. After that, I noticed that the reserved
area has a specific
On Mon, Aug 10, 2015 at 02:57:32PM -0300, Paulo Zanoni wrote:
I started digging this when I noticed that the BDW code was just
reserving 1mb by coincidence since it was reading reserved fields.
Then I noticed we didn't have any values set for SNB and earlier, and
that the HSW sizes were wrong.
On Tue, Aug 04, 2015 at 06:30:08PM -0300, Paulo Zanoni wrote:
I started digging this when I noticed that the BDW code was just
reserving 1mb by coincidence since it was reading reserved fields.
Then I noticed we didn't have any values set for SNB and earlier, and
that the HSW sizes were wrong.
I started digging this when I noticed that the BDW code was just
reserving 1mb by coincidence since it was reading reserved fields.
Then I noticed we didn't have any values set for SNB and earlier, and
that the HSW sizes were wrong. After that, I noticed that the reserved
area has a specific
